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STM32F746ZGY6TR (UFBGA-143) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F746ZGY6TR

STID: C2056103UFBGA-143 · 143 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F746ZGY6TR (UFBGA-143)A1VDDA2PC10A3PD2A4PD5A5PD7A6PG12A7PG15A8PB6A9PB8A10PE1A11PDR_ONB1PA14(JTCKSWCB2PC11B3PD0B4PD3B5PD4B6PG11B7PB3(JTDO/TRAB8PB7B9PB9B10PE0B11PE4C1VDDC2PA15(JTDI)C3PC12C4PD1C5VDDC6PG10C7PB4(NJTRST)C8PB5C9BOOTC10PE3C11VBATD1VCAP_2D2VSSD3PA13(JTMSSWDD4PA11D5PA10D6PG13D7VDDD8PE2D9PE5D10PC13D11PC14-OSC32_IE1PA12E2PA9E3PC9E4PC8E5PG9E6VDDE7VSSE8PE6E9PF1E10VDDE11PC15-OSC32_OF1PA8F2PC6F3PC7F4PD6F5VSSF6PG14F7PF7F8PF5F9PF4F10PF2F11PF0G1VDDUSBG2PG8G3PG3G4PG6G5PG4G6PG5N11BYPASS_REGN10PA6N9PC5N8PB0N7PF12N6PG0N5PE9N4PE13N3PB11N2VCAP_1N1PB13M11PA3M10PA4M9PA5M8PC4M7PF11M6PF15M5PE8M4PE14M3PB10M2PB12M1PD9L11VREF+L10VDDAL9PA2L8PA7L7PB2L6PF14L5PE7L4PE12L3PE15L2PD8L1VDDK11PC1K10VSSAK9PA0-WKUP(PA0K8PA1K7PB1K6PF13K5PG1K4PE11K3PB14K2PD11K1PD15J11PH0-OSC_IN(PJ10PC2J9PC3J8VDDJ7VDDJ6VDDJ5VDDJ4PE10J3PB15J2PD14J1PG2H11PF8H10PH1-OSC_OUT(H9NRSTH8PC0H7VSSH6PD12H5PD13H4PD10H3VSSH2VSSH1PG7G11PF3G10PF6G9PF10G8PF9G7VDDGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.896.591.486.481.376.271.166.061.055.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9-61.0-66.0-71.1-76.2-81.3-86.4-91.4-96.5mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1L1M1N1A2B2C2D2E2F2G2H2J2K2L2M2N2A3B3C3D3E3F3G3H3J3K3L3M3N3A4B4C4D4E4F4G4H4J4K4L4M4N4A5B5C5D5E5F5G5H5J5K5L5M5N5A6B6C6D6E6F6G6H6J6K6L6M6N6A7B7C7D7E7F7G7H7J7K7L7M7N7A8B8C8D8E8F8G8H8J8K8L8M8N8A9B9C9D9E9F9G9H9J9K9L9M9N9A10B10C10D10E10F10G10H10J10K10L10M10N10A11B11C11D11E11F11G11H11J11K11L11M11N11E=4.54mm · Pitch e=0.40mmD=5.85mm-4-3-2-101234543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 4.54mm × 5.85mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (143/143)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A2PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
A3PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
A4PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
A5PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
A6PG12I/OMultiplexed I/O & Peripheral Pin PG12 (General)
A7PG15I/OMultiplexed I/O & Peripheral Pin PG15 (General)
A8PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
A9PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
A10PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
A11PDR_ONI/OMultiplexed I/O & Peripheral Pin PDR_ON (General)
B1PA14(JTCKSWCLK)I/OMultiplexed I/O & Peripheral Pin PA14(JTCKSWCLK) (SWD/JTAG)
B2PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
B3PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
B4PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
B5PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
B6PG11I/OMultiplexed I/O & Peripheral Pin PG11 (General)
B7PB3(JTDO/TRACESWO)I/OMultiplexed I/O & Peripheral Pin PB3(JTDO/TRACESWO) (SWD/JTAG)
B8PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
B9PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
B10PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
B11PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
C1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
C2PA15(JTDI)I/OMultiplexed I/O & Peripheral Pin PA15(JTDI) (SWD/JTAG)
C3PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
C4PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
C5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
C6PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
C7PB4(NJTRST)I/OMultiplexed I/O & Peripheral Pin PB4(NJTRST) (SWD/JTAG)
C8PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
C9BOOTI/OMultiplexed I/O & Peripheral Pin BOOT (General)
C10PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
C11VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
D1VCAP_2I/OMultiplexed I/O & Peripheral Pin VCAP_2 (General)
D2VSSGNDGround Reference Pin (VSS)
D3PA13(JTMSSWDIO)I/OMultiplexed I/O & Peripheral Pin PA13(JTMSSWDIO) (SWD/JTAG)
D4PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
D5PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
D6PG13I/OMultiplexed I/O & Peripheral Pin PG13 (General)
D7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D8PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
D9PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
D10PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
D11PC14-OSC32_IN(PC14)I/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN(PC14) (RTC/CLK)
E1PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
E2PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
E3PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
E4PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
E5PG9I/OMultiplexed I/O & Peripheral Pin PG9 (General)
E6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
E7VSSGNDGround Reference Pin (VSS)
E8PE6I/OMultiplexed I/O & Peripheral Pin PE6 (General)
E9PF1I/OMultiplexed I/O & Peripheral Pin PF1 (General)
E10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
E11PC15-OSC32_OUT(PC15)I/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT(PC15) (RTC/CLK)
F1PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
F2PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
F3PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
F4PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
F5VSSGNDGround Reference Pin (VSS)
F6PG14I/OMultiplexed I/O & Peripheral Pin PG14 (General)
F7PF7I/OMultiplexed I/O & Peripheral Pin PF7 (General)
F8PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
F9PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
F10PF2I/OMultiplexed I/O & Peripheral Pin PF2 (General)
F11PF0I/OMultiplexed I/O & Peripheral Pin PF0 (General)
G1VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
G2PG8I/OMultiplexed I/O & Peripheral Pin PG8 (General)
G3PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
G4PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
G5PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
G6PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
G7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G8PF9I/OMultiplexed I/O & Peripheral Pin PF9 (General)
G9PF10I/OMultiplexed I/O & Peripheral Pin PF10 (General)
G10PF6I/OMultiplexed I/O & Peripheral Pin PF6 (General)
G11PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
H1PG7I/OMultiplexed I/O & Peripheral Pin PG7 (General)
H2VSSGNDGround Reference Pin (VSS)
H3VSSGNDGround Reference Pin (VSS)
H4PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
H5PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
H6PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
H7VSSGNDGround Reference Pin (VSS)
H8PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
H9NRSTISystem Enable & Hardware Reset (NRST)
H10PH1-OSC_OUT(PH1)I/OMultiplexed I/O & Peripheral Pin PH1-OSC_OUT(PH1) (RTC/CLK)
H11PF8I/OMultiplexed I/O & Peripheral Pin PF8 (General)
J1PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
J2PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
J3PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
J4PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
J5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J9PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
J10PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
J11PH0-OSC_IN(PH0)I/OMultiplexed I/O & Peripheral Pin PH0-OSC_IN(PH0) (RTC/CLK)
K1PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
K2PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
K3PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
K4PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
K5PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
K6PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
K7PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
K8PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
K9PA0-WKUP(PA0)I/OMultiplexed I/O & Peripheral Pin PA0-WKUP(PA0) (General)
K10VSSAGNDGround Reference Pin (VSSA)
K11PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
L1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
L2PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
L3PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
L4PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
L5PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
L6PF14I/OMultiplexed I/O & Peripheral Pin PF14 (General)
L7PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
L8PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
L9PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
L10VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
L11VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
M1PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
M2PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
M3PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
M4PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
M5PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
M6PF15I/OMultiplexed I/O & Peripheral Pin PF15 (General)
M7PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
M8PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
M9PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
M10PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
M11PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
N1PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
N2VCAP_1I/OMultiplexed I/O & Peripheral Pin VCAP_1 (General)
N3PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
N4PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
N5PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
N6PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
N7PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
N8PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
N9PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
N10PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
N11BYPASS_REGI/OMultiplexed I/O & Peripheral Pin BYPASS_REG (General)
PIN A1 VDD
Power
Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 13 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F746ZGY6TR (ST · UFBGA-143)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F746ZGY6TR (UFBGA-143) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F746ZGY6TR (UFBGA-143) - 2. Standard Pinout (Top View)
True package pinout (143 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F746ZGY6TR (UFBGA-143) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F746ZGY6TR (UFBGA-143) - 4. Package Dimensions (D×E×A)
UFBGA-143 · 4.54×5.85mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F746ZGY6TR (UFBGA-143) - 5. Recommended Land Pattern
IPC-7351B Footprint (143 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F746ZGY6TR (UFBGA-143) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (13 figures · Page 1/2)
Showing 1–12 of 13 uncropped original figures for STM32F745 / STM32F746
P1 · p01_fig01881×410px
STM32F746ZGY6TR (UFBGA-143) — ARM®-based Cortex®-M7 32b MCU+FPU, 462DMIPS, up to 1MB Flash/320+16+ 4KB
ARM®-based Cortex®-M7 32b MCU+FPU, 462DMIPS, up to 1MB Flash/320+16+ 4KB
P45 · p45_fig011546×1389px
STM32F746ZGY6TR (UFBGA-143) — Figure 11. STM32F74xVx LQFP100 pinout
Figure 11. STM32F74xVx LQFP100 pinout
P45 · p45_fig01P45
STM32F746ZGY6TR (UFBGA-143) — Datasheet Page 45 (p45_fig01)
Datasheet Page 45 (p45_fig01)
P46 · p46_fig011552×1476px
STM32F746ZGY6TR (UFBGA-143) — Figure 12. STM32F74xVx TFBGA100 ballout
Figure 12. STM32F74xVx TFBGA100 ballout
P125 · p125_fig011546×487px
STM32F746ZGY6TR (UFBGA-143) — Figure 32. Typical application with an 8 MHz crystal
Figure 32. Typical application with an 8 MHz crystal
P125 · p125_fig01P125
STM32F746ZGY6TR (UFBGA-143) — Datasheet Page 125 (p125_fig01)
Datasheet Page 125 (p125_fig01)
P149 · p149_fig011546×1229px
STM32F746ZGY6TR (UFBGA-143) — Figure 41. ADC accuracy characteristics
Figure 41. ADC accuracy characteristics
P149 · p149_fig021546×604px
STM32F746ZGY6TR (UFBGA-143) — Figure 42. Typical connection diagram using the ADC
Figure 42. Typical connection diagram using the ADC
P199 · p199_fig011875×2289px
STM32F746ZGY6TR (UFBGA-143) — Figure 82. TFBGA100, 8 × 8 × 0.8 mm thin fine-pitch ball grid array
Figure 82. TFBGA100, 8 × 8 × 0.8 mm thin fine-pitch ball grid array
P199 · p199_fig01P199
STM32F746ZGY6TR (UFBGA-143) — Datasheet Page 199 (p199_fig01)
Datasheet Page 199 (p199_fig01)
P200 · p200_fig011546×1096px
STM32F746ZGY6TR (UFBGA-143) — Figure 83. TFBGA100, 8 x 8 x 0.8 mm thin fine-pitch ball grid array
Figure 83. TFBGA100, 8 x 8 x 0.8 mm thin fine-pitch ball grid array
P200 · p200_fig01P200
STM32F746ZGY6TR (UFBGA-143) — Datasheet Page 200 (p200_fig01)
Datasheet Page 200 (p200_fig01)
Page 1 / 2 (13 extracted figures)

Technical Specifications & Part Details (STM32F746ZGY6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F746ZGY6TR (UFBGA-143) is a 143-pin embedded microcontroller unit (mcu) featuring a 5.85 × 4.54 × 0.55 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.7 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, CAN, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.7 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
216 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
5.85 × 4.54 × 0.55 mm (A1=0.15 mm)
Package family: WLCSP (UFBGA-143)
Pin Count & Lead PitchN / e
143 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, CAN, ADC, DAC, PWM, SDIO, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol143 auto-grouped pins
OK
IPC-7351B Land Pattern143 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFBGA-143)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
5.85 × 4.54 mm
Height (A) & Pitch (e)IPC-7351B
A=0.55mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.20 mm
Pins / Total PadsTopology
143P / 143Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-143
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F746ZGY6TR (UFBGA-143)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F746ZGY6TR (UFBGA-143)?

Manufactured by ST, the STM32F746ZGY6TR is housed in a UFBGA-143 package with 143 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.7 V to 3.6 V. Key pins include: A1 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A2 (PC10: Multiplexed I/O & Peripheral Pin PC10 (General)), A3 (PD2: Multiplexed I/O & Peripheral Pin PD2 (General)), A4 (PD5: Multiplexed I/O & Peripheral Pin PD5 (General)), A5 (PD7: Multiplexed I/O & Peripheral Pin PD7 (General)), A6 (PG12: Multiplexed I/O & Peripheral Pin PG12 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32F746ZGY6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F746ZGY6TR (UFBGA-143) has a nominal body envelope of 4.54 × 5.85 mm, pitch e = 0.40 mm, and 143 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F746ZGY6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F746ZGY6TR (ST, UFBGA-143) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (143 pins) & STM32F745 / STM32F746 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A2PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
A3PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
A4PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
A5PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General.
A6PG12Digital_IOSignal terminal PG12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG12. Supported peripheral buses: General.
A7PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: General.
A8PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
A9PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
A10PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
A11PDR_ONDigital_IOSignal terminal PDR_ON (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PDR_ON. Supported peripheral buses: General.
B1PA14(JTCKSWCLK)Digital_IOSignal terminal PA14(JTCKSWCLK) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14(JTCKSWCLK). Supported peripheral buses: SWD/JTAG.
B2PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
B3PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
B4PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
B5PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
B6PG11Digital_IOSignal terminal PG11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG11. Supported peripheral buses: General.
B7PB3(JTDO/TRACESWO)Digital_IOSignal terminal PB3(JTDO/TRACESWO) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3(JTDO/TRACESWO). Supported peripheral buses: SWD/JTAG.
B8PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
B9PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
B10PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
B11PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
C1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C2PA15(JTDI)Digital_IOSignal terminal PA15(JTDI) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15(JTDI). Supported peripheral buses: SWD/JTAG.
C3PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
C4PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
C5VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C6PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General.
C7PB4(NJTRST)Digital_IOSignal terminal PB4(NJTRST) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4(NJTRST). Supported peripheral buses: SWD/JTAG.
C8PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
C9BOOTDigital_IOSignal terminal BOOT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT. Supported peripheral buses: General.
C10PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
C11VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D1VCAP_2Digital_IOSignal terminal VCAP_2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP_2. Supported peripheral buses: General.
D2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D3PA13(JTMSSWDIO)Digital_IOSignal terminal PA13(JTMSSWDIO) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13(JTMSSWDIO). Supported peripheral buses: SWD/JTAG.
D4PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
D5PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
D6PG13Digital_IOSignal terminal PG13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG13. Supported peripheral buses: General.
D7VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D8PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
D9PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
D10PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
D11PC14-OSC32_IN(PC14)Digital_IOSignal terminal PC14-OSC32_IN(PC14) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN(PC14). Supported peripheral buses: RTC/CLK.
E1PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
E2PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
E3PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: General.
E4PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
E5PG9Digital_IOSignal terminal PG9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG9. Supported peripheral buses: General.
E6VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E8PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General.
E9PF1Digital_IOSignal terminal PF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.
E10VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E11PC15-OSC32_OUT(PC15)Digital_IOSignal terminal PC15-OSC32_OUT(PC15) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT(PC15). Supported peripheral buses: RTC/CLK.
F1PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
F2PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
F3PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
F4PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General.
F5VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F6PG14Digital_IOSignal terminal PG14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG14. Supported peripheral buses: General.
F7PF7Digital_IOSignal terminal PF7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF7. Supported peripheral buses: General.
F8PF5Digital_IOSignal terminal PF5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF5. Supported peripheral buses: General.
F9PF4Digital_IOSignal terminal PF4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: General.
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