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STM32F378RCY6TR (WLCSP-66(3.8x4.2)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F378RCY6TR

STID: C2055624WLCSP-66(3.8x4.2) · 66 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F378RCY6TR (WLCSP-66(3.8x4.2))A1PA14A2PA15A3PC11A4PD2A5PB5A6PB7A7PB9A8VBATB1PF7B2PF6B3PC10B4PC12B5PB4B6PB6B7PB8B8PC13C1PA11C2PA10C3PA12C4PA13C5PB3C6VSS_1C7BOOT0C8PC14 N- OSC3D1PA8D2PC9D3PA9D6VDD_1D7PF0 OSC IN -D8PC15 U- OSC3E1PC7E2PC6E3PC8J8PA2J7VDD_2J6PA4J5PA6J4PC5J3PB1J2PE9J1VSSSD/ VREFSH8PA0H7PA1H6PA3H5PA5H4PC4H3PB0H2PE8H1VDDSDG8VSSA/VREF -G7VDDAG6VREF+G5VSS_1G4VSS_1G3PA7G2NPORG1VREFSD+F8PC1F7PC2F6PC3F3PD8F2PB14F1PB15E8PF1 - OSC_OUE7NRSTE6PC0Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.848.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1A2B2C2D2E2F2G2H2J2A3B3C3D3E3F3G3H3J3A4B4H4J4A5B5H5J5A6B6H6J6A7B7C7D7E7F7G7H7J7A8B8C8D8E8F8G8H8J8D6C6C5C4F6E6J4G6G5G4E=3.80mm · Pitch e=0.40mmD=4.20mm-4-3-2-10123443210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 3.80mm × 4.20mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (66/66)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PA14I/OMultiplexed I/O & Peripheral Pin PA14 (I2C, SWD/JTAG)
A2PA15I/OMultiplexed I/O & Peripheral Pin PA15 (SPI, I2C, PWM, SWD/JTAG)
A3PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI)
A4PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
A5PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, I2C)
A6PB7I/OMultiplexed I/O & Peripheral Pin PB7 (I2C, PWM)
A7PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI, I2C, CAN)
A8VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
B1PF7I/OMultiplexed I/O & Peripheral Pin PF7 (I2C)
B2PF6I/OMultiplexed I/O & Peripheral Pin PF6 (UART, SPI, I2C)
B3PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
B4PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
B5PB4I/OMultiplexed I/O & Peripheral Pin PB4 (UART, SPI)
B6PB6I/OMultiplexed I/O & Peripheral Pin PB6 (I2C, PWM)
B7PB8I/OMultiplexed I/O & Peripheral Pin PB8 (SPI, I2C, CAN)
B8PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
C1PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
C2PA10I/OMultiplexed I/O & Peripheral Pin PA10 (SPI, I2C, PWM)
C3PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART, SPI, PWM)
C4PA13I/OMultiplexed I/O & Peripheral Pin PA13 (UART, SPI, PWM, SWD/JTAG)
C5PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI, SWD/JTAG)
C6VSS_1GNDGround Reference Pin (VSS_1)
C7BOOT0IInput-Only Pin BOOT0 (General)
C8PC14 N- OSC32 I (2)_I/OMultiplexed I/O & Peripheral Pin PC14 N- OSC32 I (2)_ (RTC/CLK)
D1PA8I/OMultiplexed I/O & Peripheral Pin PA8 (SPI, I2C, PWM)
D2PC9I/OMultiplexed I/O & Peripheral Pin PC9 (SPI, PWM)
D3PA9I/OMultiplexed I/O & Peripheral Pin PA9 (SPI, I2C, PWM)
D6VDD_1PowerPower Supply Input (VDD_1 — 3.3V VDD (Max 4.0V))
D7PF0 OSC IN -_I/OMultiplexed I/O & Peripheral Pin PF0 OSC IN -_ (I2C, RTC/CLK)
D8PC15 U- OSC32 O T(2)_I/OMultiplexed I/O & Peripheral Pin PC15 U- OSC32 O T(2)_ (RTC/CLK)
E1PC7I/OMultiplexed I/O & Peripheral Pin PC7 (SPI, PWM)
E2PC6I/OMultiplexed I/O & Peripheral Pin PC6 (SPI, PWM)
E3PC8I/OMultiplexed I/O & Peripheral Pin PC8 (SPI, PWM)
E6PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC, PWM)
E7NRSTISystem Enable & Hardware Reset (NRST)
E8PF1 - OSC_OUTI/OMultiplexed I/O & Peripheral Pin PF1 - OSC_OUT (I2C, RTC/CLK)
F1PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, I2C, ADC, RTC/CLK)
F2PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, I2C, ADC)
F3PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART, SPI, I2C, ADC)
F6PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, ADC, PWM)
F7PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC, PWM)
F8PC1I/OMultiplexed I/O & Peripheral Pin PC1 (ADC, PWM)
G1VREFSD+I/OMultiplexed I/O & Peripheral Pin VREFSD+ (I2C)
G2NPORI/OMultiplexed I/O & Peripheral Pin NPOR (General)
G3PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
G4VSS_1GNDGround Reference Pin (VSS_1)
G5VSS_1GNDGround Reference Pin (VSS_1)
G6VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (DAC)
G7VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
G8VSSA/VREF -GNDGround Reference Pin (VSSA/VREF -)
H1VDDSDPowerPower Supply Input (VDDSD — 3.3V VDD (Max 4.0V))
H2PE8I/OMultiplexed I/O & Peripheral Pin PE8 (I2C, ADC)
H3PB0I/OMultiplexed I/O & Peripheral Pin PB0 (SPI, I2C, ADC)
H4PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
H5PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
H6PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, SPI, ADC)
H7PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, ADC, RTC/CLK)
H8PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
J1VSSSD/ VREFSD -GNDGround Reference Pin (VSSSD/ VREFSD -)
J2PE9I/OMultiplexed I/O & Peripheral Pin PE9 (I2C, ADC)
J3PB1I/OMultiplexed I/O & Peripheral Pin PB1 (I2C, ADC)
J4PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
J5PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC, DAC, PWM)
J6PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
J7VDD_2PowerPower Supply Input (VDD_2 — 3.3V VDD (Max 4.0V))
J8PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, SPI, ADC)
PIN A1 PA14
I/O
Multiplexed I/O & Peripheral Pin PA14 (I2C, SWD/JTAG)
Design note: Alt: I2C1_SDATIM12CH1 ,_ , TSC_G4IO4SWCLK_ , - JTCK
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 10 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F378RCY6TR (ST · WLCSP-66(3.8x4.2))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) - 2. Standard Pinout (Top View)
True package pinout (66 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) - 4. Package Dimensions (D×E×A)
WLCSP-66(3.8x4.2) · 3.80×4.20mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) - 5. Recommended Land Pattern
IPC-7351B Footprint (67 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (10 figures · Page 1/1)
Showing 1–10 of 10 uncropped original figures for STM32F378
P32 · p32_fig01EXACT PACKAGE
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) — Figure 6. STM32F378xx WLCSP66 ballout
Figure 6. STM32F378xx WLCSP66 ballout
P114 · p114_fig01EXACT PACKAGE
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) — Figure 35. WLCSP66 - 66-pin, 3.767 x 4.229 mm, 0.4 mm pitch wafer level chip scale
Figure 35. WLCSP66 - 66-pin, 3.767 x 4.229 mm, 0.4 mm pitch wafer level chip scale
P115 · p115_fig01EXACT PACKAGE
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) — Figure 36. WLCSP66 marking example (package top view)
Figure 36. WLCSP66 marking example (package top view)
P1 · p01_fig01881×424px
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) — • Memories - 256 Kbytes of Flash memory - 32 Kbytes of SRAM with HW parity check
• Memories - 256 Kbytes of Flash memory - 32 Kbytes of SRAM with HW parity check
P1 · p01_fig02888×314px
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) — • 96-bit unique ID
• 96-bit unique ID
P98 · p98_fig011751×902px
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) — Figure 28. ADC accuracy characteristics
Figure 28. ADC accuracy characteristics
P98 · p98_fig021545×602px
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) — Figure 29. Typical connection diagram using the ADC
Figure 29. Typical connection diagram using the ADC
P98 · p98_fig01P98
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) — Datasheet Page 98 (p98_fig01)
Datasheet Page 98 (p98_fig01)
P129 · p129_fig011548×1719px
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) — 9 Revision history
9 Revision history
P112 · p112_fig01All Packages in PDF
STM32F378RCY6TR (WLCSP-66(3.8x4.2)) — Figure 33. UFBGA100 - 100-pin, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array package recommended footprint
Figure 33. UFBGA100 - 100-pin, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball grid array package recommended footprint

Technical Specifications & Part Details (STM32F378RCY6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F378RCY6TR (WLCSP-66(3.8x4.2)) is a 66-pin embedded microcontroller unit (mcu) featuring a 4.20 × 3.80 × 0.57 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
72 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
27 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
4.20 × 3.80 × 0.57 mm (A1=0.19 mm)
Package family: WLCSP (WLCSP-66(3.8x4.2))
Pin Count & Lead PitchN / e
66 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol66 auto-grouped pins
OK
IPC-7351B Land Pattern67 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-66(3.8x4.2))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
4.20 × 3.80 mm
Height (A) & Pitch (e)IPC-7351B
A=0.57mm · e=0.40mm
Pad Size (W × L)Level B
0.22 × 0.22 mm
Pins / Total PadsTopology
66P / 67Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-66(3.8x4.2)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F378RCY6TR (WLCSP-66(3.8x4.2))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F378RCY6TR (WLCSP-66(3.8x4.2))?

Manufactured by ST, the STM32F378RCY6TR is housed in a WLCSP-66(3.8x4.2) package with 66 pins and a 0.40 mm lead pitch. Key pins include: A1 (PA14: Multiplexed I/O & Peripheral Pin PA14 (I2C, SWD/JTAG)), A2 (PA15: Multiplexed I/O & Peripheral Pin PA15 (SPI, I2C, PWM, SWD/JTAG)), A3 (PC11: Multiplexed I/O & Peripheral Pin PC11 (UART, SPI)), A4 (PD2: Multiplexed I/O & Peripheral Pin PD2 (General)), A5 (PB5: Multiplexed I/O & Peripheral Pin PB5 (SPI, I2C)), A6 (PB7: Multiplexed I/O & Peripheral Pin PB7 (I2C, PWM)).

What are the IPC-7351B PCB Footprint dimensions for STM32F378RCY6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F378RCY6TR (WLCSP-66(3.8x4.2)) has a nominal body envelope of 3.80 × 4.20 mm, pitch e = 0.40 mm, and 67 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F378RCY6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F378RCY6TR (ST, WLCSP-66(3.8x4.2)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (66 pins) & STM32F378 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: I2C, SWD/JTAG.
A2PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS, I2C1_SCL. Supported peripheral buses: SPI, I2C, PWM, SWD/JTAG.
A3PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI.
A4PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
A5PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, SPI3_MOSI. Supported peripheral buses: SPI, I2C.
A6PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: I2C, PWM.
A7PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, I2C, CAN.
A8VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B1PF7Digital_IOSignal terminal PF7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF7. Supported peripheral buses: I2C.
B2PF6Digital_IOSignal terminal PF6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSII2S1SD, I2C2_SCL. Supported peripheral buses: UART, SPI, I2C.
B3PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
B4PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI.
B5PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI3_MISO. Supported peripheral buses: UART, SPI.
B6PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: I2C, PWM.
B7PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, I2C, CAN.
B8PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
C1PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS, SPI1_NSS. Supported peripheral buses: UART, SPI, PWM.
C2PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, I2C, PWM.
C3PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, PWM.
C4PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, PWM, SWD/JTAG.
C5PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, SPI3_SCK. Supported peripheral buses: UART, SPI, SWD/JTAG.
C6VSS_1GND0V electrical ground return terminal (VSS_1) for internal core logic, I/O drivers, and analog sub-blocks.
C7BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
C8PC14 N- OSC32 I (2)_Digital_IOSignal terminal PC14 N- OSC32 I (2)_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14 N- OSC32 I (2)_. Supported peripheral buses: RTC/CLK.
D1PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, I2C, PWM.
D2PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, PWM.
D3PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, I2C, PWM.
D6VDD_1Power_InPrimary positive power supply input (VDD_1) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D7PF0 OSC IN -_Digital_IOSignal terminal PF0 OSC IN -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA. Supported peripheral buses: I2C, RTC/CLK.
D8PC15 U- OSC32 O T(2)_Digital_IOSignal terminal PC15 U- OSC32 O T(2)_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15 U- OSC32 O T(2)_. Supported peripheral buses: RTC/CLK.
E1PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, PWM.
E2PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: SPI, PWM.
E3PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI, PWM.
E6PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: ADC, PWM.
E7NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
E8PF1 - OSC_OUTDigital_IOSignal terminal PF1 - OSC_OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SCL. Supported peripheral buses: I2C, RTC/CLK.
F1PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, I2C, ADC, RTC/CLK.
F2PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI, I2C, ADC.
F3PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, I2C, ADC.
F6PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, ADC, PWM.
F7PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, ADC, PWM.
F8PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: ADC, PWM.
G1VREFSD+Digital_IOSignal terminal VREFSD+ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREFSD+. Supported peripheral buses: I2C.
G2NPORDigital_IOSignal terminal NPOR (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: NPOR. Supported peripheral buses: General.
G3PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
G4VSS_1GND0V electrical ground return terminal (VSS_1) for internal core logic, I/O drivers, and analog sub-blocks.
G5VSS_1GND0V electrical ground return terminal (VSS_1) for internal core logic, I/O drivers, and analog sub-blocks.
G6VREF+AnalogSignal terminal VREF+ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: DAC.
G7VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
G8VSSA/VREF -GND0V electrical ground return terminal (VSSA/VREF -) for internal core logic, I/O drivers, and analog sub-blocks.
H1VDDSDPower_InPrimary positive power supply input (VDDSD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
H2PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: I2C, ADC.
H3PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, I2C, ADC.
H4PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART, ADC.
H5PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC, DAC, PWM.
H6PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_MOSII2S3SD. Supported peripheral buses: UART, SPI, ADC.
H7PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI, ADC, RTC/CLK.
H8PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
J1VSSSD/ VREFSD -GND0V electrical ground return terminal (VSSSD/ VREFSD -) for internal core logic, I/O drivers, and analog sub-blocks.
J2PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: I2C, ADC.
J3PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: I2C, ADC.
J4PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART, ADC.
J5PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI, ADC, DAC, PWM.
J6PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, ADC, DAC.
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