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ATMEGA169PA-MCHR (QFN-64(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

ATMEGA169PA-MCHR

MICROCHIPID: C2055295QFN-64(7x7) · 65 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · ATMEGA169PA-MCHR (QFN-64(7x7))65EPA1PE0A2PE1A3PE3A4PE5A5PE7A6PB1A7PB3A8PB4A9PB7A10PG3A11RESET#A12GNDA13XTAL1(TOSC1)A14PD1(SEG21)A15PD3(SEG19)A16PD5(SEG17)A17PD6(SEG16)A18PG1(SEG13)A19PC0(SEG12)A20PC2(SEG10)A21PC4(SEG8)A22PC6(SEG6)A23PG2(SEG4)A24PA6(SEG2)A25PA5(SEG1)A26PA2(COM2)A27PA1(COM1)A28VCCA29PF7A30PF5A31PF3A32PF1B30AVCCB29PF0B28PF2B27PF4B26PF6B25GNDB24PA0(COM0)B23PA3(COM3)B22PA4(SEG0)B21PA7(SEG3)B20PC7(SEG5)B19PC5(SEG7)B18PC3(SEG9)B17PC1(SEG11)B16PG0(SEG14)B15PD7(SEG15)B14PD4(SEG18)B13PD2(SEG20)B12PD0(SEG22)B11XTAL2(TOSC2)B10VCCB9PG4B8PB6B7PB5B6PB2B5PB0B4PE6B3PE4B2PE2B1VLCDCAPA34GNDA33AREFGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.848.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3mm
2. 2D FOOTPRINT
A1A2A3A4A5A6A7A8A18A19A20A21A22A23A24A25A34A33A32A31A30A29A28A27A26A17A16A15A14A13A12A11A10A9B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15B16B17B18B19B20B21B22B23B24B25B26B27B28B29B3065E=7.00mm · Pitch e=0.65mmD=7.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (65/65)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
65EPGNDExposed Thermal & Ground Pad (EP)
A1PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
A2PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
A3PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
A4PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
A5PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
A6PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
A7PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
A8PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
A9PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
A10PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
A11RESET#ISystem Enable & Hardware Reset (RESET#)
A12GNDGNDGround Reference Pin (GND)
A13XTAL1(TOSC1)I/OMultiplexed I/O & Peripheral Pin XTAL1(TOSC1) (RTC/CLK)
A14PD1(SEG21)I/OMultiplexed I/O & Peripheral Pin PD1(SEG21) (General)
A15PD3(SEG19)I/OMultiplexed I/O & Peripheral Pin PD3(SEG19) (General)
A16PD5(SEG17)I/OMultiplexed I/O & Peripheral Pin PD5(SEG17) (General)
A17PD6(SEG16)I/OMultiplexed I/O & Peripheral Pin PD6(SEG16) (General)
A18PG1(SEG13)I/OMultiplexed I/O & Peripheral Pin PG1(SEG13) (General)
A19PC0(SEG12)I/OMultiplexed I/O & Peripheral Pin PC0(SEG12) (General)
A20PC2(SEG10)I/OMultiplexed I/O & Peripheral Pin PC2(SEG10) (General)
A21PC4(SEG8)I/OMultiplexed I/O & Peripheral Pin PC4(SEG8) (General)
A22PC6(SEG6)I/OMultiplexed I/O & Peripheral Pin PC6(SEG6) (General)
A23PG2(SEG4)I/OMultiplexed I/O & Peripheral Pin PG2(SEG4) (General)
A24PA6(SEG2)I/OMultiplexed I/O & Peripheral Pin PA6(SEG2) (General)
A25PA5(SEG1)I/OMultiplexed I/O & Peripheral Pin PA5(SEG1) (General)
A26PA2(COM2)I/OMultiplexed I/O & Peripheral Pin PA2(COM2) (General)
A27PA1(COM1)I/OMultiplexed I/O & Peripheral Pin PA1(COM1) (General)
A28VCCPowerPower Supply Input (VCC — 1.8V ~ 5.5V VCC)
A29PF7I/OMultiplexed I/O & Peripheral Pin PF7 (General)
A30PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
A31PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
A32PF1I/OMultiplexed I/O & Peripheral Pin PF1 (General)
A33AREFI/OMultiplexed I/O & Peripheral Pin AREF (ADC)
A34GNDGNDGround Reference Pin (GND)
B1VLCDCAPI/OMultiplexed I/O & Peripheral Pin VLCDCAP (General)
B2PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
B3PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
B4PE6I/OMultiplexed I/O & Peripheral Pin PE6 (General)
B5PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
B6PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
B7PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
B8PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
B9PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
B10VCCPowerPower Supply Input (VCC — 1.8V ~ 5.5V VCC)
B11XTAL2(TOSC2)I/OMultiplexed I/O & Peripheral Pin XTAL2(TOSC2) (RTC/CLK)
B12PD0(SEG22)I/OMultiplexed I/O & Peripheral Pin PD0(SEG22) (General)
B13PD2(SEG20)I/OMultiplexed I/O & Peripheral Pin PD2(SEG20) (General)
B14PD4(SEG18)I/OMultiplexed I/O & Peripheral Pin PD4(SEG18) (General)
B15PD7(SEG15)I/OMultiplexed I/O & Peripheral Pin PD7(SEG15) (General)
B16PG0(SEG14)I/OMultiplexed I/O & Peripheral Pin PG0(SEG14) (General)
B17PC1(SEG11)I/OMultiplexed I/O & Peripheral Pin PC1(SEG11) (General)
B18PC3(SEG9)I/OMultiplexed I/O & Peripheral Pin PC3(SEG9) (General)
B19PC5(SEG7)I/OMultiplexed I/O & Peripheral Pin PC5(SEG7) (General)
B20PC7(SEG5)I/OMultiplexed I/O & Peripheral Pin PC7(SEG5) (General)
B21PA7(SEG3)I/OMultiplexed I/O & Peripheral Pin PA7(SEG3) (General)
B22PA4(SEG0)I/OMultiplexed I/O & Peripheral Pin PA4(SEG0) (General)
B23PA3(COM3)I/OMultiplexed I/O & Peripheral Pin PA3(COM3) (General)
B24PA0(COM0)I/OMultiplexed I/O & Peripheral Pin PA0(COM0) (General)
B25GNDGNDGround Reference Pin (GND)
B26PF6I/OMultiplexed I/O & Peripheral Pin PF6 (General)
B27PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
B28PF2I/OMultiplexed I/O & Peripheral Pin PF2 (General)
B29PF0I/OMultiplexed I/O & Peripheral Pin PF0 (General)
B30AVCCPowerPower Supply Input (AVCC — 1.8V ~ 5.5V VCC)
PIN 65 EP
GND
Exposed Thermal & Ground Pad (EP)
Design note: Bottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 8 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: ATMEGA169PA-MCHR (MICROCHIP · QFN-64(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
ATMEGA169PA-MCHR (QFN-64(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
ATMEGA169PA-MCHR (QFN-64(7x7)) - 2. Standard Pinout (Top View)
True package pinout (65 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
ATMEGA169PA-MCHR (QFN-64(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
ATMEGA169PA-MCHR (QFN-64(7x7)) - 4. Package Dimensions (D×E×A)
QFN-64(7x7) · 7.00×7.00mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
ATMEGA169PA-MCHR (QFN-64(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (65 Pads)Expand ›
6. Application SchematicSCHEMATIC
ATMEGA169PA-MCHR (QFN-64(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (8 figures · Page 1/1)
Showing 1–8 of 8 uncropped original figures for ATMEGA169PA
P5 · p05_fig01EXACT PACKAGE
ATMEGA169PA-MCHR (QFN-64(7x7)) — Figure 1-3. Pinout Atmel ATmega169A/ATmega169PA.
Figure 1-3. Pinout Atmel ATmega169A/ATmega169PA.
P3 · p03_fig011994×1996px
ATMEGA169PA-MCHR (QFN-64(7x7)) — Figure 1-1. Pinout Atmel ATmega169A/ATmega169PA/ATmega329A/ATmega329PA/ATmega649A/ATmega649P.
Figure 1-1. Pinout Atmel ATmega169A/ATmega169PA/ATmega329A/ATmega329PA/ATmega649A/ATmega649P.
P4 · p04_fig011946×2052px
ATMEGA169PA-MCHR (QFN-64(7x7)) — Figure 1-2. Pinout Atmel ATmega3290A/ATmega3290PA/ATmega6490A/ATmega6490P.
Figure 1-2. Pinout Atmel ATmega3290A/ATmega3290PA/ATmega6490A/ATmega6490P.
P4 · p04_fig01P4
ATMEGA169PA-MCHR (QFN-64(7x7)) — Datasheet Page 4 (p04_fig01)
Datasheet Page 4 (p04_fig01)
P5 · p05_fig01P5
ATMEGA169PA-MCHR (QFN-64(7x7)) — Datasheet Page 5 (p05_fig01)
Datasheet Page 5 (p05_fig01)
P30 · p30_fig012035×2372px
ATMEGA169PA-MCHR (QFN-64(7x7)) — 30 ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET SUMMARY]
30 ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET SUMMARY]
P31 · p31_fig012027×2252px
ATMEGA169PA-MCHR (QFN-64(7x7)) — 31 ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET SUMMARY]
31 ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET SUMMARY]
P32 · p32_fig012033×2250px
ATMEGA169PA-MCHR (QFN-64(7x7)) — 32 ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET SUMMARY]
32 ATmega169A/PA/329A/PA/649A/P/3290A/PA/6490A/P [DATASHEET SUMMARY]

Technical Specifications & Part Details (ATMEGA169PA-MCHR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:ATMEGA169PA-MCHR (QFN-64(7x7)) is a 65-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 1.35 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 1.8V ~ 5.5V supply operation across -40°C to 85°C with integrated UART, SPI, I2C, ADC, PWM, JTAG / SWD, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to 85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
20MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
65 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 1.35 mm (A1=0.30 mm)
Package family: BGA (QFN-64(7x7))
Pin Count & Lead PitchN / e
65 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, ADC, PWM, JTAG / SWD, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol65 auto-grouped pins
OK
IPC-7351B Land Pattern65 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (QFN-64(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.35mm · e=0.65mm
Pad Size (W × L)Level B
0.25 × 0.25 mm
Pins / Total PadsTopology
65P / 65Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
QFN-64(7x7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — ATMEGA169PA-MCHR (QFN-64(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ATMEGA169PA-MCHR (QFN-64(7x7))?

Manufactured by MICROCHIP, the ATMEGA169PA-MCHR is housed in a QFN-64(7x7) package with 65 pins and a 0.65 mm lead pitch. Key pins include: 65 (EP: Exposed Thermal & Ground Pad (EP)), A1 (PE0: Multiplexed I/O & Peripheral Pin PE0 (General)), A2 (PE1: Multiplexed I/O & Peripheral Pin PE1 (General)), A3 (PE3: Multiplexed I/O & Peripheral Pin PE3 (General)), A4 (PE5: Multiplexed I/O & Peripheral Pin PE5 (General)), A5 (PE7: Multiplexed I/O & Peripheral Pin PE7 (General)).

What are the IPC-7351B PCB Footprint dimensions for ATMEGA169PA-MCHR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATMEGA169PA-MCHR (QFN-64(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.65 mm, and 65 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATMEGA169PA-MCHR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATMEGA169PA-MCHR (MICROCHIP, QFN-64(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (65 pins) & ATMEGA169PA Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
65EPGNDBottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
A1PE0Digital_IOSignal terminal PE0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
A2PE1Digital_IOSignal terminal PE1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
A3PE3Digital_IOSignal terminal PE3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
A4PE5Digital_IOSignal terminal PE5 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
A5PE7Digital_IOSignal terminal PE7 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General.
A6PB1Digital_IOSignal terminal PB1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General.
A7PB3Digital_IOSignal terminal PB3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
A8PB4Digital_IOSignal terminal PB4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
A9PB7Digital_IOSignal terminal PB7 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
A10PG3Digital_IOSignal terminal PG3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PG3. Supported peripheral buses: General.
A11RESET#Digital_IOActive-low hardware reset terminal (RESET#): pulling this pin Low resets the processor core and peripherals.
A12GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
A13XTAL1(TOSC1)Digital_IOSignal terminal XTAL1(TOSC1) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: XTAL1(TOSC1). Supported peripheral buses: RTC/CLK.
A14PD1(SEG21)Digital_IOSignal terminal PD1(SEG21) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD1(SEG21). Supported peripheral buses: General.
A15PD3(SEG19)Digital_IOSignal terminal PD3(SEG19) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD3(SEG19). Supported peripheral buses: General.
A16PD5(SEG17)Digital_IOSignal terminal PD5(SEG17) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD5(SEG17). Supported peripheral buses: General.
A17PD6(SEG16)Digital_IOSignal terminal PD6(SEG16) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD6(SEG16). Supported peripheral buses: General.
A18PG1(SEG13)Digital_IOSignal terminal PG1(SEG13) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PG1(SEG13). Supported peripheral buses: General.
A19PC0(SEG12)Digital_IOSignal terminal PC0(SEG12) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC0(SEG12). Supported peripheral buses: General.
A20PC2(SEG10)Digital_IOSignal terminal PC2(SEG10) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC2(SEG10). Supported peripheral buses: General.
A21PC4(SEG8)Digital_IOSignal terminal PC4(SEG8) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC4(SEG8). Supported peripheral buses: General.
A22PC6(SEG6)Digital_IOSignal terminal PC6(SEG6) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC6(SEG6). Supported peripheral buses: General.
A23PG2(SEG4)Digital_IOSignal terminal PG2(SEG4) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PG2(SEG4). Supported peripheral buses: General.
A24PA6(SEG2)Digital_IOSignal terminal PA6(SEG2) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA6(SEG2). Supported peripheral buses: General.
A25PA5(SEG1)Digital_IOSignal terminal PA5(SEG1) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA5(SEG1). Supported peripheral buses: General.
A26PA2(COM2)Digital_IOSignal terminal PA2(COM2) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA2(COM2). Supported peripheral buses: General.
A27PA1(COM1)Digital_IOSignal terminal PA1(COM1) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA1(COM1). Supported peripheral buses: General.
A28VCCPower_InPrimary positive power supply input (VCC) operating in the 1.8V ~ 5.5V VCC domain (Max rating: 6.0V).
A29PF7Digital_IOSignal terminal PF7 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF7. Supported peripheral buses: General.
A30PF5Digital_IOSignal terminal PF5 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF5. Supported peripheral buses: General.
A31PF3Digital_IOSignal terminal PF3 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF3. Supported peripheral buses: General.
A32PF1Digital_IOSignal terminal PF1 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.
A33AREFDigital_IOSignal terminal AREF (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: AREF. Supported peripheral buses: ADC.
A34GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
B1VLCDCAPDigital_IOSignal terminal VLCDCAP (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: VLCDCAP. Supported peripheral buses: General.
B2PE2Digital_IOSignal terminal PE2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
B3PE4Digital_IOSignal terminal PE4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
B4PE6Digital_IOSignal terminal PE6 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General.
B5PB0Digital_IOSignal terminal PB0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PB0. Supported peripheral buses: General.
B6PB2Digital_IOSignal terminal PB2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General.
B7PB5Digital_IOSignal terminal PB5 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
B8PB6Digital_IOSignal terminal PB6 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
B9PG4Digital_IOSignal terminal PG4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PG4. Supported peripheral buses: General.
B10VCCPower_InPrimary positive power supply input (VCC) operating in the 1.8V ~ 5.5V VCC domain (Max rating: 6.0V).
B11XTAL2(TOSC2)Digital_IOSignal terminal XTAL2(TOSC2) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: XTAL2(TOSC2). Supported peripheral buses: RTC/CLK.
B12PD0(SEG22)Digital_IOSignal terminal PD0(SEG22) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD0(SEG22). Supported peripheral buses: General.
B13PD2(SEG20)Digital_IOSignal terminal PD2(SEG20) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD2(SEG20). Supported peripheral buses: General.
B14PD4(SEG18)Digital_IOSignal terminal PD4(SEG18) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD4(SEG18). Supported peripheral buses: General.
B15PD7(SEG15)Digital_IOSignal terminal PD7(SEG15) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PD7(SEG15). Supported peripheral buses: General.
B16PG0(SEG14)Digital_IOSignal terminal PG0(SEG14) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PG0(SEG14). Supported peripheral buses: General.
B17PC1(SEG11)Digital_IOSignal terminal PC1(SEG11) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC1(SEG11). Supported peripheral buses: General.
B18PC3(SEG9)Digital_IOSignal terminal PC3(SEG9) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC3(SEG9). Supported peripheral buses: General.
B19PC5(SEG7)Digital_IOSignal terminal PC5(SEG7) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC5(SEG7). Supported peripheral buses: General.
B20PC7(SEG5)Digital_IOSignal terminal PC7(SEG5) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PC7(SEG5). Supported peripheral buses: General.
B21PA7(SEG3)Digital_IOSignal terminal PA7(SEG3) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA7(SEG3). Supported peripheral buses: General.
B22PA4(SEG0)Digital_IOSignal terminal PA4(SEG0) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA4(SEG0). Supported peripheral buses: General.
B23PA3(COM3)Digital_IOSignal terminal PA3(COM3) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA3(COM3). Supported peripheral buses: General.
B24PA0(COM0)Digital_IOSignal terminal PA0(COM0) (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PA0(COM0). Supported peripheral buses: General.
B25GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
B26PF6Digital_IOSignal terminal PF6 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF6. Supported peripheral buses: General.
B27PF4Digital_IOSignal terminal PF4 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF4. Supported peripheral buses: General.
B28PF2Digital_IOSignal terminal PF2 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF2. Supported peripheral buses: General.
B29PF0Digital_IOSignal terminal PF0 (I/O, 1.8V ~ 5.5V VCC domain). Multiplexed alternate functions: PF0. Supported peripheral buses: General.
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