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STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32L451RCY6TR

STID: C2055205WLCSP-64(3.4x3.7) · 64 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32L451RCY6TR (WLCSP-64(3.4x3.7))A1VDDA2PA15 (JTDI)A3PC12A4PB4 (NJTRST)A5PB7A6PB8A7VSSA8VDDB1VSSB2VDDB3PC11B4PB3 (JTDO/ TB5PB6B6PH3 - BOOT0 B7VBATB8PC13C1PA10C2PA13 (JTMS/ C3PA14 (JTCK/ C4PD2C5PB5C6PB9C7IOC7C8IOC8D1PA9D2PA11D3PA12D4PC10D5PC1D6PC2D7PC0D8PH0 - OSC_INH8PA0H7VDDH6PA6H5PB0H4PB10H3PB11H2VSSH1VDDG8VSSA/ VREF -G7PA2G6PA4G5PC5G4PB2G3PB12G2PB13G1PB14F8NRSTF7VDDA/ VREF+F6PA3F5PA5F4PB1F3PC8F2PC6F1PB15E8PH1 - OSC_ OE7PC3E6PA1E5PA7E4PC4E3PA8E2PC9E1PC7Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7mm
2. 2D FOOTPRINT
A1A2A3A4A5A6A7A8B1B2B3B4B5B6B7B8C1C2C3C4C5C6C7C8D1D2D3D4D5D6D7D8E1E2E3E4E5E6E7E8F1F2F3F4F5F6F7F8G1G2G3G4G5G6G7G8H1H2H3H4H5H6H7H8E=3.40mm · Pitch e=0.40mmD=3.70mm-3-2-1012343210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 3.40mm × 3.70mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A2PA15 (JTDI)I/OMultiplexed I/O & Peripheral Pin PA15 (JTDI) (UART, SPI, SWD/JTAG)
A3PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
A4PB4 (NJTRST)I/OMultiplexed I/O & Peripheral Pin PB4 (NJTRST) (UART, SPI, I2C, SWD/JTAG)
A5PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C)
A6PB8I/OMultiplexed I/O & Peripheral Pin PB8 (I2C)
A7VSSGNDGround Reference Pin (VSS)
A8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
B1VSSGNDGround Reference Pin (VSS)
B2VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
B3PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI)
B4PB3 (JTDO/ TRACE SWO)I/OMultiplexed I/O & Peripheral Pin PB3 (JTDO/ TRACE SWO) (UART, SPI, PWM, SWD/JTAG)
B5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (I2C, CAN)
B6PH3 - BOOT0 (BOOT0)I/OMultiplexed I/O & Peripheral Pin PH3 - BOOT0 (BOOT0) (General)
B7VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
B8PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
C1PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART, PWM)
C2PA13 (JTMS/ SWDIO)I/OMultiplexed I/O & Peripheral Pin PA13 (JTMS/ SWDIO) (SWD/JTAG)
C3PA14 (JTCK/ SWCLK)I/OMultiplexed I/O & Peripheral Pin PA14 (JTCK/ SWCLK) (I2C, SWD/JTAG)
C4PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
C5PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI, CAN)
C6PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI)
C7IOC7I/OGeneral Purpose Digital I/O Pin IOC7
C8IOC8I/OGeneral Purpose Digital I/O Pin IOC8
D1PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, PWM)
D2PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
D3PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART, CAN)
D4PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
D5PC1I/OMultiplexed I/O & Peripheral Pin PC1 (I2C, ADC)
D6PC2I/OMultiplexed I/O & Peripheral Pin PC2 (ADC)
D7PC0I/OMultiplexed I/O & Peripheral Pin PC0 (I2C, ADC)
D8PH0 - OSC_IN (PH0)I/OMultiplexed I/O & Peripheral Pin PH0 - OSC_IN (PH0) (RTC/CLK)
E1PC7I/OMultiplexed I/O & Peripheral Pin PC7 (PWM)
E2PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
E3PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, SPI, RTC/CLK)
E4PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
E5PA7I/OMultiplexed I/O & Peripheral Pin PA7 (I2C, ADC, PWM)
E6PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, PWM)
E7PC3I/OMultiplexed I/O & Peripheral Pin PC3 (ADC)
E8PH1 - OSC_ OUT (PH1)I/OMultiplexed I/O & Peripheral Pin PH1 - OSC_ OUT (PH1) (RTC/CLK)
F1PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, RTC/CLK)
F2PC6I/OMultiplexed I/O & Peripheral Pin PC6 (PWM)
F3PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
F4PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
F5PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, PWM)
F6PA3I/OMultiplexed I/O & Peripheral Pin PA3 (PWM)
F7VDDA/ VREF+PowerPower Supply Input (VDDA/ VREF+ — 3.3V VDD (Max 4.0V))
F8NRSTISystem Enable & Hardware Reset (NRST)
G1PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
G2PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
G3PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, I2C)
G4PB2I/OMultiplexed I/O & Peripheral Pin PB2 (I2C, RTC/CLK)
G5PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
G6PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC)
G7PA2I/OMultiplexed I/O & Peripheral Pin PA2 (ADC, PWM)
G8VSSA/ VREF -GNDGround Reference Pin (VSSA/ VREF -)
H1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H2VSSGNDGround Reference Pin (VSS)
H3PB11I/OMultiplexed I/O & Peripheral Pin PB11 (I2C, PWM)
H4PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, I2C, PWM)
H5PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, SPI, ADC, PWM)
H6PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC)
H7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H8PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM)
PIN A1 VDD
Power
Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 13 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32L451RCY6TR (ST · WLCSP-64(3.4x3.7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) - 2. Standard Pinout (Top View)
True package pinout (64 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) - 4. Package Dimensions (D×E×A)
WLCSP-64(3.4x3.7) · 3.40×3.70mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (64 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (13 figures · Page 1/2)
Showing 1–12 of 13 uncropped original figures for STM32L451
P58 · p58_fig01EXACT PACKAGE
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — Figure 7. STM32L451Vx UFBGA100 ballout(1)
Figure 7. STM32L451Vx UFBGA100 ballout(1)
P58 · p58_fig02EXACT PACKAGE
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — K
K
P59 · p59_fig01EXACT PACKAGE
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — Figure 9. STM32L451Rx UFBGA64 ballout(1) 1 2 3 4 5 6 7 8 PC14- OSC32_IN PC13 PB9 PB4 PB3 PA15 PA14 PA13 B C D
Figure 9. STM32L451Rx UFBGA64 ballout(1) 1 2 3 4 5 6 7 8 PC14- OSC32_IN PC13 PB9 PB4 PB3 PA15 PA14 PA13 B C D
P59 · p59_fig02EXACT PACKAGE
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — F
F
P193 · p193_fig01EXACT PACKAGE
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — Figure 54. WLCSP64 - Recommended footprint
Figure 54. WLCSP64 - Recommended footprint
P1 · p01_fig01881×429px
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — • RTC with HW calendar, alarms and calibration
• RTC with HW calendar, alarms and calibration
P59 · p59_fig01P59
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — Datasheet Page 59 (p59_fig01)
Datasheet Page 59 (p59_fig01)
P88 · p88_fig011546×1275px
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — Figure 16. Power supply scheme
Figure 16. Power supply scheme
P88 · p88_fig01P88
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — Datasheet Page 88 (p88_fig01)
Datasheet Page 88 (p88_fig01)
P91 · p91_fig011875×2539px
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — STM32L451xx Electrical characteristics
STM32L451xx Electrical characteristics
P184 · p184_fig011546×1353px
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — Figure 45. UFBGA100 - Recommended footprint
Figure 45. UFBGA100 - Recommended footprint
P190 · p190_fig011546×1432px
STM32L451RCY6TR (WLCSP-64(3.4x3.7)) — Figure 51. UFBGA64 - Recommended footprint
Figure 51. UFBGA64 - Recommended footprint
Page 1 / 2 (13 extracted figures)

Technical Specifications & Part Details (STM32L451RCY6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32L451RCY6TR (WLCSP-64(3.4x3.7)) is a 64-pin embedded microcontroller unit (mcu) featuring a 3.70 × 3.40 × 0.56 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated UART, SPI, I2C, ADC, DAC, JTAG / SWD, IrDA, CAN, PWM, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
80 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
48 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
3.70 × 3.40 × 0.56 mm (A1=0.17 mm)
Package family: WLCSP (WLCSP-64(3.4x3.7))
Pin Count & Lead PitchN / e
64 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, ADC, DAC, JTAG / SWD, IrDA, CAN, PWM, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PH3 - BOOT0 (BOOT0)): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol64 auto-grouped pins
OK
IPC-7351B Land Pattern64 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-64(3.4x3.7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
3.70 × 3.40 mm
Height (A) & Pitch (e)IPC-7351B
A=0.56mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.20 mm
Pins / Total PadsTopology
64P / 64Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-64(3.4x3.7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32L451RCY6TR (WLCSP-64(3.4x3.7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32L451RCY6TR (WLCSP-64(3.4x3.7))?

Manufactured by ST, the STM32L451RCY6TR is housed in a WLCSP-64(3.4x3.7) package with 64 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A2 (PA15 (JTDI): Multiplexed I/O & Peripheral Pin PA15 (JTDI) (UART, SPI, SWD/JTAG)), A3 (PC12: Multiplexed I/O & Peripheral Pin PC12 (UART, SPI)), A4 (PB4 (NJTRST): Multiplexed I/O & Peripheral Pin PB4 (NJTRST) (UART, SPI, I2C, SWD/JTAG)), A5 (PB7: Multiplexed I/O & Peripheral Pin PB7 (UART, I2C)), A6 (PB8: Multiplexed I/O & Peripheral Pin PB8 (I2C)).

What are the IPC-7351B PCB Footprint dimensions for STM32L451RCY6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32L451RCY6TR (WLCSP-64(3.4x3.7)) has a nominal body envelope of 3.40 × 3.70 mm, pitch e = 0.40 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32L451RCY6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32L451RCY6TR (ST, WLCSP-64(3.4x3.7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & STM32L451 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A2PA15 (JTDI)Digital_IOSignal terminal PA15 (JTDI) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSSSPI3NSS. Supported peripheral buses: UART, SPI, SWD/JTAG.
A3PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI.
A4PB4 (NJTRST)Digital_IOSignal terminal PB4 (NJTRST) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI, I2C, SWD/JTAG.
A5PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART, I2C.
A6PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: I2C.
A7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A8VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B2VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B3PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISOUSART3RX. Supported peripheral buses: UART, SPI.
B4PB3 (JTDO/ TRACE SWO)Digital_IOSignal terminal PB3 (JTDO/ TRACE SWO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI, PWM, SWD/JTAG.
B5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: I2C, CAN.
B6PH3 - BOOT0 (BOOT0)Digital_IOSignal terminal PH3 - BOOT0 (BOOT0) (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH3 - BOOT0 (BOOT0). Supported peripheral buses: General.
B7VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B8PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
C1PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: UART, PWM.
C2PA13 (JTMS/ SWDIO)Digital_IOSignal terminal PA13 (JTMS/ SWDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13 (JTMS/ SWDIO). Supported peripheral buses: SWD/JTAG.
C3PA14 (JTCK/ SWCLK)Digital_IOSignal terminal PA14 (JTCK/ SWCLK) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14 (JTCK/ SWCLK). Supported peripheral buses: I2C, SWD/JTAG.
C4PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
C5PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSISPI3MOSI. Supported peripheral buses: UART, SPI, CAN.
C6PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSSCAN1TX. Supported peripheral buses: SPI.
C7IOC7Digital_IOGeneral Purpose Digital I/O Pin IOC7
C8IOC8Digital_IOGeneral Purpose Digital I/O Pin IOC8
D1PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: UART, PWM.
D2PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISOCOMP1OUT. Supported peripheral buses: UART, SPI, PWM.
D3PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: UART, CAN.
D4PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
D5PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: I2C, ADC.
D6PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: ADC.
D7PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: I2C, ADC.
D8PH0 - OSC_IN (PH0)Digital_IOSignal terminal PH0 - OSC_IN (PH0) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0 - OSC_IN (PH0). Supported peripheral buses: RTC/CLK.
E1PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: PWM.
E2PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: General.
E3PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: UART, SPI, RTC/CLK.
E4PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART, ADC.
E5PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: I2C, ADC, PWM.
E6PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, PWM.
E7PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: ADC.
E8PH1 - OSC_ OUT (PH1)Digital_IOSignal terminal PH1 - OSC_ OUT (PH1) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH1 - OSC_ OUT (PH1). Supported peripheral buses: RTC/CLK.
F1PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, RTC/CLK.
F2PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: PWM.
F3PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
F4PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, ADC, PWM.
F5PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC, PWM.
F6PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: PWM.
F7VDDA/ VREF+Power_InPrimary positive power supply input (VDDA/ VREF+) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
F8NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
G1PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI, PWM.
G2PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, PWM.
G3PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: UART, I2C.
G4PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SMBA. Supported peripheral buses: I2C, RTC/CLK.
G5PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART, ADC.
G6PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSSSPI3NSS. Supported peripheral buses: UART, SPI, ADC.
G7PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: ADC, PWM.
G8VSSA/ VREF -GND0V electrical ground return terminal (VSSA/ VREF -) for internal core logic, I/O drivers, and analog sub-blocks.
H1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
H2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
H3PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: I2C, PWM.
H4PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: UART, SPI, I2C, PWM.
H5PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, ADC, PWM.
H6PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISOCOMP1OUT. Supported peripheral buses: UART, SPI, ADC.
H7VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
H8PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM.
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