DSPIC33CK128MC103-I/M5 (UQFN-36(5x5)) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of DSPIC33CK128MC103-I/M5 (UQFN-36(5x5))?

Manufactured by MICROCHIP, the DSPIC33CK128MC103-I/M5 is housed in a UQFN-36(5x5) package with 37 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 3V to 3.6V. Key pins include: 1 (RPntiedtoUART1Transmit: Multiplexed I/O & Peripheral Pin RPntiedtoUART1Transmit (General)), 2 (IO2: General Purpose Digital I/O Pin IO2), 3 (RPntiedtoUART2Transmit: Multiplexed I/O & Peripheral Pin RPntiedtoUART2Transmit (General)), 4 (NC: No Connect (Leave Floating)), 5 (IO2: GPIO2 / RTC_GPIO2 / TOUCH2 / ADC1_CH1), 6 (IO3: GPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)).

Q: What are the IPC-7351B PCB Footprint dimensions for DSPIC33CK128MC103-I/M5?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), DSPIC33CK128MC103-I/M5 (UQFN-36(5x5)) has a nominal body envelope of 5.00 × 5.00 mm, pitch e = 0.50 mm, and 37 copper pads plus a central exposed thermal pad (EPAD) of 3.70 × 3.70 mm with a 60% IPC-7525 windowed solder paste grid.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for DSPIC33CK128MC103-I/M5?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for DSPIC33CK128MC103-I/M5 (MICROCHIP, UQFN-36(5x5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 5.00mm × 5.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (37/37)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	RPntiedtoUART1Transmit	I/O	Multiplexed I/O & Peripheral Pin RPntiedtoUART1Transmit (General)
2	IO2	I/O	General Purpose Digital I/O Pin IO2
3	RPntiedtoUART2Transmit	I/O	Multiplexed I/O & Peripheral Pin RPntiedtoUART2Transmit (General)
4	NC	NC	No Connect (Leave Floating)
5	IO2	I/O	GPIO2 / RTC_GPIO2 / TOUCH2 / ADC1_CH1
6	IO3	I/O	GPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)
7	NC	NC	No Connect (Leave Floating)
8	IO0	I/O	GPIO0 / RTC_GPIO0 (Chip Boot Mode Strapping Pin)
9	IO4	I/O	GPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3
10	IO5	I/O	GPIO5 / RTC_GPIO5 / TOUCH5 / ADC1_CH4
11	AVSS	GND	Ground Reference Pin (AVSS)
12	IO7	I/O	GPIO7 / RTC_GPIO7 / TOUCH7 / ADC1_CH6
13	IO15	I/O	GPIO15 / RTC_GPIO15 / U0RTS / ADC2_CH4 / XTAL_32K_P
14	IO16	I/O	GPIO16 / RTC_GPIO16 / U0CTS / ADC2_CH5 / XTAL_32K_N
15	RPntiedtoSCCP1Output	I/O	Multiplexed I/O & Peripheral Pin RPntiedtoSCCP1Output (General)
16	RPntiedtoSCCP2Output	I/O	Multiplexed I/O & Peripheral Pin RPntiedtoSCCP2Output (General)
17	RPntiedtoSCCP3Output	I/O	Multiplexed I/O & Peripheral Pin RPntiedtoSCCP3Output (General)
18	RPntiedtoSCCP4Output	I/O	Multiplexed I/O & Peripheral Pin RPntiedtoSCCP4Output (General)
19	IO20	I/O	GPIO20 / RTC_GPIO20 / USB_D+ / U1CTS / ADC2_CH9
20	IO9	I/O	GPIO9 / RTC_GPIO9 / TOUCH9 / ADC1_CH8 / FSPIHD
21	RPntiedtoCAN1Output	I/O	Multiplexed I/O & Peripheral Pin RPntiedtoCAN1Output (CAN)
22	VSS	GND	Ground Reference Pin (VSS)
23	IO12	I/O	GPIO12 / RTC_GPIO12 / TOUCH12 / ADC2_CH1 / FSPICLK
24	IO13	I/O	GPIO13 / RTC_GPIO13 / TOUCH13 / ADC2_CH2 / FSPIQ
25	PGC3/RP38/RB6	I/O	Multiplexed I/O & Peripheral Pin PGC3/RP38/RB6 (General)
26	TDO/AN2/RP39/RB7	I/O	Multiplexed I/O & Peripheral Pin TDO/AN2/RP39/RB7 (General)
27	RPntiedtoUART3Transmit	I/O	Multiplexed I/O & Peripheral Pin RPntiedtoUART3Transmit (General)
28	IO33	I/O	GPIO33 / FSPIHD / SUBSPIHD / SPIIO4
29	RP52/RC4	I/O	Multiplexed I/O & Peripheral Pin RP52/RC4 (General)
30	RP53/RC5	I/O	Multiplexed I/O & Peripheral Pin RP53/RC5 (General)
31	VSS	GND	Ground Reference Pin (VSS)
32	VDD	Power	Power Supply Input (VDD — 3V to 3.6V)
33	TMS/RP42/PWM3H/RB10	I/O	Multiplexed I/O & Peripheral Pin TMS/RP42/PWM3H/RB10 (PWM)
34	RPntiedtoPWM4HOutput	I/O	Multiplexed I/O & Peripheral Pin RPntiedtoPWM4HOutput (PWM)
35	RPntiedtoPWM4LOutput	I/O	Multiplexed I/O & Peripheral Pin RPntiedtoPWM4LOutput (PWM)
36	IO36	I/O	General Purpose Digital I/O Pin IO36
37	IO37	I/O	General Purpose Digital I/O Pin IO37

PIN 1 RPntiedtoUART1Transmit

I/O

Multiplexed I/O & Peripheral Pin RPntiedtoUART1Transmit (General)

Design note: U1TX

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

DSPIC33CK128MC103-I/M5 (UQFN-36(5x5)) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

DSPIC33CK128MC103-I/M5 (UQFN-36(5x5)) - 2. Standard Pinout (Top View)

True package pinout (37 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

DSPIC33CK128MC103-I/M5 (UQFN-36(5x5)) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

DSPIC33CK128MC103-I/M5 (UQFN-36(5x5)) - 4. Package Dimensions (D×E×A)

UQFN-36(5x5) · 5.00×5.00mm · Pitch 0.50mmExpand ›

5. Recommended Land PatternLAND PATTERN

DSPIC33CK128MC103-I/M5 (UQFN-36(5x5)) - 5. Recommended Land Pattern

IPC-7351B Footprint (37 Pads)Expand ›

6. Application SchematicSCHEMATIC

DSPIC33CK128MC103-I/M5 (UQFN-36(5x5)) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)

Showing 1–9 of 9 uncropped original figures for DSPIC33CK128

P1 · p01_fig011756×286px

16-Bit Digital Signal Controllers with High-Speed PWM and

P35 · p35_fig011692×883px

Figure 2-3. Suggested Placement of the Oscillator Circuit

P108 · p108_fig011295×728px

Figure 5-1. Addressing for Table Registers

P918 · p918_fig011787×2008px

DSPIC33CK128MC103-I/M5 (UQFN-36(5x5)) — Table 32-3. Thermal Operating Conditions | Rating Symbol Min. Max. Unit | Industrial Temperature Devices | Operating Junction Temperature Range TJ -40 +125 °C | Operating Ambient Temperature Range TA -40 +85 °C | Extended Temperature Device

P918 · p918_fig01P918

Datasheet Page 918 (p918_fig01)

P947 · p947_fig011968×2302px

dsPIC33CK256MC506 Family High-Temperature Electrical Characteristics

P960 · p960_fig011147×971px

RECOMMENDED LAND PATTERN

P966 · p966_fig011187×1316px

Contact Pad Length (X36 Contact Pad Width (X36)

P966 · p966_fig01P966

Datasheet Page 966 (p966_fig01)

Technical Specifications & Part Details (DSPIC33CK128MC103-I/M5)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:DSPIC33CK128MC103-I/M5 (UQFN-36(5x5)) is a 36-pin standard electronic & interconnect component featuring a 5.00 × 5.00 × 0.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3V to 3.6V supply operation across -40°C to +125°C with integrated SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, UART interfaces.

Operating Supply VoltageV_CC / V_DD

3V to 3.6V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C to +125°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

8 MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

5.00 × 5.00 × 0.60 mm (A1=0.03 mm)

Package family: QFN (UQFN-36(5x5))

Pin Count & Lead PitchN / e

36 Pins | Pitch e = 0.50 mm (19.7 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, UART

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol37 auto-grouped pins

IPC-7351B Land Pattern37 pads · Pitch 0.50mm

IPC-7525 60% Solder PasteEPAD 3.70×3.70mm windowed grid

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UQFN-36(5x5))

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

5.00 × 5.00 mm

Height (A) & Pitch (e)IPC-7351B

A=0.60mm · e=0.50mm

Pad Size (W × L)Level B

0.28 × 0.80 mm

Pins / Total PadsTopology

37P / 37Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit UQFN-36(5x5)	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — DSPIC33CK128MC103-I/M5 (UQFN-36(5x5))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of DSPIC33CK128MC103-I/M5 (UQFN-36(5x5))?

Manufactured by MICROCHIP, the DSPIC33CK128MC103-I/M5 is housed in a UQFN-36(5x5) package with 37 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 3V to 3.6V. Key pins include: 1 (RPntiedtoUART1Transmit: Multiplexed I/O & Peripheral Pin RPntiedtoUART1Transmit (General)), 2 (IO2: General Purpose Digital I/O Pin IO2), 3 (RPntiedtoUART2Transmit: Multiplexed I/O & Peripheral Pin RPntiedtoUART2Transmit (General)), 4 (NC: No Connect (Leave Floating)), 5 (IO2: GPIO2 / RTC_GPIO2 / TOUCH2 / ADC1_CH1), 6 (IO3: GPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)).

What are the IPC-7351B PCB Footprint dimensions for DSPIC33CK128MC103-I/M5?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), DSPIC33CK128MC103-I/M5 (UQFN-36(5x5)) has a nominal body envelope of 5.00 × 5.00 mm, pitch e = 0.50 mm, and 37 copper pads plus a central exposed thermal pad (EPAD) of 3.70 × 3.70 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for DSPIC33CK128MC103-I/M5?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for DSPIC33CK128MC103-I/M5 (MICROCHIP, UQFN-36(5x5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (37 pins) & DSPIC33CK128 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	RPntiedtoUART1Transmit	Digital_IO	Signal terminal RPntiedtoUART1Transmit (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RPntiedtoUART1Transmit. Supported peripheral buses: General.
2	IO2	Digital_IO	General Purpose Digital I/O Pin IO2
3	RPntiedtoUART2Transmit	Digital_IO	Signal terminal RPntiedtoUART2Transmit (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RPntiedtoUART2Transmit. Supported peripheral buses: General.
4	NC	No_Connect	No Connect (Leave Floating)
5	IO2	Digital_IO	GPIO2 / RTC_GPIO2 / TOUCH2 / ADC1_CH1
6	IO3	Digital_IO	GPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)
7	NC	No_Connect	No Connect (Leave Floating)
8	IO0	Digital_IO	GPIO0 / RTC_GPIO0 (Chip Boot Mode Strapping Pin)
9	IO4	Digital_IO	GPIO4 / RTC_GPIO4 / TOUCH4 / ADC1_CH3
10	IO5	Digital_IO	GPIO5 / RTC_GPIO5 / TOUCH5 / ADC1_CH4
11	AVSS	GND	0V electrical ground return terminal (AVSS) for internal core logic, I/O drivers, and analog sub-blocks.
12	IO7	Digital_IO	GPIO7 / RTC_GPIO7 / TOUCH7 / ADC1_CH6
13	IO15	Digital_IO	GPIO15 / RTC_GPIO15 / U0RTS / ADC2_CH4 / XTAL_32K_P
14	IO16	Digital_IO	GPIO16 / RTC_GPIO16 / U0CTS / ADC2_CH5 / XTAL_32K_N
15	RPntiedtoSCCP1Output	Digital_IO	Signal terminal RPntiedtoSCCP1Output (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RPntiedtoSCCP1Output. Supported peripheral buses: General.
16	RPntiedtoSCCP2Output	Digital_IO	Signal terminal RPntiedtoSCCP2Output (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RPntiedtoSCCP2Output. Supported peripheral buses: General.
17	RPntiedtoSCCP3Output	Digital_IO	Signal terminal RPntiedtoSCCP3Output (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RPntiedtoSCCP3Output. Supported peripheral buses: General.
18	RPntiedtoSCCP4Output	Digital_IO	Signal terminal RPntiedtoSCCP4Output (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RPntiedtoSCCP4Output. Supported peripheral buses: General.
19	IO20	Digital_IO	GPIO20 / RTC_GPIO20 / USB_D+ / U1CTS / ADC2_CH9
20	IO9	Digital_IO	GPIO9 / RTC_GPIO9 / TOUCH9 / ADC1_CH8 / FSPIHD
21	RPntiedtoCAN1Output	Digital_IO	Signal terminal RPntiedtoCAN1Output (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RPntiedtoCAN1Output. Supported peripheral buses: CAN.
22	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
23	IO12	Digital_IO	GPIO12 / RTC_GPIO12 / TOUCH12 / ADC2_CH1 / FSPICLK
24	IO13	Digital_IO	GPIO13 / RTC_GPIO13 / TOUCH13 / ADC2_CH2 / FSPIQ
25	PGC3/RP38/RB6	Digital_IO	Signal terminal PGC3/RP38/RB6 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: PGC3/RP38/RB6. Supported peripheral buses: General.
26	TDO/AN2/RP39/RB7	Digital_IO	Signal terminal TDO/AN2/RP39/RB7 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: TDO/AN2/RP39/RB7. Supported peripheral buses: General.
27	RPntiedtoUART3Transmit	Digital_IO	Signal terminal RPntiedtoUART3Transmit (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RPntiedtoUART3Transmit. Supported peripheral buses: General.
28	IO33	Digital_IO	GPIO33 / FSPIHD / SUBSPIHD / SPIIO4
29	RP52/RC4	Digital_IO	Signal terminal RP52/RC4 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RP52/RC4. Supported peripheral buses: General.
30	RP53/RC5	Digital_IO	Signal terminal RP53/RC5 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RP53/RC5. Supported peripheral buses: General.
31	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
32	VDD	Power_In	Primary positive power supply input (VDD) operating in the 3V to 3.6V domain (Max rating: 3.6V).
33	TMS/RP42/PWM3H/RB10	Digital_IO	Signal terminal TMS/RP42/PWM3H/RB10 (I/O, 3V to 3.6V domain). Multiplexed alternate functions: TMS/RP42/PWM3H/RB10. Supported peripheral buses: PWM.
34	RPntiedtoPWM4HOutput	Digital_IO	Signal terminal RPntiedtoPWM4HOutput (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RPntiedtoPWM4HOutput. Supported peripheral buses: PWM.
35	RPntiedtoPWM4LOutput	Digital_IO	Signal terminal RPntiedtoPWM4LOutput (I/O, 3V to 3.6V domain). Multiplexed alternate functions: RPntiedtoPWM4LOutput. Supported peripheral buses: PWM.
36	IO36	Digital_IO	General Purpose Digital I/O Pin IO36
37	IO37	Digital_IO	General Purpose Digital I/O Pin IO37

4D Studio: DSPIC33CK128MC103-I/M5 Permalink: /part/C20291198 MICROCHIP UQFN-36(5x5)All Packages All Manufacturers