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CH341B (SOP-28) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH341B

WCHID: C19185820SOP-28 · 28 Pins · Pitch 1.27mmIPC TOLERANCE VARIATION5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH341B (SOP-28)1ACT#2RSTI3AS#4DS#5ERR#6PEMP7INT#8SLCT9V310UD+11UD -12GND13XI14XO28VCC27WAIT#26RST#25WR#24SCL23SDA22DIN21DIN220DOUT19DOUT218DCK17RI#16DSR#15CTS#Grid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.222.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728E=7.50mm · Pitch e=1.27mmD=17.90mm-10-8-6-4-20246810131197531-1-3-5-7-9-11-13mm
3. 3D CAD MODEL
Package Body: 7.50mm × 17.90mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (28/28)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1ACT#I/OMultiplexed I/O & Peripheral Pin ACT# (USB)
2RSTII/OMultiplexed I/O & Peripheral Pin RSTI (General)
3AS#I/OMultiplexed I/O & Peripheral Pin AS# (General)
4DS#I/OMultiplexed I/O & Peripheral Pin DS# (General)
5ERR#I/OMultiplexed I/O & Peripheral Pin ERR# (General)
6PEMPI/OMultiplexed I/O & Peripheral Pin PEMP (General)
7INT#I/OMultiplexed I/O & Peripheral Pin INT# (General)
8SLCTI/OMultiplexed I/O & Peripheral Pin SLCT (General)
9V3PowerRegulated Power Output (V3 — 3.3V to 5V)
10UD+I/OMultiplexed I/O & Peripheral Pin UD+ (USB)
11UD -I/OMultiplexed I/O & Peripheral Pin UD - (USB)
12GNDGNDGround Reference Pin (GND)
13XII/OMultiplexed I/O & Peripheral Pin XI (RTC/CLK)
14XOI/OMultiplexed I/O & Peripheral Pin XO (RTC/CLK)
15CTS#I/OMultiplexed I/O & Peripheral Pin CTS# (UART)
16DSR#I/OMultiplexed I/O & Peripheral Pin DSR# (UART)
17RI#I/OMultiplexed I/O & Peripheral Pin RI# (General)
18DCKI/OMultiplexed I/O & Peripheral Pin DCK (SPI)
19DOUT2I/OMultiplexed I/O & Peripheral Pin DOUT2 (General)
20DOUTI/OMultiplexed I/O & Peripheral Pin DOUT (SPI)
21DIN2I/OMultiplexed I/O & Peripheral Pin DIN2 (General)
22DINI/OMultiplexed I/O & Peripheral Pin DIN (SPI)
23SDAI/OMultiplexed I/O & Peripheral Pin SDA (I2C)
24SCLI/OMultiplexed I/O & Peripheral Pin SCL (I2C)
25WR#I/OMultiplexed I/O & Peripheral Pin WR# (General)
26RST#I/OMultiplexed I/O & Peripheral Pin RST# (General)
27WAIT#I/OMultiplexed I/O & Peripheral Pin WAIT# (General)
28VCCPowerPower Supply Input (VCC — 3.3V to 5V)
PIN 1 ACT#
I/O
Multiplexed I/O & Peripheral Pin ACT# (USB)
Design note: USB设备配置完成状态输出 低电平有效 ，
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 7 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH341B (WCH · SOP-28)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH341B (SOP-28) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH341B (SOP-28) - 2. Standard Pinout (Top View)
True package pinout (28 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH341B (SOP-28) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH341B (SOP-28) - 4. Package Dimensions (D×E×A)
SOP-28 · 7.50×17.90mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH341B (SOP-28) - 5. Recommended Land Pattern
IPC-7351B Footprint (28 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH341B (SOP-28) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (7 figures · Page 1/1)
Showing 1–7 of 7 uncropped original figures for CH341
P1 · p01_fig01EXACT PACKAGE
CH341B (SOP-28) — 在并口方式下，CH341 提供了EPP 方式或MEM 方式的8 位并行接口，用于在不需要单片机/DSP/MCU 的环境下，直接输入输出数据。
在并口方式下，CH341 提供了EPP 方式或MEM 方式的8 位并行接口，用于在不需要单片机/DSP/MCU 的环境下，直接输入输出数据。
P1 · p01_fig01P1
CH341B (SOP-28) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P2 · p02_fig011392×1533px
CH341B (SOP-28) — 3、封装
3、封装
P2 · p02_fig01P2
CH341B (SOP-28) — Datasheet Page 2 (p02_fig01)
Datasheet Page 2 (p02_fig01)
P4 · p04_fig011716×1955px
CH341B (SOP-28) — 341B/A/F 引脚号引脚名称 类型 引脚说明 22～15 D7～D0 双向三态 8 位双向数据总线，内置上拉电阻
341B/A/F 引脚号引脚名称 类型 引脚说明 22～15 D7～D0 双向三态 8 位双向数据总线，内置上拉电阻
P12 · p12_fig011284×662px
CH341B (SOP-28) — 7.8. 串口对连（下图）
7.8. 串口对连（下图）
P12 · p12_fig02949×461px
CH341B (SOP-28) — 己方的RDY#引脚连接对方的TEN#引脚，只有己方准备好了接收，对方才能发送，所以无论串口 通讯速率多高，双方都能保持数据同步，不会丢失数据。如果串口通讯速率较高，或者双方速度不匹 配，或者低速单片机连接CH341 的串口，通常应该使用硬件速率控制信号保证数据同步。
己方的RDY#引脚连接对方的TEN#引脚，只有己方准备好了接收，对方才能发送，所以无论串口 通讯速率多高，双方都能保持数据同步，不会丢失数据。如果串口通讯速率较高，或者双方速度不匹 配，或者低速单片机连接CH341 的串口，通常应该使用硬件速率控制信号保证数据同步。

Technical Specifications & Part Details (CH341B)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CH341B (SOP-28) is a 28-pin standard electronic & interconnect component featuring a 17.90 × 7.50 × 2.50 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 3.3V to 5V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.3V to 5V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
12.02 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
17.90 × 7.50 × 2.50 mm (A1=0.20 mm)
Package family: SOP (SOP-28)
Pin Count & Lead PitchN / e
28 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol28 auto-grouped pins
OK
IPC-7351B Land Pattern28 pads · Pitch 1.27mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOP-28)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
17.90 × 7.50 mm
Height (A) & Pitch (e)IPC-7351B
A=2.50mm · e=1.27mm
Pad Size (W × L)Level B
0.60 × 1.90 mm
Pins / Total PadsTopology
28P / 28Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SOP-28
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CH341B (SOP-28)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH341B (SOP-28)?

Manufactured by WCH, the CH341B is housed in a SOP-28 package with 28 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 3.3V to 5V. Key pins include: 1 (ACT#: Multiplexed I/O & Peripheral Pin ACT# (USB)), 2 (RSTI: Multiplexed I/O & Peripheral Pin RSTI (General)), 3 (AS#: Multiplexed I/O & Peripheral Pin AS# (General)), 4 (DS#: Multiplexed I/O & Peripheral Pin DS# (General)), 5 (ERR#: Multiplexed I/O & Peripheral Pin ERR# (General)), 6 (PEMP: Multiplexed I/O & Peripheral Pin PEMP (General)).

What are the IPC-7351B PCB Footprint dimensions for CH341B?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH341B (SOP-28) has a nominal body envelope of 7.50 × 17.90 mm, pitch e = 1.27 mm, and 28 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH341B?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH341B (WCH, SOP-28) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (28 pins) & CH341 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1ACT#Digital_IOSignal terminal ACT# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: ACT#. Supported peripheral buses: USB.
2RSTIDigital_IOSignal terminal RSTI (I/O, 3.3V to 5V domain). Multiplexed alternate functions: RSTI. Supported peripheral buses: General.
3AS#Digital_IOSignal terminal AS# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: AS#. Supported peripheral buses: General.
4DS#Digital_IOSignal terminal DS# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: DS#. Supported peripheral buses: General.
5ERR#Digital_IOSignal terminal ERR# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: ERR#. Supported peripheral buses: General.
6PEMPDigital_IOSignal terminal PEMP (I/O, 3.3V to 5V domain). Multiplexed alternate functions: PEMP. Supported peripheral buses: General.
7INT#Digital_IOSignal terminal INT# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: INT#. Supported peripheral buses: General.
8SLCTDigital_IOSignal terminal SLCT (I/O, 3.3V to 5V domain). Multiplexed alternate functions: SLCT. Supported peripheral buses: General.
9V3Power_OutRegulated power output rail (V3) operating in the 3.3V to 5V domain (Max rating: 5.0V).
10UD+Digital_IOSignal terminal UD+ (I/O, 3.3V to 5V domain). Multiplexed alternate functions: UD+. Supported peripheral buses: USB.
11UD -Digital_IOSignal terminal UD - (I/O, 3.3V to 5V domain). Multiplexed alternate functions: UD -. Supported peripheral buses: USB.
12GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
13XIDigital_IOSignal terminal XI (I/O, 3.3V to 5V domain). Multiplexed alternate functions: XI. Supported peripheral buses: RTC/CLK.
14XODigital_IOSignal terminal XO (I/O, 3.3V to 5V domain). Multiplexed alternate functions: XO. Supported peripheral buses: RTC/CLK.
15CTS#Digital_IOSignal terminal CTS# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: CTS#. Supported peripheral buses: UART.
16DSR#Digital_IOSignal terminal DSR# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: DSR#. Supported peripheral buses: UART.
17RI#Digital_IOSignal terminal RI# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: RI#. Supported peripheral buses: General.
18DCKDigital_IOSignal terminal DCK (I/O, 3.3V to 5V domain). Multiplexed alternate functions: DCK. Supported peripheral buses: SPI.
19DOUT2Digital_IOSignal terminal DOUT2 (I/O, 3.3V to 5V domain). Multiplexed alternate functions: DOUT2. Supported peripheral buses: General.
20DOUTDigital_IOSignal terminal DOUT (I/O, 3.3V to 5V domain). Multiplexed alternate functions: DOUT. Supported peripheral buses: SPI.
21DIN2Digital_IOSignal terminal DIN2 (I/O, 3.3V to 5V domain). Multiplexed alternate functions: DIN2. Supported peripheral buses: General.
22DINDigital_IOSignal terminal DIN (I/O, 3.3V to 5V domain). Multiplexed alternate functions: DIN. Supported peripheral buses: SPI.
23SDADigital_IOSignal terminal SDA (I/O, 3.3V to 5V domain). Multiplexed alternate functions: SDA. Supported peripheral buses: I2C.
24SCLDigital_IOSignal terminal SCL (I/O, 3.3V to 5V domain). Multiplexed alternate functions: SCL. Supported peripheral buses: I2C.
25WR#Digital_IOSignal terminal WR# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: WR#. Supported peripheral buses: General.
26RST#Digital_IOSignal terminal RST# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: RST#. Supported peripheral buses: General.
27WAIT#Digital_IOSignal terminal WAIT# (I/O, 3.3V to 5V domain). Multiplexed alternate functions: WAIT#. Supported peripheral buses: General.
28VCCPower_InPrimary positive power supply input (VCC) operating in the 3.3V to 5V domain (Max rating: 5.0V).
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