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STM32F437AIH6 (UFBGA-169) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F437AIH6

STUFBGA-169 · 169 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F437AIH6 (UFBGA-169)A1PA1A2PI6A3PI5A4PE1A5BOOT0A6PB4 (NJTRST)A7PG12A8PD7A9PD3A10PC12A11PA14 (JTCK -A12PI3A13PA13B1PI7B2PE2B3PI4B4PE0B5PB7B6PB3 (JTDO/TRB7PG11B8PD6B9PD2B10PC11B11PA15 (JTDI)B12PI2B13PI0C1PE3C2PE4C3PDR_ONC4PB9C5PB6C6PG15C7PG10C8PD5C9PD1C10PC10C11PI1C12PH15C13PH14D1PE5D2PE6D3VDDD4PB8D5PB5D6VDDD7VSSD8PD4D9PD0D10VDDD11VSSD12VCAP_2D13PH13E1PC14 - OSC32E2PI9E3PI10E4PC13E5VBATE6VDDE7VSSE8PA9E9PA10E10PA11E11PA12E12PA13 (JTMS -E13PA8F1IOF1F2PF0F3PF1F4VDDF5VSSF6VSSF7VDDF8VDDF9PC6F10PC7F11PC8F12PC9F13PG8G1PH1 - OSC_OUG2PH0OSC IN -_G3PF4G4PF3G5PF2G6PC0G7VSSN13PN13N12PB12N11PH10N10PH6N9VCAP_1N8PE12N7PE7N6PG0N5PF12N4PB0N3PA6N2PA4N1PN1M13PB14M12PB13M11PH11M10PH7M9PB11M8PE11M7PG1M6PF13M5PF11M4PC5M3PA5M2PH4M1BYPASS_ REGL13PB15L12PD8L11PH12L10PH8L9PB10L8PE10L7PF15L6VDDL5PB2BOOT1 - (L4PC4L3PH5L2PH2L1PH3K13PD9K12PD13K11PD10K10PH9K9PE15K8PE9K7PF14K6VDDK5PB1K4PA7K3PA3K2PA2K1PA1J13PD12J12PD15J11VDDJ10VSSJ9PE14J8PE8J7VSSJ6VSSJ5PA0WKUP - (PJ4VDDAJ3VREF+J2VREF –J1VSSAH13PG2H12PG4H11PD14H10PD11H9PE13H8VDDH7PC3H6PC2H5PC1H4VDDH3PF5H2NRSTH1PF10G13PG5G12PG7G11PG6G10VDDG9VSSG8VDDGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.8114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1L1M1N1A2B2C2D2E2F2G2H2J2K2L2M2N2A3B3C3D3E3F3G3H3J3K3L3M3N3A4B4C4D4E4F4G4H4J4K4L4M4N4A5B5C5D5E5F5G5H5J5K5L5M5N5A6B6C6D6E6F6G6H6J6K6L6M6N6A7B7C7D7E7F7G7H7J7K7L7M7N7A8B8C8D8E8F8G8H8J8K8L8M8N8A9B9C9D9E9F9G9H9J9K9L9M9N9A10B10C10D10E10F10G10H10J10K10L10M10N10A11B11C11D11E11F11G11H11J11K11L11M11N11A12B12C12D12E12F12G12H12J12K12L12M12N12A13B13C13D13E13F13G13H13J13K13L13M13N13E=7.00mm · Pitch e=0.50mmD=7.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (169/169)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
A2PI6I/OMultiplexed I/O & Peripheral Pin PI6 (PWM)
A3PI5I/OMultiplexed I/O & Peripheral Pin PI5 (PWM)
A4PE1I/OMultiplexed I/O & Peripheral Pin PE1 (UART)
A5BOOT0IInput-Only Pin BOOT0 (General)
A6PB4 (NJTRST)I/OMultiplexed I/O & Peripheral Pin PB4 (NJTRST) (SPI, SWD/JTAG)
A7PG12I/OMultiplexed I/O & Peripheral Pin PG12 (UART, SPI)
A8PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART)
A9PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI)
A10PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
A11PA14 (JTCK - SWCLK)I/OMultiplexed I/O & Peripheral Pin PA14 (JTCK - SWCLK) (SWD/JTAG)
A12PI3I/OMultiplexed I/O & Peripheral Pin PI3 (SPI)
A13PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
B1PI7I/OMultiplexed I/O & Peripheral Pin PI7 (PWM)
B2PE2I/OMultiplexed I/O & Peripheral Pin PE2 (SPI)
B3PI4I/OMultiplexed I/O & Peripheral Pin PI4 (General)
B4PE0I/OMultiplexed I/O & Peripheral Pin PE0 (UART)
B5PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, PWM)
B6PB3 (JTDO/TRACE SWO)I/OMultiplexed I/O & Peripheral Pin PB3 (JTDO/TRACE SWO) (SPI, PWM, SWD/JTAG)
B7PG11I/OMultiplexed I/O & Peripheral Pin PG11 (General)
B8PD6I/OMultiplexed I/O & Peripheral Pin PD6 (UART, SPI, I2C)
B9PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
B10PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI)
B11PA15 (JTDI)I/OMultiplexed I/O & Peripheral Pin PA15 (JTDI) (SPI, SWD/JTAG)
B12PI2I/OMultiplexed I/O & Peripheral Pin PI2 (SPI, PWM)
B13PI0I/OMultiplexed I/O & Peripheral Pin PI0 (SPI)
C1PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
C2PE4I/OMultiplexed I/O & Peripheral Pin PE4 (SPI)
C3PDR_ONI/OMultiplexed I/O & Peripheral Pin PDR_ON (General)
C4PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI, I2C, PWM, CAN)
C5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, PWM, CAN)
C6PG15I/OMultiplexed I/O & Peripheral Pin PG15 (UART)
C7PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
C8PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
C9PD1I/OMultiplexed I/O & Peripheral Pin PD1 (CAN)
C10PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
C11PI1I/OMultiplexed I/O & Peripheral Pin PI1 (SPI)
C12PH15I/OMultiplexed I/O & Peripheral Pin PH15 (PWM)
C13PH14I/OMultiplexed I/O & Peripheral Pin PH14 (PWM)
D1PE5I/OMultiplexed I/O & Peripheral Pin PE5 (SPI)
D2PE6I/OMultiplexed I/O & Peripheral Pin PE6 (SPI)
D3VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D4PB8I/OMultiplexed I/O & Peripheral Pin PB8 (I2C, PWM)
D5PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, I2C, PWM, CAN)
D6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D7VSSGNDGround Reference Pin (VSS)
D8PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART)
D9PD0I/OMultiplexed I/O & Peripheral Pin PD0 (CAN)
D10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D11VSSGNDGround Reference Pin (VSS)
D12VCAP_2I/OMultiplexed I/O & Peripheral Pin VCAP_2 (General)
D13PH13I/OMultiplexed I/O & Peripheral Pin PH13 (PWM, CAN)
E1PC14 - OSC32_IN (PC14)I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)
E2PI9I/OMultiplexed I/O & Peripheral Pin PI9 (CAN)
E3PI10I/OMultiplexed I/O & Peripheral Pin PI10 (General)
E4PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
E5VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
E6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
E7VSSGNDGround Reference Pin (VSS)
E8PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, I2C, PWM)
E9PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART, PWM)
E10PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, PWM, CAN)
E11PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART, CAN)
E12PA13 (JTMS - SWDIO)I/OMultiplexed I/O & Peripheral Pin PA13 (JTMS - SWDIO) (SWD/JTAG)
E13PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, I2C, RTC/CLK)
F1IOF1I/OGeneral Purpose Digital I/O Pin IOF1
F2PF0I/OMultiplexed I/O & Peripheral Pin PF0 (I2C)
F3PF1I/OMultiplexed I/O & Peripheral Pin PF1 (I2C)
F4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F5VSSGNDGround Reference Pin (VSS)
F6VSSGNDGround Reference Pin (VSS)
F7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F9PC6I/OMultiplexed I/O & Peripheral Pin PC6 (UART, PWM)
F10PC7I/OMultiplexed I/O & Peripheral Pin PC7 (UART, PWM)
F11PC8I/OMultiplexed I/O & Peripheral Pin PC8 (UART, PWM)
F12PC9I/OMultiplexed I/O & Peripheral Pin PC9 (PWM, RTC/CLK)
F13PG8I/OMultiplexed I/O & Peripheral Pin PG8 (UART, SPI)
G1PH1 - OSC_OUT (PH1)I/OMultiplexed I/O & Peripheral Pin PH1 - OSC_OUT (PH1) (RTC/CLK)
G2PH0OSC IN -_ (PH0)I/OMultiplexed I/O & Peripheral Pin PH0OSC IN -_ (PH0) (RTC/CLK)
G3PF4I/OMultiplexed I/O & Peripheral Pin PF4 (ADC)
G4PF3I/OMultiplexed I/O & Peripheral Pin PF3 (ADC)
G5PF2I/OMultiplexed I/O & Peripheral Pin PF2 (I2C)
G6PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC)
G7VSSGNDGround Reference Pin (VSS)
G8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G9VSSGNDGround Reference Pin (VSS)
G10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G11PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
G12PG7I/OMultiplexed I/O & Peripheral Pin PG7 (UART)
G13PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
H1PF10I/OMultiplexed I/O & Peripheral Pin PF10 (ADC)
H2NRSTISystem Enable & Hardware Reset (NRST)
H3PF5I/OMultiplexed I/O & Peripheral Pin PF5 (ADC)
H4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H5PC1I/OMultiplexed I/O & Peripheral Pin PC1 (ADC)
H6PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC)
H7PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, ADC)
H8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H9PE13I/OMultiplexed I/O & Peripheral Pin PE13 (SPI, PWM)
H10PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART)
H11PD14I/OMultiplexed I/O & Peripheral Pin PD14 (PWM)
H12PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
H13PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
J1VSSAGNDGround Reference Pin (VSSA)
J2VREF –AnalogMultiplexed I/O & Peripheral Pin VREF – (General)
J3VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
J4VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
J5PA0WKUP - (PA0)I/OMultiplexed I/O & Peripheral Pin PA0WKUP - (PA0) (UART, ADC, PWM)
J6VSSGNDGround Reference Pin (VSS)
J7VSSGNDGround Reference Pin (VSS)
J8PE8I/OMultiplexed I/O & Peripheral Pin PE8 (UART, PWM)
J9PE14I/OMultiplexed I/O & Peripheral Pin PE14 (SPI, PWM)
J10VSSGNDGround Reference Pin (VSS)
J11VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J12PD15I/OMultiplexed I/O & Peripheral Pin PD15 (PWM)
J13PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, PWM)
K1PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM)
K2PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
K3PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
K4PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
K5PB1I/OMultiplexed I/O & Peripheral Pin PB1 (ADC, PWM)
K6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
K7PF14I/OMultiplexed I/O & Peripheral Pin PF14 (General)
K8PE9I/OMultiplexed I/O & Peripheral Pin PE9 (PWM)
K9PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
K10PH9I/OMultiplexed I/O & Peripheral Pin PH9 (I2C)
K11PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART)
K12PD13I/OMultiplexed I/O & Peripheral Pin PD13 (PWM)
K13PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
L1PH3I/OMultiplexed I/O & Peripheral Pin PH3 (General)
L2PH2I/OMultiplexed I/O & Peripheral Pin PH2 (General)
L3PH5I/OMultiplexed I/O & Peripheral Pin PH5 (I2C)
L4PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
L5PB2BOOT1 - (PB2)I/OMultiplexed I/O & Peripheral Pin PB2BOOT1 - (PB2) (General)
L6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
L7PF15I/OMultiplexed I/O & Peripheral Pin PF15 (General)
L8PE10I/OMultiplexed I/O & Peripheral Pin PE10 (PWM)
L9PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, PWM)
L10PH8I/OMultiplexed I/O & Peripheral Pin PH8 (I2C)
L11PH12I/OMultiplexed I/O & Peripheral Pin PH12 (PWM)
L12PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
L13PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, PWM, RTC/CLK)
M1BYPASS_ REGI/OMultiplexed I/O & Peripheral Pin BYPASS_ REG (General)
M2PH4I/OMultiplexed I/O & Peripheral Pin PH4 (I2C)
M3PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
M4PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
M5PF11I/OMultiplexed I/O & Peripheral Pin PF11 (SPI)
M6PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
M7PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
M8PE11I/OMultiplexed I/O & Peripheral Pin PE11 (PWM)
M9PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, PWM)
M10PH7I/OMultiplexed I/O & Peripheral Pin PH7 (I2C)
M11PH11I/OMultiplexed I/O & Peripheral Pin PH11 (PWM)
M12PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM, CAN)
M13PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
N1PN1I/OMultiplexed I/O & Peripheral Pin PN1 (General)
N2PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
N3PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC, PWM)
N4PB0I/OMultiplexed I/O & Peripheral Pin PB0 (ADC, PWM)
N5PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
N6PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
N7PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
N8PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI, PWM)
N9VCAP_1I/OMultiplexed I/O & Peripheral Pin VCAP_1 (General)
N10PH6I/OMultiplexed I/O & Peripheral Pin PH6 (SPI, I2C)
N11PH10I/OMultiplexed I/O & Peripheral Pin PH10 (PWM)
N12PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C, CAN)
N13PN13I/OMultiplexed I/O & Peripheral Pin PN13 (General)
PIN A1 PA1
I/O
Multiplexed I/O & Peripheral Pin PA1 (General)
Design note: Signal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F437AIH6 (ST · UFBGA-169)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F437AIH6 (UFBGA-169) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F437AIH6 (UFBGA-169) - 2. Standard Pinout (Top View)
True package pinout (169 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F437AIH6 (UFBGA-169) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F437AIH6 (UFBGA-169) - 4. Package Dimensions (D×E×A)
UFBGA-169 · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F437AIH6 (UFBGA-169) - 5. Recommended Land Pattern
IPC-7351B Footprint (169 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F437AIH6 (UFBGA-169) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)
Showing 1–9 of 9 uncropped original figures for STM32F439 / STM32F437
P50 · p50_fig01EXACT PACKAGE
STM32F437AIH6 (UFBGA-169) — Figure 16. STM32F43x UFBGA169 ballout
Figure 16. STM32F43x UFBGA169 ballout
P219 · p219_fig01EXACT PACKAGE
STM32F437AIH6 (UFBGA-169) — Figure 95. UFBGA169 - 169-ball 7 x 7 mm 0.50 mm pitch, ultra fine pitch ball grid array
Figure 95. UFBGA169 - 169-ball 7 x 7 mm 0.50 mm pitch, ultra fine pitch ball grid array
P220 · p220_fig01EXACT PACKAGE
STM32F437AIH6 (UFBGA-169) — Figure 96. UFBGA169 - 169-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch
Figure 96. UFBGA169 - 169-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch
P1 · p01_fig01881×654px
STM32F437AIH6 (UFBGA-169) — 32b Arm® Cortex®-M4 MCU+FPU, 225DMIPS, up to 2MB Flash/256+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 com. interfaces, camera&LCD-TFT | Datasheet - production data | LQFP100 (14 × 14 mm) LQFP144 (20 × 20 mm) UFBGA176 (10
32b Arm® Cortex®-M4 MCU+FPU, 225DMIPS, up to 2MB Flash/256+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 com. interfaces, camera&LCD-TFT | Datasheet - production data | LQFP100 (14 × 14 mm) LQFP144 (20 × 20 mm) UFBGA176 (10
P45 · p45_fig011546×1419px
STM32F437AIH6 (UFBGA-169) — Figure 11. STM32F43x LQFP100 pinout 6$$ 633 0%�� 0%�� 0"�� 0"�� "//4��                          
Figure 11. STM32F43x LQFP100 pinout 6$$ 633 0% 0% 0" 0" "//4                          
P92 · p92_fig011751×1451px
STM32F437AIH6 (UFBGA-169) — Figure 22. Power supply scheme 9%$7
Figure 22. Power supply scheme 9%$7
P223 · p223_fig011546×1228px
STM32F437AIH6 (UFBGA-169) — Figure 99. UFBGA176+25-ball, 10 x 10 mm, 0.65 mm pitch, ultra fine pitch
Figure 99. UFBGA176+25-ball, 10 x 10 mm, 0.65 mm pitch, ultra fine pitch
P238 · p238_fig011548×2266px
STM32F437AIH6 (UFBGA-169) — Revision history STM32F437xx and STM32F439xx
Revision history STM32F437xx and STM32F439xx
P239 · p239_fig011875×2535px
STM32F437AIH6 (UFBGA-169) — STM32F437xx and STM32F439xx Revision history
STM32F437xx and STM32F439xx Revision history

Technical Specifications & Part Details (STM32F437AIH6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F437AIH6 (UFBGA-169) is a 169-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 0.53 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.7 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, I2C, I2S, ADC, PWM, SDIO, JTAG / SWD, IrDA, CAN, DAC, RTC/CLK, SPI, SWD/JTAG, UART interfaces.
Operating Supply VoltageV_CC / V_DD
1.7 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
180 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
129 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 0.53 mm (A1=0.20 mm)
Package family: BGA (UFBGA-169)
Pin Count & Lead PitchN / e
169 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, I2C, I2S, ADC, PWM, SDIO, JTAG / SWD, IrDA, CAN, DAC, RTC/CLK, SPI, SWD/JTAG, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0, PB2BOOT1 - (PB2)): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol169 auto-grouped pins
OK
IPC-7351B Land Pattern169 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFBGA-169)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.53mm · e=0.50mm
Pad Size (W × L)Level B
0.22 × 0.22 mm
Pins / Total PadsTopology
169P / 169Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-169
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F437AIH6 (UFBGA-169)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F437AIH6 (UFBGA-169)?

Manufactured by ST, the STM32F437AIH6 is housed in a UFBGA-169 package with 169 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.7 V to 3.6 V. Key pins include: A1 (PA1: Multiplexed I/O & Peripheral Pin PA1 (General)), A2 (PI6: Multiplexed I/O & Peripheral Pin PI6 (PWM)), A3 (PI5: Multiplexed I/O & Peripheral Pin PI5 (PWM)), A4 (PE1: Multiplexed I/O & Peripheral Pin PE1 (UART)), A5 (BOOT0: Input-Only Pin BOOT0 (General)), A6 (PB4 (NJTRST): Multiplexed I/O & Peripheral Pin PB4 (NJTRST) (SPI, SWD/JTAG)).

What are the IPC-7351B PCB Footprint dimensions for STM32F437AIH6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F437AIH6 (UFBGA-169) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 169 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F437AIH6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F437AIH6 (ST, UFBGA-169) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (169 pins) & STM32F439 / STM32F437 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
A2PI6Digital_IOSignal terminal PI6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI6. Supported peripheral buses: PWM.
A3PI5Digital_IOSignal terminal PI5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI5. Supported peripheral buses: PWM.
A4PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: UART.
A5BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
A6PB4 (NJTRST)Digital_IOSignal terminal PB4 (NJTRST) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI3_MISO. Supported peripheral buses: SPI, SWD/JTAG.
A7PG12Digital_IOSignal terminal PG12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI6_MISO. Supported peripheral buses: UART, SPI.
A8PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: UART.
A9PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI.
A10PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI.
A11PA14 (JTCK - SWCLK)Digital_IOSignal terminal PA14 (JTCK - SWCLK) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14 (JTCK - SWCLK). Supported peripheral buses: SWD/JTAG.
A12PI3Digital_IOSignal terminal PI3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI.
A13PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
B1PI7Digital_IOSignal terminal PI7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI7. Supported peripheral buses: PWM.
B2PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_SCK. Supported peripheral buses: SPI.
B3PI4Digital_IOSignal terminal PI4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI4. Supported peripheral buses: General.
B4PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: UART.
B5PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART, PWM.
B6PB3 (JTDO/TRACE SWO)Digital_IOSignal terminal PB3 (JTDO/TRACE SWO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: SPI, PWM, SWD/JTAG.
B7PG11Digital_IOSignal terminal PG11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG11. Supported peripheral buses: General.
B8PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI, I2C.
B9PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
B10PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI.
B11PA15 (JTDI)Digital_IOSignal terminal PA15 (JTDI) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: SPI, SWD/JTAG.
B12PI2Digital_IOSignal terminal PI2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, PWM.
B13PI0Digital_IOSignal terminal PI0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI.
C1PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
C2PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_NSS. Supported peripheral buses: SPI.
C3PDR_ONDigital_IOSignal terminal PDR_ON (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PDR_ON. Supported peripheral buses: General.
C4PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA, SPI2_NSS. Supported peripheral buses: SPI, I2C, PWM, CAN.
C5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: UART, PWM, CAN.
C6PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: UART.
C7PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General.
C8PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: UART.
C9PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: CAN.
C10PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
C11PI1Digital_IOSignal terminal PI1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI.
C12PH15Digital_IOSignal terminal PH15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH15. Supported peripheral buses: PWM.
C13PH14Digital_IOSignal terminal PH14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH14. Supported peripheral buses: PWM.
D1PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MISO. Supported peripheral buses: SPI.
D2PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI4_MOSI. Supported peripheral buses: SPI.
D3VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D4PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: I2C, PWM.
D5PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, SPI1_MOSI, SPI3_MOSI. Supported peripheral buses: SPI, I2C, PWM, CAN.
D6VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D8PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: UART.
D9PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: CAN.
D10VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D11VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D12VCAP_2Digital_IOSignal terminal VCAP_2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP_2. Supported peripheral buses: General.
D13PH13Digital_IOSignal terminal PH13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH13. Supported peripheral buses: PWM, CAN.
E1PC14 - OSC32_IN (PC14)Digital_IOSignal terminal PC14 - OSC32_IN (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN (PC14). Supported peripheral buses: RTC/CLK.
E2PI9Digital_IOSignal terminal PI9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI9. Supported peripheral buses: CAN.
E3PI10Digital_IOSignal terminal PI10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI10. Supported peripheral buses: General.
E4PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
E5VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E6VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E8PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SMBA. Supported peripheral buses: UART, I2C, PWM.
E9PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: UART, PWM.
E10PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: UART, PWM, CAN.
E11PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: UART, CAN.
E12PA13 (JTMS - SWDIO)Digital_IOSignal terminal PA13 (JTMS - SWDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13 (JTMS - SWDIO). Supported peripheral buses: SWD/JTAG.
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