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STM32G473CBU6 (UFQFPN-48(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32G473CBU6

STID: C1341693UFQFPN-48(7x7) · 49 Pins · Pitch 0.50mmIPC TOLERANCE VARIATION5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32G473CBU6 (UFQFPN-48(7x7))1VBAT2PC133PC14 - OSC324PC15 - OSC325PF0 - OSC_IN6PF1 - OSC_OU7PG10 - NRST8PA09PA110PA211PA312PA413PA514PA615PA716PC417PB018PB119PB220VREF+21VDDA22PB1023VDD24PB1125PB1249EP48VDD47PB946PB8-BOOT045PB744PB643PB542PB441PB340PC1139PC1038PA1537PA1436PA1335VDD34PA1233PA1132PA1031PA930PA829PC628PB1527PB1426PB13Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.838.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849E=7.00mm · Pitch e=0.50mmD=7.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (49/49)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
2PC13I/OMultiplexed I/O & Peripheral Pin PC13 (PWM, RTC/CLK)
3PC14 - OSC32_I NI/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_I N (RTC/CLK)
4PC15 - OSC32_ OUTI/OMultiplexed I/O & Peripheral Pin PC15 - OSC32_ OUT (RTC/CLK)
5PF0 - OSC_INI/OMultiplexed I/O & Peripheral Pin PF0 - OSC_IN (SPI, I2C, ADC, PWM, RTC/CLK)
6PF1 - OSC_OU TI/OMultiplexed I/O & Peripheral Pin PF1 - OSC_OU T (SPI, ADC, RTC/CLK)
7PG10 - NRSTI/OMultiplexed I/O & Peripheral Pin PG10 - NRST (RTC/CLK)
8PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
9PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, PWM, RTC/CLK)
10PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
11PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
12PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC, PWM)
13PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
14PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC, DAC, PWM)
15PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
16PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, I2C, ADC)
17PB0I/OMultiplexed I/O & Peripheral Pin PB0 (ADC, PWM)
18PB1I/OMultiplexed I/O & Peripheral Pin PB1 (ADC, PWM)
19PB2I/OMultiplexed I/O & Peripheral Pin PB2 (I2C, ADC, PWM, RTC/CLK)
20VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
21VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
22PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
23VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
24PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
25PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
26PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
27PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
28PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
29PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
30PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
31PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
32PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
33PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
34PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
35VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
36PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
37PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
38PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
39PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
40PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
41PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
42PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
43PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
44PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
45PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
46PB8-BOOT0I/OMultiplexed I/O & Peripheral Pin PB8-BOOT0 (General)
47PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
48VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
49EPGNDExposed Thermal & Ground Pad (EP)
PIN 1 VBAT
Power
Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 14 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32G473CBU6 (ST · UFQFPN-48(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32G473CBU6 (UFQFPN-48(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32G473CBU6 (UFQFPN-48(7x7)) - 2. Standard Pinout (Top View)
True package pinout (49 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32G473CBU6 (UFQFPN-48(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32G473CBU6 (UFQFPN-48(7x7)) - 4. Package Dimensions (D×E×A)
UFQFPN-48(7x7) · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32G473CBU6 (UFQFPN-48(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (49 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32G473CBU6 (UFQFPN-48(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (14 figures · Page 1/2)
Showing 1–12 of 14 uncropped original figures for STM32G473
P47 · p47_fig01EXACT PACKAGE
STM32G473CBU6 (UFQFPN-48(7x7)) — Figure 5. STM32G473xB/xC/xE UFQFPN48 pinout
Figure 5. STM32G473xB/xC/xE UFQFPN48 pinout
P198 · p198_fig01EXACT PACKAGE
STM32G473CBU6 (UFQFPN-48(7x7)) — Figure 56. UFQFPN48 - outline
Figure 56. UFQFPN48 - outline
P199 · p199_fig01EXACT PACKAGE
STM32G473CBU6 (UFQFPN-48(7x7)) — Figure 57. UFQFPN48 - recommended footprint
Figure 57. UFQFPN48 - recommended footprint
P1 · p01_fig01881×771px
STM32G473CBU6 (UFQFPN-48(7x7)) — STM32G473xE Arm® Cortex®-M4 32-bit MCU+FPU, up to 512 KB Flash, 170 MHz /
STM32G473xE Arm® Cortex®-M4 32-bit MCU+FPU, up to 512 KB Flash, 170 MHz /
P47 · p47_fig01P47
STM32G473CBU6 (UFQFPN-48(7x7)) — Datasheet Page 47 (p47_fig01)
Datasheet Page 47 (p47_fig01)
P49 · p49_fig011751×1423px
STM32G473CBU6 (UFQFPN-48(7x7)) — Figure 8. STM32G473xB/xC/xE LQFP80 pinout
Figure 8. STM32G473xB/xC/xE LQFP80 pinout
P50 · p50_fig011546×1409px
STM32G473CBU6 (UFQFPN-48(7x7)) — Figure 9. STM32G473xB/xC/xE LQFP100 pinout
Figure 9. STM32G473xB/xC/xE LQFP100 pinout
P78 · p78_fig011546×1512px
STM32G473CBU6 (UFQFPN-48(7x7)) — Figure 16. Power supply scheme
Figure 16. Power supply scheme
P147 · p147_fig011563×841px
STM32G473CBU6 (UFQFPN-48(7x7)) — Figure 28. ADC accuracy characteristics
Figure 28. ADC accuracy characteristics
P147 · p147_fig021546×641px
STM32G473CBU6 (UFQFPN-48(7x7)) — Figure 29. Typical connection diagram using the ADC
Figure 29. Typical connection diagram using the ADC
P147 · p147_fig01P147
STM32G473CBU6 (UFQFPN-48(7x7)) — Datasheet Page 147 (p147_fig01)
Datasheet Page 147 (p147_fig01)
P196 · p196_fig011546×664px
STM32G473CBU6 (UFQFPN-48(7x7)) — Figure 55. WLCSP81 - recommended footprint
Figure 55. WLCSP81 - recommended footprint
Page 1 / 2 (14 extracted figures)

Technical Specifications & Part Details (STM32G473CBU6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32G473CBU6 (UFQFPN-48(7x7)) is a 48-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 0.55 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
170 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
8 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 0.55 mm (A1=0.04 mm)
Package family: QFN (UFQFPN-48(7x7))
Pin Count & Lead PitchN / e
48 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PB8-BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol49 auto-grouped pins
OK
IPC-7351B Land Pattern49 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteEPAD 5.60×5.60mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFQFPN-48(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.55mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 0.55 mm
Pins / Total PadsTopology
49P / 49Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFQFPN-48(7x7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32G473CBU6 (UFQFPN-48(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32G473CBU6 (UFQFPN-48(7x7))?

Manufactured by ST, the STM32G473CBU6 is housed in a UFQFPN-48(7x7) package with 49 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: 1 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))), 2 (PC13: Multiplexed I/O & Peripheral Pin PC13 (PWM, RTC/CLK)), 3 (PC14 - OSC32_I N: Multiplexed I/O & Peripheral Pin PC14 - OSC32_I N (RTC/CLK)), 4 (PC15 - OSC32_ OUT: Multiplexed I/O & Peripheral Pin PC15 - OSC32_ OUT (RTC/CLK)), 5 (PF0 - OSC_IN: Multiplexed I/O & Peripheral Pin PF0 - OSC_IN (SPI, I2C, ADC, PWM, RTC/CLK)), 6 (PF1 - OSC_OU T: Multiplexed I/O & Peripheral Pin PF1 - OSC_OU T (SPI, ADC, RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for STM32G473CBU6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G473CBU6 (UFQFPN-48(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 49 copper pads plus a central exposed thermal pad (EPAD) of 5.60 × 5.60 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G473CBU6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G473CBU6 (ST, UFQFPN-48(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (49 pins) & STM32G473 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
2PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: PWM, RTC/CLK.
3PC14 - OSC32_I NDigital_IOSignal terminal PC14 - OSC32_I N (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_I N. Supported peripheral buses: RTC/CLK.
4PC15 - OSC32_ OUTDigital_IOSignal terminal PC15 - OSC32_ OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC15 - OSC32_ OUT. Supported peripheral buses: RTC/CLK.
5PF0 - OSC_INDigital_IOSignal terminal PF0 - OSC_IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA, SPI2_NSS. Supported peripheral buses: SPI, I2C, ADC, PWM, RTC/CLK.
6PF1 - OSC_OU TDigital_IOSignal terminal PF1 - OSC_OU T (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, ADC, RTC/CLK.
7PG10 - NRSTDigital_IOSignal terminal PG10 - NRST (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG10 - NRST. Supported peripheral buses: RTC/CLK.
8PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
9PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
10PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, ADC, PWM.
11PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: UART, ADC, PWM.
12PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, ADC, DAC, PWM.
13PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC, DAC, PWM.
14PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, ADC, DAC, PWM.
15PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
16PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SCL. Supported peripheral buses: UART, I2C, ADC.
17PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: ADC, PWM.
18PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: ADC, PWM.
19PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: I2C3_SMBA. Supported peripheral buses: I2C, ADC, PWM, RTC/CLK.
20VREF+AnalogSignal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
21VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
22PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
23VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
24PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
25PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
26PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
27PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
28PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
29PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
30PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
31PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
32PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
33PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
34PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
35VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
36PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
37PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
38PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
39PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
40PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
41PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
42PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
43PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
44PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
45PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
46PB8-BOOT0Digital_IOSignal terminal PB8-BOOT0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8-BOOT0. Supported peripheral buses: General.
47PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
48VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
49EPGNDBottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
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