ChipDocs.org
⌘K
2284 PARTSUpload PDF
CEC1712H-S2-I/SX (WFBGA-84) — Symbol, Footprint IPC-7351B & 3D STEP Model

CEC1712H-S2-I/SX

MICROCHIPID: C1012861WFBGA-84 · 84 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CEC1712H-S2-I/SX (WFBGA-84)A1VCI OUT/GPIOA2XTAL2A3GPIO050/ICT0A4XTAL1A5VCI IN3#/GPIA6IOA6A7IOA7A8GPIO004/I2C0A9GPIO132/I2C0A10GPIO125/PVT_B1BGPO0/GPIO25B2GPIO051/ICT1B3IOB3B4VCI IN0#/GPIB5GPIO003/I2C0B6IOB6B7IOB7B8IOB8B9GPIO157/LED1B10GPIO122/PVT_C1VTR_PLLC2IOC2C5IOC5C6GPIO127C9GPIO046/ICT1C10GPIO124/PVT D1VSSD2nRESET_IND4VSS_ANALOGD5VBATD6IOD6D7GPIO156/LED0D9IOD9D10GPIO121/PVT_E1VTR_REGE2GPIO106/PWROE3VREF_ADCE4VSSE7IOE7E8JTAG RST#_E9IOE9E10GPIO123/PVT_K10GPIO053/PWM0K9GPIO026/I2C1K8GPIO071/I2C1K7GPIO055/PWM2K6GPIO056/PWM3K5GPIO223/SHD_K4GPIO227/SHD_K3GPIO224/SHD_K2GPIO016/SHD K1GPIO012/I2C0J10GPIO027/I2C1J9GPIO131/I2C0J8GPIO070/I2C1J7GPIO002/PWM5J6GPIO063/PWM6J5GPIO130/I2C0J4GPIO021J3GPIO020J2GPIO013/I2C0J1VSS_ADCH10GPIO120H9GPIO107/I2C1H6GPIO015/PWM7H5GPIO032H2IOH2H1GPIO204/ADC0G10GPIO113/ICT9G9GPIO112G7GPIO030/I2C1G6VTR1G5VTR2G4GPIO034G2IOG2G1IOG1F10GPIO126/PVT_F9IOF9F8GPIO171/UARTF7VSSF4VTR_ANALOGF3GPIO057/VCC_F2IOF2F1VR_CAPGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.858.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4mm
2. 2D FOOTPRINT
A1A2B1A3A5A4A7A6A9A8A10B10B8B9B6B7B4B5B3B2C2C5C6C9C10C1D2D5D4D7D6D9D10D1E2E3E4E7E9E8E10E1F2F3F4F7F9F8F10F1G2G5G4G7G6G9G10G1H2H5H6H9H10H1J2J3J5J4J7J6J9J8J10J1K2K3K5K4K7K6K9K8K10K1E=7.00mm · Pitch e=0.65mmD=7.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (84/84)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VCI OUT/GPIO250_I/OMultiplexed I/O & Peripheral Pin VCI OUT/GPIO250_ (General)
A2XTAL2I/OMultiplexed I/O & Peripheral Pin XTAL2 (RTC/CLK)
A3GPIO050/ICT0_TACH0I/OMultiplexed I/O & Peripheral Pin GPIO050/ICT0_TACH0 (General)
A4XTAL1I/OMultiplexed I/O & Peripheral Pin XTAL1 (RTC/CLK)
A5VCI IN3#/GPIO000_I/OMultiplexed I/O & Peripheral Pin VCI IN3#/GPIO000_ (General)
A6IOA6I/OGeneral Purpose Digital I/O Pin IOA6
A7IOA7I/OGeneral Purpose Digital I/O Pin IOA7
A8GPIO004/I2C00_SCLI/OMultiplexed I/O & Peripheral Pin GPIO004/I2C00_SCL (I2C)
A9GPIO132/I2C06_SDAI/OMultiplexed I/O & Peripheral Pin GPIO132/I2C06_SDA (I2C)
A10GPIO125/PVT_CLKI/OMultiplexed I/O & Peripheral Pin GPIO125/PVT_CLK (General)
B1BGPO0/GPIO253I/OMultiplexed I/O & Peripheral Pin BGPO0/GPIO253 (General)
B2GPIO051/ICT1_TACH1I/OMultiplexed I/O & Peripheral Pin GPIO051/ICT1_TACH1 (General)
B3IOB3I/OGeneral Purpose Digital I/O Pin IOB3
B4VCI IN0#/GPIO163_I/OMultiplexed I/O & Peripheral Pin VCI IN0#/GPIO163_ (General)
B5GPIO003/I2C00_SDAI/OMultiplexed I/O & Peripheral Pin GPIO003/I2C00_SDA (I2C)
B6IOB6I/OGeneral Purpose Digital I/O Pin IOB6
B7IOB7I/OGeneral Purpose Digital I/O Pin IOB7
B8IOB8I/OGeneral Purpose Digital I/O Pin IOB8
B9GPIO157/LED1I/OMultiplexed I/O & Peripheral Pin GPIO157/LED1 (General)
B10GPIO122/PVT_IO1I/OMultiplexed I/O & Peripheral Pin GPIO122/PVT_IO1 (General)
C1VTR_PLLI/OMultiplexed I/O & Peripheral Pin VTR_PLL (General)
C2IOC2I/OGeneral Purpose Digital I/O Pin IOC2
C5IOC5I/OGeneral Purpose Digital I/O Pin IOC5
C6GPIO127I/OMultiplexed I/O & Peripheral Pin GPIO127 (General)
C9GPIO046/ICT11I/OMultiplexed I/O & Peripheral Pin GPIO046/ICT11 (General)
C10GPIO124/PVT CS#/ICT12_I/OMultiplexed I/O & Peripheral Pin GPIO124/PVT CS#/ICT12_ (General)
D1VSSGNDGround Reference Pin (VSS)
D2nRESET_INISystem Enable & Hardware Reset (nRESET_IN)
D4VSS_ANALOGGNDGround Reference Pin (VSS_ANALOG)
D5VBATPowerPower Supply Input (VBAT — 3.3V / 5.0V Standard Logic)
D6IOD6I/OGeneral Purpose Digital I/O Pin IOD6
D7GPIO156/LED0I/OMultiplexed I/O & Peripheral Pin GPIO156/LED0 (General)
D9IOD9I/OGeneral Purpose Digital I/O Pin IOD9
D10GPIO121/PVT_IO0I/OMultiplexed I/O & Peripheral Pin GPIO121/PVT_IO0 (General)
E1VTR_REGI/OMultiplexed I/O & Peripheral Pin VTR_REG (General)
E2GPIO106/PWROKI/OMultiplexed I/O & Peripheral Pin GPIO106/PWROK (General)
E3VREF_ADCI/OMultiplexed I/O & Peripheral Pin VREF_ADC (ADC)
E4VSSGNDGround Reference Pin (VSS)
E7IOE7I/OGeneral Purpose Digital I/O Pin IOE7
E8JTAG RST#_I/OMultiplexed I/O & Peripheral Pin JTAG RST#_ (SWD/JTAG)
E9IOE9I/OGeneral Purpose Digital I/O Pin IOE9
E10GPIO123/PVT_IO2I/OMultiplexed I/O & Peripheral Pin GPIO123/PVT_IO2 (General)
F1VR_CAPI/OMultiplexed I/O & Peripheral Pin VR_CAP (General)
F2IOF2I/OGeneral Purpose Digital I/O Pin IOF2
F3GPIO057/VCC_PWRGDPowerPower Supply Input (GPIO057/VCC_PWRGD — 3.3V / 5.0V Standard Logic)
F4VTR_ANALOGI/OMultiplexed I/O & Peripheral Pin VTR_ANALOG (General)
F7VSSGNDGround Reference Pin (VSS)
F8GPIO171/UART1_RXI/OMultiplexed I/O & Peripheral Pin GPIO171/UART1_RX (UART)
F9IOF9I/OGeneral Purpose Digital I/O Pin IOF9
F10GPIO126/PVT_IO3I/OMultiplexed I/O & Peripheral Pin GPIO126/PVT_IO3 (General)
G1IOG1I/OGeneral Purpose Digital I/O Pin IOG1
G2IOG2I/OGeneral Purpose Digital I/O Pin IOG2
G4GPIO034I/OMultiplexed I/O & Peripheral Pin GPIO034 (General)
G5VTR2I/OMultiplexed I/O & Peripheral Pin VTR2 (General)
G6VTR1I/OMultiplexed I/O & Peripheral Pin VTR1 (General)
G7GPIO030/I2C10_SDAI/OMultiplexed I/O & Peripheral Pin GPIO030/I2C10_SDA (I2C)
G9GPIO112I/OMultiplexed I/O & Peripheral Pin GPIO112 (General)
G10GPIO113/ICT9I/OMultiplexed I/O & Peripheral Pin GPIO113/ICT9 (General)
H1GPIO204/ADC04I/OMultiplexed I/O & Peripheral Pin GPIO204/ADC04 (ADC)
H2IOH2I/OGeneral Purpose Digital I/O Pin IOH2
H5GPIO032I/OMultiplexed I/O & Peripheral Pin GPIO032 (General)
H6GPIO015/PWM7/ICT10I/OMultiplexed I/O & Peripheral Pin GPIO015/PWM7/ICT10 (PWM)
H9GPIO107/I2C10_SCLI/OMultiplexed I/O & Peripheral Pin GPIO107/I2C10_SCL (I2C)
H10GPIO120I/OMultiplexed I/O & Peripheral Pin GPIO120 (General)
J1VSS_ADCGNDGround Reference Pin (VSS_ADC)
J2GPIO013/I2C07_SCLI/OMultiplexed I/O & Peripheral Pin GPIO013/I2C07_SCL (I2C)
J3GPIO020I/OMultiplexed I/O & Peripheral Pin GPIO020 (General)
J4GPIO021I/OMultiplexed I/O & Peripheral Pin GPIO021 (General)
J5GPIO130/I2C01_SDAI/OMultiplexed I/O & Peripheral Pin GPIO130/I2C01_SDA (I2C)
J6GPIO063/PWM6 ALT/ICT8_I/OMultiplexed I/O & Peripheral Pin GPIO063/PWM6 ALT/ICT8_ (PWM)
J7GPIO002/PWM5/SHD CS1#_I/OMultiplexed I/O & Peripheral Pin GPIO002/PWM5/SHD CS1#_ (PWM)
J8GPIO070/I2C14_SDAI/OMultiplexed I/O & Peripheral Pin GPIO070/I2C14_SDA (I2C)
J9GPIO131/I2C01_SCLI/OMultiplexed I/O & Peripheral Pin GPIO131/I2C01_SCL (I2C)
J10GPIO027/I2C12_SCLI/OMultiplexed I/O & Peripheral Pin GPIO027/I2C12_SCL (I2C)
K1GPIO012/I2C07_SDAI/OMultiplexed I/O & Peripheral Pin GPIO012/I2C07_SDA (I2C)
K2GPIO016/SHD IO3/ICT3_I/OMultiplexed I/O & Peripheral Pin GPIO016/SHD IO3/ICT3_ (General)
K3GPIO224/SHD_IO1I/OMultiplexed I/O & Peripheral Pin GPIO224/SHD_IO1 (General)
K4GPIO227/SHD_IO2I/OMultiplexed I/O & Peripheral Pin GPIO227/SHD_IO2 (General)
K5GPIO223/SHD_IO0I/OMultiplexed I/O & Peripheral Pin GPIO223/SHD_IO0 (General)
K6GPIO056/PWM3/SHD_CLKI/OMultiplexed I/O & Peripheral Pin GPIO056/PWM3/SHD_CLK (PWM)
K7GPIO055/PWM2/SHD CS0#_I/OMultiplexed I/O & Peripheral Pin GPIO055/PWM2/SHD CS0#_ (PWM)
K8GPIO071/I2C14_SCLI/OMultiplexed I/O & Peripheral Pin GPIO071/I2C14_SCL (I2C)
K9GPIO026/I2C12_SDAI/OMultiplexed I/O & Peripheral Pin GPIO026/I2C12_SDA (I2C)
K10GPIO053/PWM0I/OMultiplexed I/O & Peripheral Pin GPIO053/PWM0 (PWM)
PIN A1 VCI OUT/GPIO250_
I/O
Multiplexed I/O & Peripheral Pin VCI OUT/GPIO250_ (General)
Design note: Signal terminal VCI OUT/GPIO250_ (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VCI OUT/GPIO250_. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 4 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CEC1712H-S2-I/SX (MICROCHIP · WFBGA-84)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CEC1712H-S2-I/SX (WFBGA-84) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CEC1712H-S2-I/SX (WFBGA-84) - 2. Standard Pinout (Top View)
True package pinout (84 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CEC1712H-S2-I/SX (WFBGA-84) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CEC1712H-S2-I/SX (WFBGA-84) - 4. Package Dimensions (D×E×A)
WFBGA-84 · 7.00×7.00mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
CEC1712H-S2-I/SX (WFBGA-84) - 5. Recommended Land Pattern
IPC-7351B Footprint (84 Pads)Expand ›
6. Application SchematicSCHEMATIC
CEC1712H-S2-I/SX (WFBGA-84) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (4 figures · Page 1/1)
Showing 1–4 of 4 uncropped original figures for CEC1712
P1 · p01_fig01377×200px
CEC1712H-S2-I/SX (WFBGA-84) — Cryptographic Embedded Controller
Cryptographic Embedded Controller
P30 · p30_fig011777×2246px
CEC1712H-S2-I/SX (WFBGA-84) — DS00003416B-page 30  2020 Microchip Technology Inc. | Note: For the most current package drawings, see the Microchip Packaging Specification at http://www.micro- chip.com/packaging.
DS00003416B-page 30  2020 Microchip Technology Inc. | Note: For the most current package drawings, see the Microchip Packaging Specification at http://www.micro- chip.com/packaging.
P30 · p30_fig02156×375px
CEC1712H-S2-I/SX (WFBGA-84) — }
}
P251 · p251_fig011430×784px
CEC1712H-S2-I/SX (WFBGA-84) — FIGURE 23-1: I/O DIAGRAM OF BLOCK
FIGURE 23-1: I/O DIAGRAM OF BLOCK

Technical Specifications & Part Details (CEC1712H-S2-I/SX)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CEC1712H-S2-I/SX (WFBGA-84) is a 84-pin standard electronic & interconnect component featuring a 7.00 × 7.00 × 1.35 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated UART, SPI, I2C, ADC, PWM, JTAG / SWD, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
48 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 1.35 mm (A1=0.30 mm)
Package family: BGA (WFBGA-84)
Pin Count & Lead PitchN / e
84 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, ADC, PWM, JTAG / SWD, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol84 auto-grouped pins
OK
IPC-7351B Land Pattern84 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WFBGA-84)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.35mm · e=0.65mm
Pad Size (W × L)Level B
0.25 × 0.25 mm
Pins / Total PadsTopology
84P / 84Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WFBGA-84
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CEC1712H-S2-I/SX (WFBGA-84)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CEC1712H-S2-I/SX (WFBGA-84)?

Manufactured by MICROCHIP, the CEC1712H-S2-I/SX is housed in a WFBGA-84 package with 84 pins and a 0.65 mm lead pitch. Key pins include: A1 (VCI OUT/GPIO250_: Multiplexed I/O & Peripheral Pin VCI OUT/GPIO250_ (General)), A2 (XTAL2: Multiplexed I/O & Peripheral Pin XTAL2 (RTC/CLK)), A3 (GPIO050/ICT0_TACH0: Multiplexed I/O & Peripheral Pin GPIO050/ICT0_TACH0 (General)), A4 (XTAL1: Multiplexed I/O & Peripheral Pin XTAL1 (RTC/CLK)), A5 (VCI IN3#/GPIO000_: Multiplexed I/O & Peripheral Pin VCI IN3#/GPIO000_ (General)), A6 (IOA6: General Purpose Digital I/O Pin IOA6).

What are the IPC-7351B PCB Footprint dimensions for CEC1712H-S2-I/SX?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CEC1712H-S2-I/SX (WFBGA-84) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.65 mm, and 84 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CEC1712H-S2-I/SX?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CEC1712H-S2-I/SX (MICROCHIP, WFBGA-84) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (84 pins) & CEC1712 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VCI OUT/GPIO250_Digital_IOSignal terminal VCI OUT/GPIO250_ (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VCI OUT/GPIO250_. Supported peripheral buses: General.
A2XTAL2Digital_IOSignal terminal XTAL2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XTAL2. Supported peripheral buses: RTC/CLK.
A3GPIO050/ICT0_TACH0Digital_IOSignal terminal GPIO050/ICT0_TACH0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO050/ICT0_TACH0. Supported peripheral buses: General.
A4XTAL1Digital_IOSignal terminal XTAL1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XTAL1. Supported peripheral buses: RTC/CLK.
A5VCI IN3#/GPIO000_Digital_IOSignal terminal VCI IN3#/GPIO000_ (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VCI IN3#/GPIO000_. Supported peripheral buses: General.
A6IOA6Digital_IOGeneral Purpose Digital I/O Pin IOA6
A7IOA7Digital_IOGeneral Purpose Digital I/O Pin IOA7
A8GPIO004/I2C00_SCLDigital_IOSignal terminal GPIO004/I2C00_SCL (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO004/I2C00_SCL. Supported peripheral buses: I2C.
A9GPIO132/I2C06_SDADigital_IOSignal terminal GPIO132/I2C06_SDA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO132/I2C06_SDA. Supported peripheral buses: I2C.
A10GPIO125/PVT_CLKDigital_IOSignal terminal GPIO125/PVT_CLK (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO125/PVT_CLK. Supported peripheral buses: General.
B1BGPO0/GPIO253Digital_IOSignal terminal BGPO0/GPIO253 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: BGPO0/GPIO253. Supported peripheral buses: General.
B2GPIO051/ICT1_TACH1Digital_IOSignal terminal GPIO051/ICT1_TACH1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO051/ICT1_TACH1. Supported peripheral buses: General.
B3IOB3Digital_IOGeneral Purpose Digital I/O Pin IOB3
B4VCI IN0#/GPIO163_Digital_IOSignal terminal VCI IN0#/GPIO163_ (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VCI IN0#/GPIO163_. Supported peripheral buses: General.
B5GPIO003/I2C00_SDADigital_IOSignal terminal GPIO003/I2C00_SDA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO003/I2C00_SDA. Supported peripheral buses: I2C.
B6IOB6Digital_IOGeneral Purpose Digital I/O Pin IOB6
B7IOB7Digital_IOGeneral Purpose Digital I/O Pin IOB7
B8IOB8Digital_IOGeneral Purpose Digital I/O Pin IOB8
B9GPIO157/LED1Digital_IOSignal terminal GPIO157/LED1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO157/LED1. Supported peripheral buses: General.
B10GPIO122/PVT_IO1Digital_IOSignal terminal GPIO122/PVT_IO1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO122/PVT_IO1. Supported peripheral buses: General.
C1VTR_PLLDigital_IOSignal terminal VTR_PLL (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VTR_PLL. Supported peripheral buses: General.
C2IOC2Digital_IOGeneral Purpose Digital I/O Pin IOC2
C5IOC5Digital_IOGeneral Purpose Digital I/O Pin IOC5
C6GPIO127Digital_IOSignal terminal GPIO127 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO127. Supported peripheral buses: General.
C9GPIO046/ICT11Digital_IOSignal terminal GPIO046/ICT11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO046/ICT11. Supported peripheral buses: General.
C10GPIO124/PVT CS#/ICT12_Digital_IOSignal terminal GPIO124/PVT CS#/ICT12_ (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO124/PVT CS#/ICT12_. Supported peripheral buses: General.
D1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D2nRESET_INDigital_IOActive-low hardware reset terminal (nRESET_IN): pulling this pin Low resets the processor core and peripherals.
D4VSS_ANALOGGND0V electrical ground return terminal (VSS_ANALOG) for internal core logic, I/O drivers, and analog sub-blocks.
D5VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
D6IOD6Digital_IOGeneral Purpose Digital I/O Pin IOD6
D7GPIO156/LED0Digital_IOSignal terminal GPIO156/LED0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO156/LED0. Supported peripheral buses: General.
D9IOD9Digital_IOGeneral Purpose Digital I/O Pin IOD9
D10GPIO121/PVT_IO0Digital_IOSignal terminal GPIO121/PVT_IO0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO121/PVT_IO0. Supported peripheral buses: General.
E1VTR_REGDigital_IOSignal terminal VTR_REG (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VTR_REG. Supported peripheral buses: General.
E2GPIO106/PWROKDigital_IOSignal terminal GPIO106/PWROK (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO106/PWROK. Supported peripheral buses: General.
E3VREF_ADCAnalogSignal terminal VREF_ADC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VREF_ADC. Supported peripheral buses: ADC.
E4VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E7IOE7Digital_IOGeneral Purpose Digital I/O Pin IOE7
E8JTAG RST#_Digital_IOSignal terminal JTAG RST#_ (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: JTAG RST#_. Supported peripheral buses: SWD/JTAG.
E9IOE9Digital_IOGeneral Purpose Digital I/O Pin IOE9
E10GPIO123/PVT_IO2Digital_IOSignal terminal GPIO123/PVT_IO2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO123/PVT_IO2. Supported peripheral buses: General.
F1VR_CAPDigital_IOSignal terminal VR_CAP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VR_CAP. Supported peripheral buses: General.
F2IOF2Digital_IOGeneral Purpose Digital I/O Pin IOF2
F3GPIO057/VCC_PWRGDPower_InPrimary positive power supply input (GPIO057/VCC_PWRGD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
F4VTR_ANALOGDigital_IOSignal terminal VTR_ANALOG (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VTR_ANALOG. Supported peripheral buses: General.
F7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F8GPIO171/UART1_RXDigital_IOSignal terminal GPIO171/UART1_RX (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO171/UART1_RX. Supported peripheral buses: UART.
F9IOF9Digital_IOGeneral Purpose Digital I/O Pin IOF9
F10GPIO126/PVT_IO3Digital_IOSignal terminal GPIO126/PVT_IO3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO126/PVT_IO3. Supported peripheral buses: General.
G1IOG1Digital_IOGeneral Purpose Digital I/O Pin IOG1
G2IOG2Digital_IOGeneral Purpose Digital I/O Pin IOG2
G4GPIO034Digital_IOSignal terminal GPIO034 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO034. Supported peripheral buses: General.
G5VTR2Digital_IOSignal terminal VTR2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VTR2. Supported peripheral buses: General.
G6VTR1Digital_IOSignal terminal VTR1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VTR1. Supported peripheral buses: General.
G7GPIO030/I2C10_SDADigital_IOSignal terminal GPIO030/I2C10_SDA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO030/I2C10_SDA. Supported peripheral buses: I2C.
G9GPIO112Digital_IOSignal terminal GPIO112 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO112. Supported peripheral buses: General.
G10GPIO113/ICT9Digital_IOSignal terminal GPIO113/ICT9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO113/ICT9. Supported peripheral buses: General.
H1GPIO204/ADC04AnalogSignal terminal GPIO204/ADC04 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO204/ADC04. Supported peripheral buses: ADC.
H2IOH2Digital_IOGeneral Purpose Digital I/O Pin IOH2
H5GPIO032Digital_IOSignal terminal GPIO032 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO032. Supported peripheral buses: General.
H6GPIO015/PWM7/ICT10Digital_IOSignal terminal GPIO015/PWM7/ICT10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO015/PWM7/ICT10. Supported peripheral buses: PWM.
H9GPIO107/I2C10_SCLDigital_IOSignal terminal GPIO107/I2C10_SCL (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO107/I2C10_SCL. Supported peripheral buses: I2C.
H10GPIO120Digital_IOSignal terminal GPIO120 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO120. Supported peripheral buses: General.
ExplorePartsPackagesMFRsUpload