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AOD4184A (TO-252) — Symbol, Footprint IPC-7351B & 3D STEP Model

AOD4184A

AOSID: C99124TO-252 · 3 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · AOD4184A (TO-252)1G2D3SGrid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.210.25.10-5.1-10.2mm
2. 2D FOOTPRINT
213E=6.50mm · Pitch e=0.50mmD=6.10mm-7-5-3-1135796420-2-4-6mm
3. 3D CAD MODEL
Package Body: 6.50mm × 6.10mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (3/3)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1GI/OMultiplexed I/O & Peripheral Pin G (General)
2DI/OMultiplexed I/O & Peripheral Pin D (General)
3SI/OMultiplexed I/O & Peripheral Pin S (General)
PIN 1 G
I/O
Multiplexed I/O & Peripheral Pin G (General)
Design note: Signal terminal G (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: G. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 8 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: AOD4184A (AOS · TO-252)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
AOD4184A (TO-252) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
AOD4184A (TO-252) - 2. Standard Pinout (Top View)
True package pinout (3 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
AOD4184A (TO-252) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
AOD4184A (TO-252) - 4. Package Dimensions (D×E×A)
TO-252 · 6.50×6.10mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
AOD4184A (TO-252) - 5. Recommended Land Pattern
IPC-7351B Footprint (3 Pads)Expand ›
6. Application SchematicSCHEMATIC
AOD4184A (TO-252) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (8 figures · Page 1/1)
Showing 1–8 of 8 uncropped original figures for AOD4184
P1 · p01_fig03EXACT PACKAGE
AOD4184A (TO-252) — V Maximum Units Parameter Absolute Maximum Ratings TA=25°C unless otherwise noted
V Maximum Units Parameter Absolute Maximum Ratings TA=25°C unless otherwise noted
P1 · p01_fig012616×3601px
AOD4184A (TO-252) — Rev0 : Sep 2009 www.aosmd.com Page 1 of 6
Rev0 : Sep 2009 www.aosmd.com Page 1 of 6
P1 · p01_fig02203×246px
AOD4184A (TO-252) — D
D
P1 · p01_fig01P1
AOD4184A (TO-252) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P1 · p01_fig02P1
AOD4184A (TO-252) — Datasheet Page 1 (p01_fig02)
Datasheet Page 1 (p01_fig02)
P1 · p01_fig03P1
AOD4184A (TO-252) — Datasheet Page 1 (p01_fig03)
Datasheet Page 1 (p01_fig03)
P8 · p08_fig013038×3409px
AOD4184A (TO-252) — 0.020 0.508 L2 | DIMENSION IN MILLIMETERS | 2.184 | MIN. | A | S Y M B O L NOM. | 2.286 | MAX. | 2.388 | MAX. | DIMENSIONS IN INCHES | 0.086 | MIN. NOM. | 0.090 0.094 | 0.005 ----- 0.000 A1 0.000 0.127 ----- | 0.045 0.041 0.035 A2 0.889 1.1
0.020 0.508 L2 | DIMENSION IN MILLIMETERS | 2.184 | MIN. | A | S Y M B O L NOM. | 2.286 | MAX. | 2.388 | MAX. | DIMENSIONS IN INCHES | 0.086 | MIN. NOM. | 0.090 0.094 | 0.005 ----- 0.000 A1 0.000 0.127 ----- | 0.045 0.041 0.035 A2 0.889 1.1
P8 · p08_fig01P8
AOD4184A (TO-252) — Datasheet Page 8 (p08_fig01)
Datasheet Page 8 (p08_fig01)

Technical Specifications & Part Details (AOD4184A)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:AOD4184A (TO-252) is a 3-pin standard electronic & interconnect component featuring a 6.50 × 6.10 × 2.30 mm mechanical envelope (lead pitch e = 0.00 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated Standard I/O / Passive interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
1MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
6.50 × 6.10 × 2.30 mm (A1=0.13 mm)
Package family: TO252 (TO-252)
Pin Count & Lead PitchN / e
3 Pins
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Standard I/O / Passive
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol3 auto-grouped pins
OK
IPC-7351B Land Pattern3 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteEPAD 6.50×6.00mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TO-252)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
6.50 × 6.10 mm
Height (A) & Pitch (e)IPC-7351B
A=2.30mm · e=0.50mm
Pad Size (W × L)Level B
1.30 × 2.80 mm
Pins / Total PadsTopology
3P / 3Pad (SOT_TAB)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
TO-252
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — AOD4184A (TO-252)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of AOD4184A (TO-252)?

Manufactured by AOS, the AOD4184A is housed in a TO-252 package with 3 pins and a 0.50 mm lead pitch. Key pins include: 1 (G: Multiplexed I/O & Peripheral Pin G (General)), 2 (D: Multiplexed I/O & Peripheral Pin D (General)), 3 (S: Multiplexed I/O & Peripheral Pin S (General)).

What are the IPC-7351B PCB Footprint dimensions for AOD4184A?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), AOD4184A (TO-252) has a nominal body envelope of 6.10 × 6.50 mm, pitch e = 0.50 mm, and 3 copper pads plus a central exposed thermal pad (EPAD) of 6.50 × 6.00 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for AOD4184A?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for AOD4184A (AOS, TO-252) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (3 pins) & AOD4184 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1GDigital_IOSignal terminal G (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: G. Supported peripheral buses: General.
2DDigital_IOSignal terminal D (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D. Supported peripheral buses: General.
3SDigital_IOSignal terminal S (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: S. Supported peripheral buses: General.
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