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FT232RL-REEL (SSOP-28-208mil) — Symbol, Footprint IPC-7351B & 3D STEP Model

FT232RL-REEL

FTDIID: C8690SSOP-28-208mil · 28 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · FT232RL-REEL (SSOP-28-208mil)1TXD2DTR3RTS4VCCIO5RXD6RI7GND8NC9DSR10DCD11CTS12CBUS413CBUS214CBUS328OSCO27OSCI26TEST25AGND24NC23CBUS022CBUS121GND20VCC19RESET18GND173V3OUT16USBDM15USBDPGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.822.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728E=5.30mm · Pitch e=0.65mmD=10.20mm-7-5-3-113577531-1-3-5-7mm
3. 3D CAD MODEL
Package Body: 5.30mm × 10.20mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (28/28)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1TXDI/OMultiplexed I/O & Peripheral Pin TXD (UART)
2DTRI/OMultiplexed I/O & Peripheral Pin DTR (UART)
3RTSI/OMultiplexed I/O & Peripheral Pin RTS (UART)
4VCCIOPowerPower Supply Input (VCCIO — 3.3 - 5.25 V)
5RXDI/OMultiplexed I/O & Peripheral Pin RXD (UART)
6RII/OMultiplexed I/O & Peripheral Pin RI (General)
7GNDGNDGround Reference Pin (GND)
8NCI/OMultiplexed I/O & Peripheral Pin NC (General)
9DSRI/OMultiplexed I/O & Peripheral Pin DSR (UART)
10DCDI/OMultiplexed I/O & Peripheral Pin DCD (General)
11CTSI/OMultiplexed I/O & Peripheral Pin CTS (UART)
12CBUS4I/OMultiplexed I/O & Peripheral Pin CBUS4 (General)
13CBUS2I/OMultiplexed I/O & Peripheral Pin CBUS2 (General)
14CBUS3I/OMultiplexed I/O & Peripheral Pin CBUS3 (General)
15USBDPI/OMultiplexed I/O & Peripheral Pin USBDP (USB)
16USBDMI/OMultiplexed I/O & Peripheral Pin USBDM (USB)
173V3OUTPowerPower Supply Input (3V3OUT — 3.3 - 5.25 V)
18GNDGNDGround Reference Pin (GND)
19RESETISystem Enable & Hardware Reset (RESET)
20VCCPowerPower Supply Input (VCC — 3.3 - 5.25 V)
21GNDGNDGround Reference Pin (GND)
22CBUS1I/OMultiplexed I/O & Peripheral Pin CBUS1 (General)
23CBUS0I/OMultiplexed I/O & Peripheral Pin CBUS0 (General)
24NCI/OMultiplexed I/O & Peripheral Pin NC (General)
25AGNDGNDGround Reference Pin (AGND)
26TESTI/OMultiplexed I/O & Peripheral Pin TEST (General)
27OSCII/OMultiplexed I/O & Peripheral Pin OSCI (RTC/CLK)
28OSCOI/OMultiplexed I/O & Peripheral Pin OSCO (RTC/CLK)
PIN 1 TXD
I/O
Multiplexed I/O & Peripheral Pin TXD (UART)
Design note: Signal terminal TXD (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: TXD. Supported peripheral buses: UART.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 12 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: FT232RL-REEL (FTDI · SSOP-28-208mil)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
FT232RL-REEL (SSOP-28-208mil) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
FT232RL-REEL (SSOP-28-208mil) - 2. Standard Pinout (Top View)
True package pinout (28 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
FT232RL-REEL (SSOP-28-208mil) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
FT232RL-REEL (SSOP-28-208mil) - 4. Package Dimensions (D×E×A)
SSOP-28-208mil · 5.30×10.20mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
FT232RL-REEL (SSOP-28-208mil) - 5. Recommended Land Pattern
IPC-7351B Footprint (28 Pads)Expand ›
6. Application SchematicSCHEMATIC
FT232RL-REEL (SSOP-28-208mil) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (12 figures · Page 1/1)
Showing 1–12 of 12 uncropped original figures for FT232
P12 · p12_fig01EXACT PACKAGE
FT232RL-REEL (SSOP-28-208mil) — Figure 6 - SSOP-28 Package Dimensions
Figure 6 - SSOP-28 Package Dimensions
P1 · p01_fig011068×416px
FT232RL-REEL (SSOP-28-208mil) — Future Technology Devices International Ltd.
Future Technology Devices International Ltd.
P1 · p01_fig01P1
FT232RL-REEL (SSOP-28-208mil) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P12 · p12_fig021026×928px
FT232RL-REEL (SSOP-28-208mil) — 12° Typ | 0.75 +/-0.20 | 0.09 | 2.00 Max | 1.75 +/- 0.10 | 0.05 Min | 10.20 +/-0.30
12° Typ | 0.75 +/-0.20 | 0.09 | 2.00 Max | 1.75 +/- 0.10 | 0.05 Min | 10.20 +/-0.30
P12 · p12_fig031565×505px
FT232RL-REEL (SSOP-28-208mil) — 2.00 Max
2.00 Max
P12 · p12_fig01P12
FT232RL-REEL (SSOP-28-208mil) — Datasheet Page 12 (p12_fig01)
Datasheet Page 12 (p12_fig01)
P14 · p14_fig01P14
FT232RL-REEL (SSOP-28-208mil) — Datasheet Page 14 (p14_fig01)
Datasheet Page 14 (p14_fig01)
P13 · p13_fig01All Packages in PDF
FT232RL-REEL (SSOP-28-208mil) — BOTTOM
BOTTOM
P13 · p13_fig02All Packages in PDF
FT232RL-REEL (SSOP-28-208mil) — Figure 7 - QFN-32 Package Dimensions
Figure 7 - QFN-32 Package Dimensions
P13 · p13_fig03All Packages in PDF
FT232RL-REEL (SSOP-28-208mil) — Figure 7 - QFN-32 Package Dimensions
Figure 7 - QFN-32 Package Dimensions
P14 · p14_fig01All Packages in PDF
FT232RL-REEL (SSOP-28-208mil) — Figure 8 - Typical Pad Layout for QFN-32 Package
Figure 8 - Typical Pad Layout for QFN-32 Package
P14 · p14_fig02All Packages in PDF
FT232RL-REEL (SSOP-28-208mil) — Figure 9 - Typical Solder Paste Diagram for QFN-32 Package FT232R USB UART I.C. Datasheet Version 1.04 © Future Technology Devices International Ltd. 2005
Figure 9 - Typical Solder Paste Diagram for QFN-32 Package FT232R USB UART I.C. Datasheet Version 1.04 © Future Technology Devices International Ltd. 2005

Technical Specifications & Part Details (FT232RL-REEL)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:FT232RL-REEL (SSOP-28-208mil) is a 28-pin standard electronic & interconnect component featuring a 10.20 × 5.30 × 1.85 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 3.3 - 5.25 V supply operation across -40°C to 85°C with integrated USB, UART, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.3 - 5.25 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to 85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
6MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
10.20 × 5.30 × 1.85 mm (A1=0.00 mm)
Package family: TSSOP (SSOP-28-208mil)
Pin Count & Lead PitchN / e
28 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol28 auto-grouped pins
OK
IPC-7351B Land Pattern28 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SSOP-28-208mil)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
10.20 × 5.30 mm
Height (A) & Pitch (e)IPC-7351B
A=2.00mm · e=0.65mm
Pad Size (W × L)Level B
0.42 × 1.60 mm
Pins / Total PadsTopology
28P / 28Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SSOP-28-208mil
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — FT232RL-REEL (SSOP-28-208mil)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of FT232RL-REEL (SSOP-28-208mil)?

Manufactured by FTDI, the FT232RL-REEL is housed in a SSOP-28-208mil package with 28 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 3.3 - 5.25 V. Key pins include: 1 (TXD: Multiplexed I/O & Peripheral Pin TXD (UART)), 2 (DTR: Multiplexed I/O & Peripheral Pin DTR (UART)), 3 (RTS: Multiplexed I/O & Peripheral Pin RTS (UART)), 4 (VCCIO: Power Supply Input (VCCIO — 3.3 - 5.25 V)), 5 (RXD: Multiplexed I/O & Peripheral Pin RXD (UART)), 6 (RI: Multiplexed I/O & Peripheral Pin RI (General)).

What are the IPC-7351B PCB Footprint dimensions for FT232RL-REEL?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), FT232RL-REEL (SSOP-28-208mil) has a nominal body envelope of 5.30 × 10.20 mm, pitch e = 0.65 mm, and 28 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for FT232RL-REEL?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for FT232RL-REEL (FTDI, SSOP-28-208mil) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (28 pins) & FT232 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1TXDDigital_IOSignal terminal TXD (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: TXD. Supported peripheral buses: UART.
2DTRDigital_IOSignal terminal DTR (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: DTR. Supported peripheral buses: UART.
3RTSDigital_IOSignal terminal RTS (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: RTS. Supported peripheral buses: UART.
4VCCIOPower_InPrimary positive power supply input (VCCIO) operating in the 3.3 - 5.25 V domain (Max rating: 5.25V).
5RXDDigital_IOSignal terminal RXD (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: RXD. Supported peripheral buses: UART.
6RIDigital_IOSignal terminal RI (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: RI. Supported peripheral buses: General.
7GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
8NCDigital_IOSignal terminal NC (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
9DSRDigital_IOSignal terminal DSR (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: DSR. Supported peripheral buses: UART.
10DCDDigital_IOSignal terminal DCD (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: DCD. Supported peripheral buses: General.
11CTSDigital_IOSignal terminal CTS (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: CTS. Supported peripheral buses: UART.
12CBUS4Digital_IOSignal terminal CBUS4 (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: CBUS4. Supported peripheral buses: General.
13CBUS2Digital_IOSignal terminal CBUS2 (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: CBUS2. Supported peripheral buses: General.
14CBUS3Digital_IOSignal terminal CBUS3 (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: CBUS3. Supported peripheral buses: General.
15USBDPDigital_IOSignal terminal USBDP (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: USBDP. Supported peripheral buses: USB.
16USBDMDigital_IOSignal terminal USBDM (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: USBDM. Supported peripheral buses: USB.
173V3OUTPower_InPrimary positive power supply input (3V3OUT) operating in the 3.3 - 5.25 V domain (Max rating: 5.25V).
18GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
19RESETDigital_IOActive-low hardware reset terminal (RESET): pulling this pin Low resets the processor core and peripherals.
20VCCPower_InPrimary positive power supply input (VCC) operating in the 3.3 - 5.25 V domain (Max rating: 5.25V).
21GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
22CBUS1Digital_IOSignal terminal CBUS1 (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: CBUS1. Supported peripheral buses: General.
23CBUS0Digital_IOSignal terminal CBUS0 (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: CBUS0. Supported peripheral buses: General.
24NCDigital_IOSignal terminal NC (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
25AGNDGND0V electrical ground return terminal (AGND) for internal core logic, I/O drivers, and analog sub-blocks.
26TESTDigital_IOSignal terminal TEST (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: TEST. Supported peripheral buses: General.
27OSCIDigital_IOSignal terminal OSCI (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: OSCI. Supported peripheral buses: RTC/CLK.
28OSCODigital_IOSignal terminal OSCO (I/O, 3.3 - 5.25 V domain). Multiplexed alternate functions: OSCO. Supported peripheral buses: RTC/CLK.
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