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SSOP-20-208mil · 20P
Synchronized Pinout (Symbol / 2D / 3D) (28/28)
Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D| Pin | Symbol | Type | Function (EN) |
|---|---|---|---|
| 1 | INT# | I/O | Multiplexed I/O & Peripheral Pin INT# (General) |
| 2 | RSTI | I/O | Multiplexed I/O & Peripheral Pin RSTI (General) |
| 3 | WR# | I/O | Multiplexed I/O & Peripheral Pin WR# (General) |
| 4 | V3 | Power | Regulated Power Output (V3 — 3.3V / 5.0V Standard Logic) |
| 5 | UEN | I/O | Multiplexed I/O & Peripheral Pin UEN (General) |
| 6 | CKO | I/O | Multiplexed I/O & Peripheral Pin CKO (General) |
| 7 | SLP | I/O | Multiplexed I/O & Peripheral Pin SLP (General) |
| 8 | A0 | I/O | Multiplexed I/O & Peripheral Pin A0 (General) |
| 9 | GND | GND | Ground Reference Pin (GND) |
| 10 | XI | I/O | Multiplexed I/O & Peripheral Pin XI (RTC/CLK) |
| 11 | XO | I/O | Multiplexed I/O & Peripheral Pin XO (RTC/CLK) |
| 12 | GND | GND | Ground Reference Pin (GND) |
| 13 | XI | I/O | Multiplexed I/O & Peripheral Pin XI (RTC/CLK) |
| 14 | XO | I/O | Multiplexed I/O & Peripheral Pin XO (RTC/CLK) |
| 15 | D0 | I/O | Multiplexed I/O & Peripheral Pin D0 (General) |
| 16 | D1 | I/O | Multiplexed I/O & Peripheral Pin D1 (General) |
| 17 | D2 | I/O | Multiplexed I/O & Peripheral Pin D2 (General) |
| 18 | SCS/D3 | I/O | Multiplexed I/O & Peripheral Pin SCS/D3 (General) |
| 19 | D4 | I/O | Multiplexed I/O & Peripheral Pin D4 (General) |
| 20 | SCK/D5 | I/O | Multiplexed I/O & Peripheral Pin SCK/D5 (SPI) |
| 21 | SDI/D6 | I/O | Multiplexed I/O & Peripheral Pin SDI/D6 (General) |
| 22 | SDO/D7 | I/O | Multiplexed I/O & Peripheral Pin SDO/D7 (General) |
| 23 | VCC | Power | Power Supply Input (VCC — 3.3V / 5.0V Standard Logic) |
| 24 | ACT# | I/O | Multiplexed I/O & Peripheral Pin ACT# (General) |
| 25 | RST | I/O | Multiplexed I/O & Peripheral Pin RST (General) |
| 26 | RST# | I/O | Multiplexed I/O & Peripheral Pin RST# (General) |
| 27 | CS# | I/O | Multiplexed I/O & Peripheral Pin CS# (General) |
| 28 | VCC | Power | Power Supply Input (VCC — 3.3V / 5.0V Standard Logic) |
PIN 1 INT#
I/OMultiplexed I/O & Peripheral Pin INT# (General)
Design note: Signal terminal INT# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: INT#. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner
Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 9 Extracted Figures)
Read the original datasheet PDF directly or click any drawing to view fullscreen1. Realistic 3D PackageREPRESENTATIVE
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
True package pinout (28 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
SOP-28-300mil · 7.50×17.90mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
IPC-7351B Footprint (28 Pads)Expand ›
6. Application SchematicSCHEMATIC
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)
Showing 1–9 of 9 uncropped original figures for CH374
P1 · p01_fig011648×1325px
P2 · p02_fig011355×1009px
P2 · p02_fig021698×307px
P2 · p02_fig01P2
P21 · p21_fig011219×690px
P22 · p22_fig011344×690px
P22 · p22_fig02933×526px
P22 · p22_fig01P22
P23 · p23_fig011154×781px
Technical Specifications & Part Details (CH374S)
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)Detailed Overview:CH374S (SOP-28-300mil) is a 28-pin standard electronic & interconnect component featuring a 17.90 × 7.50 × 2.50 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
28MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
17.90 × 7.50 × 2.50 mm (A1=0.15 mm)
Package family: SOP (SOP-28-300mil)
Pin Count & Lead PitchN / e
28 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.
5-Point Standards Verification
Automated compliance checks prior to exportIEEE-315 Symbol28 auto-grouped pins
IPC-7351B Land Pattern28 pads · Pitch 1.27mm
IPC-7525 60% Solder PasteReflow 1:1 Standard
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
Hardware Verification & Community Engineering Reviews
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet5.00 PCB Verified
IPC-7351B
Select package variant or sibling MPN sharing this datasheetFamily Variants & Same Datasheet Chips — CH374 (3)
SSOP-24-208mil · 24P
SOP-28-300mil · 28P
Mechanical Dimensions & Land Pattern (SOP-28-300mil)
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
17.90 × 7.50 mm
Height (A) & Pitch (e)IPC-7351B
A=2.50mm · e=1.27mm
Pad Size (W × L)Level B
0.60 × 1.90 mm
Pins / Total PadsTopology
28P / 28Pad (DUAL_ROW)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit SOP-28-300mil | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — CH374S (SOP-28-300mil)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of CH374S (SOP-28-300mil)?
Manufactured by WCH, the CH374S is housed in a SOP-28-300mil package with 28 pins and a 1.27 mm lead pitch. Key pins include: 1 (INT#: Multiplexed I/O & Peripheral Pin INT# (General)), 2 (RSTI: Multiplexed I/O & Peripheral Pin RSTI (General)), 3 (WR#: Multiplexed I/O & Peripheral Pin WR# (General)), 4 (V3: Regulated Power Output (V3 — 3.3V / 5.0V Standard Logic)), 5 (UEN: Multiplexed I/O & Peripheral Pin UEN (General)), 6 (CKO: Multiplexed I/O & Peripheral Pin CKO (General)).
What are the IPC-7351B PCB Footprint dimensions for CH374S?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH374S (SOP-28-300mil) has a nominal body envelope of 7.50 × 17.90 mm, pitch e = 1.27 mm, and 28 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH374S?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH374S (WCH, SOP-28-300mil) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (28 pins) & CH374 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | INT# | Digital_IO | Signal terminal INT# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: INT#. Supported peripheral buses: General. |
| 2 | RSTI | Digital_IO | Signal terminal RSTI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSTI. Supported peripheral buses: General. |
| 3 | WR# | Digital_IO | Signal terminal WR# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: WR#. Supported peripheral buses: General. |
| 4 | V3 | Power_Out | Regulated power output rail (V3) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 5 | UEN | Digital_IO | Signal terminal UEN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: UEN. Supported peripheral buses: General. |
| 6 | CKO | Digital_IO | Signal terminal CKO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CKO. Supported peripheral buses: General. |
| 7 | SLP | Digital_IO | Signal terminal SLP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SLP. Supported peripheral buses: General. |
| 8 | A0 | Digital_IO | Signal terminal A0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: A0. Supported peripheral buses: General. |
| 9 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 10 | XI | Digital_IO | Signal terminal XI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XI. Supported peripheral buses: RTC/CLK. |
| 11 | XO | Digital_IO | Signal terminal XO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XO. Supported peripheral buses: RTC/CLK. |
| 12 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 13 | XI | Digital_IO | Signal terminal XI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XI. Supported peripheral buses: RTC/CLK. |
| 14 | XO | Digital_IO | Signal terminal XO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XO. Supported peripheral buses: RTC/CLK. |
| 15 | D0 | Digital_IO | Signal terminal D0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D0. Supported peripheral buses: General. |
| 16 | D1 | Digital_IO | Signal terminal D1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D1. Supported peripheral buses: General. |
| 17 | D2 | Digital_IO | Signal terminal D2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D2. Supported peripheral buses: General. |
| 18 | SCS/D3 | Digital_IO | Signal terminal SCS/D3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SCS/D3. Supported peripheral buses: General. |
| 19 | D4 | Digital_IO | Signal terminal D4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D4. Supported peripheral buses: General. |
| 20 | SCK/D5 | Digital_IO | Signal terminal SCK/D5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SPI. Supported peripheral buses: SPI. |
| 21 | SDI/D6 | Digital_IO | Signal terminal SDI/D6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SDI/D6. Supported peripheral buses: General. |
| 22 | SDO/D7 | Digital_IO | Signal terminal SDO/D7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SDO/D7. Supported peripheral buses: General. |
| 23 | VCC | Power_In | Primary positive power supply input (VCC) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| 24 | ACT# | Digital_IO | Signal terminal ACT# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: ACT#. Supported peripheral buses: General. |
| 25 | RST | Digital_IO | Signal terminal RST (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RST. Supported peripheral buses: General. |
| 26 | RST# | Digital_IO | Signal terminal RST# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RST#. Supported peripheral buses: General. |
| 27 | CS# | Digital_IO | Signal terminal CS# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CS#. Supported peripheral buses: General. |
| 28 | VCC | Power_In | Primary positive power supply input (VCC) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |