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ULN2003ADR (SOIC-16) — Symbol, Footprint IPC-7351B & 3D STEP Model

ULN2003ADR

TIID: C7512SOIC-16 · 16 Pins · Pitch 1.27mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · ULN2003ADR (SOIC-16)11B22B33B44B55B66B77B8E161C152C143C134C125C116C107C9COMGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.815.210.25.10-5.1-10.2-15.2mm
2. 2D FOOTPRINT
12345678910111213141516E=3.90mm · Pitch e=1.27mmD=9.90mm-6-5-4-3-2-1012345676543210-1-2-3-4-5-6-7mm
3. 3D CAD MODEL
Package Body: 3.90mm × 9.90mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (16/16)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
11BI/OMultiplexed I/O & Peripheral Pin 1B (General)
22BI/OMultiplexed I/O & Peripheral Pin 2B (General)
33BI/OMultiplexed I/O & Peripheral Pin 3B (General)
44BI/OMultiplexed I/O & Peripheral Pin 4B (General)
55BI/OMultiplexed I/O & Peripheral Pin 5B (General)
66BI/OMultiplexed I/O & Peripheral Pin 6B (General)
77BI/OMultiplexed I/O & Peripheral Pin 7B (General)
8EI/OMultiplexed I/O & Peripheral Pin E (General)
9COMI/OMultiplexed I/O & Peripheral Pin COM (General)
107CI/OMultiplexed I/O & Peripheral Pin 7C (General)
116CI/OMultiplexed I/O & Peripheral Pin 6C (General)
125CI/OMultiplexed I/O & Peripheral Pin 5C (General)
134CI/OMultiplexed I/O & Peripheral Pin 4C (General)
143CI/OMultiplexed I/O & Peripheral Pin 3C (General)
152CI/OMultiplexed I/O & Peripheral Pin 2C (General)
161CI/OMultiplexed I/O & Peripheral Pin 1C (General)
PIN 1 1B
I/O
Multiplexed I/O & Peripheral Pin 1B (General)
Design note: Signal terminal 1B (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 1B. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 4 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: ULN2003ADR (TI · SOIC-16)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
ULN2003ADR (SOIC-16) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
ULN2003ADR (SOIC-16) - 2. Standard Pinout (Top View)
True package pinout (16 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
ULN2003ADR (SOIC-16) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
ULN2003ADR (SOIC-16) - 4. Package Dimensions (D×E×A)
SOIC-16 · 3.90×9.90mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
ULN2003ADR (SOIC-16) - 5. Recommended Land Pattern
IPC-7351B Footprint (16 Pads)Expand ›
6. Application SchematicSCHEMATIC
ULN2003ADR (SOIC-16) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (4 figures · Page 1/1)
Showing 1–4 of 4 uncropped original figures for ULN2003
P2 · p02_fig011084×1266px
ULN2003ADR (SOIC-16) — LOGIC DIAGRAM
LOGIC DIAGRAM
P12 · p12_fig012748×1412px
ULN2003ADR (SOIC-16) — Figure 19. P-MOS to Load Figure 20. TTL to Load
Figure 19. P-MOS to Load Figure 20. TTL to Load
P12 · p12_fig022874×1417px
ULN2003ADR (SOIC-16) — Figure 21. Buffer for Higher Current Loads Figure 22. Use of Pullup Resistors to Increase
Figure 21. Buffer for Higher Current Loads Figure 22. Use of Pullup Resistors to Increase
P12 · p12_fig01P12
ULN2003ADR (SOIC-16) — Datasheet Page 12 (p12_fig01)
Datasheet Page 12 (p12_fig01)

Technical Specifications & Part Details (ULN2003ADR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:ULN2003ADR (SOIC-16) is a 16-pin standard electronic & interconnect component featuring a 9.90 × 3.90 × 1.75 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 6 V to 15 V supply operation across 20°C to 70°C with integrated Standard I/O / Passive interfaces.
Operating Supply VoltageV_CC / V_DD
6 V to 15 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
20°C to 70°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
1 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
9.90 × 3.90 × 1.75 mm (A1=0.00 mm)
Package family: SOIC (SOIC-16)
Pin Count & Lead PitchN / e
16 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Standard I/O / Passive
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol16 auto-grouped pins
OK
IPC-7351B Land Pattern16 pads · Pitch 1.27mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOIC-16)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
9.90 × 3.90 mm
Height (A) & Pitch (e)IPC-7351B
A=1.75mm · e=1.27mm
Pad Size (W × L)Level B
0.60 × 1.55 mm
Pins / Total PadsTopology
16P / 16Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SOIC-16
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — ULN2003ADR (SOIC-16)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ULN2003ADR (SOIC-16)?

Manufactured by TI, the ULN2003ADR is housed in a SOIC-16 package with 16 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 6 V to 15 V. Key pins include: 1 (1B: Multiplexed I/O & Peripheral Pin 1B (General)), 2 (2B: Multiplexed I/O & Peripheral Pin 2B (General)), 3 (3B: Multiplexed I/O & Peripheral Pin 3B (General)), 4 (4B: Multiplexed I/O & Peripheral Pin 4B (General)), 5 (5B: Multiplexed I/O & Peripheral Pin 5B (General)), 6 (6B: Multiplexed I/O & Peripheral Pin 6B (General)).

What are the IPC-7351B PCB Footprint dimensions for ULN2003ADR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ULN2003ADR (SOIC-16) has a nominal body envelope of 3.90 × 9.90 mm, pitch e = 1.27 mm, and 16 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ULN2003ADR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ULN2003ADR (TI, SOIC-16) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (16 pins) & ULN2003 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
11BDigital_IOSignal terminal 1B (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 1B. Supported peripheral buses: General.
22BDigital_IOSignal terminal 2B (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 2B. Supported peripheral buses: General.
33BDigital_IOSignal terminal 3B (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 3B. Supported peripheral buses: General.
44BDigital_IOSignal terminal 4B (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 4B. Supported peripheral buses: General.
55BDigital_IOSignal terminal 5B (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 5B. Supported peripheral buses: General.
66BDigital_IOSignal terminal 6B (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 6B. Supported peripheral buses: General.
77BDigital_IOSignal terminal 7B (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 7B. Supported peripheral buses: General.
8EDigital_IOSignal terminal E (I/O, 6 V to 15 V domain). Multiplexed alternate functions: E. Supported peripheral buses: General.
9COMDigital_IOSignal terminal COM (I/O, 6 V to 15 V domain). Multiplexed alternate functions: COM. Supported peripheral buses: General.
107CDigital_IOSignal terminal 7C (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 7C. Supported peripheral buses: General.
116CDigital_IOSignal terminal 6C (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 6C. Supported peripheral buses: General.
125CDigital_IOSignal terminal 5C (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 5C. Supported peripheral buses: General.
134CDigital_IOSignal terminal 4C (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 4C. Supported peripheral buses: General.
143CDigital_IOSignal terminal 3C (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 3C. Supported peripheral buses: General.
152CDigital_IOSignal terminal 2C (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 2C. Supported peripheral buses: General.
161CDigital_IOSignal terminal 1C (I/O, 6 V to 15 V domain). Multiplexed alternate functions: 1C. Supported peripheral buses: General.
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