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KP10751VPA (SOP-4) — Symbol, Footprint IPC-7351B & 3D STEP Model

KP10751VPA

Kiwi InstrumentsID: C7463391SOP-4 · 4 Pins · Pitch 2.54mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · KP10751VPA (SOP-4)1GND2HV4CS3DrainGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.810.25.10-5.1-10.2mm
2. 2D FOOTPRINT
1234E=3.90mm · Pitch e=2.54mmD=4.40mm-6-5-4-3-2-1012345643210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 3.90mm × 4.40mm · Pitch: 2.54mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (4/4)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1GNDGNDGround Reference Pin (GND)
2HVI/OMultiplexed I/O & Peripheral Pin HV (General)
3DrainAnalogMultiplexed I/O & Peripheral Pin Drain (General)
4CSI/OMultiplexed I/O & Peripheral Pin CS (General)
PIN 1 GND
GND
Ground Reference Pin (GND)
Design note: 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: KP10751VPA (Kiwi Instruments · SOP-4)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
KP10751VPA (SOP-4) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
KP10751VPA (SOP-4) - 2. Standard Pinout (Top View)
True package pinout (4 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
KP10751VPA (SOP-4) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
KP10751VPA (SOP-4) - 4. Package Dimensions (D×E×A)
SOP-4 · 3.90×4.40mm · Pitch 2.54mmExpand ›
5. Recommended Land PatternLAND PATTERN
KP10751VPA (SOP-4) - 5. Recommended Land Pattern
IPC-7351B Footprint (4 Pads)Expand ›
6. Application SchematicSCHEMATIC
KP10751VPA (SOP-4) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)
Showing 1–9 of 9 uncropped original figures for KP10750 / KP1075 / KP10751
P1 · p01_fig01EXACT PACKAGE
KP10751VPA (SOP-4) — 非隔离、降压型准谐振 LED 功率开关
非隔离、降压型准谐振 LED 功率开关
P2 · p02_fig01EXACT PACKAGE
KP10751VPA (SOP-4) — www.kiwiinst.com 2 DS_KP1075X_REV1.53_CN ©Kiwi Instruments Corp. Confidential
www.kiwiinst.com 2 DS_KP1075X_REV1.53_CN ©Kiwi Instruments Corp. Confidential
P2 · p02_fig02EXACT PACKAGE
KP10751VPA (SOP-4) — SOP-4
SOP-4
P9 · p09_fig01EXACT PACKAGE
KP10751VPA (SOP-4) — KP1075X 非隔离、降压型准谐振 LED 功率开关 | 封装尺寸 | SOP-4 | e | E | θ | C | d | A | D | e | a | 符号 | 尺寸 (毫米) 尺寸 (英寸) | 最小 最大 最小 最大 | A 1.200 1.600 0.047 0.063 | a - 0.200 - 0.008 | C 0.150 0.220 0.006 0.009 | D 4.500 5.000 0.177 0.197 | d 2.300 2.700 0.09
KP1075X 非隔离、降压型准谐振 LED 功率开关 | 封装尺寸 | SOP-4 | e | E | θ | C | d | A | D | e | a | 符号 | 尺寸 (毫米) 尺寸 (英寸) | 最小 最大 最小 最大 | A 1.200 1.600 0.047 0.063 | a - 0.200 - 0.008 | C 0.150 0.220 0.006 0.009 | D 4.500 5.000 0.177 0.197 | d 2.300 2.700 0.09
P1 · p01_fig01P1
KP10751VPA (SOP-4) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P2 · p02_fig02P2
KP10751VPA (SOP-4) — Datasheet Page 2 (p02_fig02)
Datasheet Page 2 (p02_fig02)
P8 · p08_fig011856×2045px
KP10751VPA (SOP-4) — ⚫ PCB Layout 建议
⚫ PCB Layout 建议
P8 · p08_fig01P8
KP10751VPA (SOP-4) — Datasheet Page 8 (p08_fig01)
Datasheet Page 8 (p08_fig01)
P9 · p09_fig01P9
KP10751VPA (SOP-4) — Datasheet Page 9 (p09_fig01)
Datasheet Page 9 (p09_fig01)

Technical Specifications & Part Details (KP10751VPA)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:KP10751VPA (SOP-4) is a 4-pin standard electronic & interconnect component featuring a 4.40 × 3.90 × 1.65 mm mechanical envelope (lead pitch e = 2.54 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated PWM interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
7kHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
4.40 × 3.90 × 1.65 mm (A1=0.15 mm)
Package family: SOP (SOP-4)
Pin Count & Lead PitchN / e
4 Pins | Pitch e = 2.54 mm (100.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
PWM
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol4 auto-grouped pins
OK
IPC-7351B Land Pattern4 pads · Pitch 2.54mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOP-4)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
4.40 × 3.90 mm
Height (A) & Pitch (e)IPC-7351B
A=1.65mm · e=2.54mm
Pad Size (W × L)Level B
1.00 × 1.50 mm
Pins / Total PadsTopology
4P / 4Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SOP-4
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — KP10751VPA (SOP-4)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of KP10751VPA (SOP-4)?

Manufactured by Kiwi Instruments, the KP10751VPA is housed in a SOP-4 package with 4 pins and a 2.54 mm lead pitch. Key pins include: 1 (GND: Ground Reference Pin (GND)), 2 (HV: Multiplexed I/O & Peripheral Pin HV (General)), 3 (Drain: Multiplexed I/O & Peripheral Pin Drain (General)), 4 (CS: Multiplexed I/O & Peripheral Pin CS (General)).

What are the IPC-7351B PCB Footprint dimensions for KP10751VPA?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), KP10751VPA (SOP-4) has a nominal body envelope of 3.90 × 4.40 mm, pitch e = 2.54 mm, and 4 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for KP10751VPA?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for KP10751VPA (Kiwi Instruments, SOP-4) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (4 pins) & KP10750 / KP1075 / KP10751 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
2HVDigital_IOSignal terminal HV (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: HV. Supported peripheral buses: General.
3DrainAnalogSignal terminal Drain (Analog, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: Drain. Supported peripheral buses: General.
4CSDigital_IOSignal terminal CS (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CS. Supported peripheral buses: General.
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