ESP32-MINI-1U-H4 (SMD-55P) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Pin	Symbol	Type	Function (EN)
1	MTDO	I/O	Multiplexed I/O & Peripheral Pin MTDO (SWD/JTAG)
2	GND	GND	Ground Reference Pin (GND)
3	3V3	Power	Power Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))
4	I36	I/O	Multiplexed I/O & Peripheral Pin I36 (ADC, RTC/CLK)
5	I37	I/O	Multiplexed I/O & Peripheral Pin I37 (ADC, RTC/CLK)
6	I38	I/O	Multiplexed I/O & Peripheral Pin I38 (ADC, RTC/CLK)
7	I39	I/O	Multiplexed I/O & Peripheral Pin I39 (ADC, RTC/CLK)
8	EN	I	System Enable & Hardware Reset (EN)
9	I34	I/O	Multiplexed I/O & Peripheral Pin I34 (ADC, RTC/CLK)
10	I35	I/O	Multiplexed I/O & Peripheral Pin I35 (ADC, RTC/CLK)
11	IO32	I/O	Multiplexed I/O & Peripheral Pin IO32 (ADC, RTC/CLK, TOUCH)
12	IO33	I/O	Multiplexed I/O & Peripheral Pin IO33 (ADC, RTC/CLK, TOUCH)
13	IO25	I/O	Multiplexed I/O & Peripheral Pin IO25 (UART, ADC, DAC, RTC/CLK)
14	IO26	I/O	Multiplexed I/O & Peripheral Pin IO26 (UART, ADC, DAC, RTC/CLK)
15	IO27	I/O	Multiplexed I/O & Peripheral Pin IO27 (ADC, RTC/CLK, TOUCH)
16	IO14	I/O	Multiplexed I/O & Peripheral Pin IO14 (ADC, SWD/JTAG, RTC/CLK, TOUCH)
17	IO12	I/O	Multiplexed I/O & Peripheral Pin IO12 (ADC, SWD/JTAG, RTC/CLK, TOUCH)
18	IO13	I/O	Multiplexed I/O & Peripheral Pin IO13 (ADC, SWD/JTAG, RTC/CLK, TOUCH)
19	IO15	I/O	Multiplexed I/O & Peripheral Pin IO15 (ADC, SWD/JTAG, RTC/CLK, TOUCH)
20	IO2	I/O	Multiplexed I/O & Peripheral Pin IO2 (ADC, RTC/CLK, TOUCH)
21	IO0	I/O	Multiplexed I/O & Peripheral Pin IO0 (ADC, RTC/CLK, TOUCH)
22	IO4	I/O	Multiplexed I/O & Peripheral Pin IO4 (ADC, RTC/CLK, TOUCH)
23	NC	I/O	Multiplexed I/O & Peripheral Pin NC (General)
24	NC	I/O	Multiplexed I/O & Peripheral Pin NC (General)
25	IO9	I/O	Multiplexed I/O & Peripheral Pin IO9 (UART)
26	IO10	I/O	Multiplexed I/O & Peripheral Pin IO10 (UART)
27	GND	GND	Ground Reference Pin (GND)
28	NC	I/O	Multiplexed I/O & Peripheral Pin NC (General)
29	IO5	I/O	Multiplexed I/O & Peripheral Pin IO5 (General)
30	IO18	I/O	Multiplexed I/O & Peripheral Pin IO18 (General)
31	IO23	I/O	Multiplexed I/O & Peripheral Pin IO23 (General)
32	IO19	I/O	Multiplexed I/O & Peripheral Pin IO19 (UART)
33	IO22	I/O	Multiplexed I/O & Peripheral Pin IO22 (UART)
34	IO21	I/O	Multiplexed I/O & Peripheral Pin IO21 (General)
35	RXD0	I/O	Multiplexed I/O & Peripheral Pin RXD0 (UART)
36	TXD0	I/O	Multiplexed I/O & Peripheral Pin TXD0 (UART)
37	NC	I/O	Multiplexed I/O & Peripheral Pin NC (General)
38	GND	GND	Ground Reference Pin (GND)
39	GND	GND	Exposed Thermal & Ground Pad (GND)
40	GND	GND	Ground Reference Pin (GND)
41	GND	GND	Ground Reference Pin (GND)
42	GND	GND	Ground Reference Pin (GND)
43	GND	GND	Ground Reference Pin (GND)
44	GND	GND	Ground Reference Pin (GND)
45	GND	GND	Ground Reference Pin (GND)
46	GND	GND	Ground Reference Pin (GND)
47	GND	GND	Ground Reference Pin (GND)
48	GND	GND	Ground Reference Pin (GND)
49	GND	GND	Exposed Thermal & Ground Pad (GND)
50	GND	GND	Ground Reference Pin (GND)
51	GND	GND	Ground Reference Pin (GND)
52	GND	GND	Ground Reference Pin (GND)
53	GND	GND	Ground Reference Pin (GND)
54	GND	GND	Ground Reference Pin (GND)
55	GND	GND	Ground Reference Pin (GND)

Mechanical Dimensions & Land Pattern (SMD-55P)

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

13.50 × 13.20 mm

Height (A) & Pitch (e)IPC-7351B

A=2.40mm · e=0.80mm

Pad Size (W × L)Level B

0.40 × 0.80 mm

Pins / Total PadsTopology

55P / 62Pad (CASTELLATED_MODULE)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
C1, C2 BOM	22µF (or 10µF) X5R + 100nF X7R 0805 + 0402	3V3 supply decoupling for ~500mA Wi-Fi TX bursts — place closest to 3V3 pin; supply must deliver >= 600mA.
R_en + C_en BOM	R = 10kΩ to 3V3 + C = 1µF to GND 0402 / 0603	Power-On Reset RC delay at EN (CHIP_PU) — 1µF capacitor at EN is REQUIRED for reliable cold boot.
R_boot + SW1 BOM	10kΩ Pull-up + BOOT button 0402 + SMD	Firmware boot-mode strap (IO0 on ESP32/S2/S3, IO9 on ESP32-C3) — on C3 pull IO8 high via 10kΩ for UART/USB download.
D_esd BOM	USBLC6-2SC6 / LESD5D5.0CT1G SOT-23-6 / SOD-523	ESD surge protection on USB D+/D- — place right next to USB Type-C connector before IO18/IO19/IO20.
ESP32-S3-MINI-1-N8 / 1U-N4R2 Espressif	100% Drop-in	Same 15.4×15.4mm 65-pad footprint as ESP32-S2-MINI-2 — verify USB GPIO 19/20 pin mapping.

Technical Frequently Asked Questions (FAQ) — ESP32-MINI-1U-H4 (SMD-55P)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ESP32-MINI-1U-H4 (SMD-55P)?

Manufactured by ESPRESSIF, the ESP32-MINI-1U-H4 is housed in a SMD-55P package with 55 pins and a 0.80 mm lead pitch, supporting a VCC supply range of 3.0 ~ 3.6 V. Key pins include: 1 (MTDO: Multiplexed I/O & Peripheral Pin MTDO (SWD/JTAG)), 2 (GND: Ground Reference Pin (GND)), 3 (3V3: Power Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))), 4 (I36: Multiplexed I/O & Peripheral Pin I36 (ADC, RTC/CLK)), 5 (I37: Multiplexed I/O & Peripheral Pin I37 (ADC, RTC/CLK)), 6 (I38: Multiplexed I/O & Peripheral Pin I38 (ADC, RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for ESP32-MINI-1U-H4?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ESP32-MINI-1U-H4 (SMD-55P) has a nominal body envelope of 13.20 × 13.50 mm, pitch e = 0.80 mm, and 62 copper pads plus a central exposed thermal pad (EPAD) of 4.00 × 4.00 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ESP32-MINI-1U-H4?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ESP32-MINI-1U-H4 (ESPRESSIF, SMD-55P) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (55 pins) & ESP32-MINI Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	MTDO	Digital_IO	Signal terminal MTDO (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTDO. Supported peripheral buses: SWD/JTAG.
2	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
3	3V3	Power_In	Primary positive power supply input (3V3) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
4	I36	Digital_IO	Signal terminal I36 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO36, ADC1_CH0, RTC_GPIO0. Supported peripheral buses: ADC, RTC/CLK.
5	I37	Digital_IO	Signal terminal I37 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO37, ADC1_CH1, RTC_GPIO1. Supported peripheral buses: ADC, RTC/CLK.
6	I38	Digital_IO	Signal terminal I38 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO38, ADC1_CH2, RTC_GPIO2. Supported peripheral buses: ADC, RTC/CLK.
7	I39	Digital_IO	Signal terminal I39 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO39, ADC1_CH3, RTC_GPIO3. Supported peripheral buses: ADC, RTC/CLK.
8	EN	Digital_IO	Chip enable and power-on reset control input (EN): High enables the SoC; Low powers down the chip into reset.
9	I34	Digital_IO	Signal terminal I34 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO34, ADC1_CH6, RTC_GPIO4. Supported peripheral buses: ADC, RTC/CLK.
10	I35	Digital_IO	Signal terminal I35 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO35, ADC1_CH7, RTC_GPIO5. Supported peripheral buses: ADC, RTC/CLK.
11	IO32	Digital_IO	Signal terminal IO32 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO32, ADC1_CH4, TOUCH9, RTC_GPIO9. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
12	IO33	Digital_IO	Signal terminal IO33 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO33, ADC1_CH5, TOUCH8, RTC_GPIO8. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
13	IO25	Digital_IO	Signal terminal IO25 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO25, ADC2_CH8, RTC_GPIO6. Supported peripheral buses: UART, ADC, DAC, RTC/CLK.
14	IO26	Digital_IO	Signal terminal IO26 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO26, ADC2_CH9, RTC_GPIO7. Supported peripheral buses: UART, ADC, DAC, RTC/CLK.
15	IO27	Digital_IO	Signal terminal IO27 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO27, ADC2_CH7, TOUCH7, RTC_GPIO17. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
16	IO14	Digital_IO	Signal terminal IO14 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO14, ADC2_CH6, TOUCH6, RTC_GPIO16, MTMS. Supported peripheral buses: ADC, SWD/JTAG, RTC/CLK, TOUCH.
17	IO12	Digital_IO	Signal terminal IO12 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO12, ADC2_CH5, TOUCH5, RTC_GPIO15, MTDI. Supported peripheral buses: ADC, SWD/JTAG, RTC/CLK, TOUCH.
18	IO13	Digital_IO	Signal terminal IO13 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO13, ADC2_CH4, TOUCH4, RTC_GPIO14, MTCK. Supported peripheral buses: ADC, SWD/JTAG, RTC/CLK, TOUCH.
19	IO15	Digital_IO	Signal terminal IO15 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO15, ADC2_CH3, TOUCH3, RTC_GPIO13, MTDO. Supported peripheral buses: ADC, SWD/JTAG, RTC/CLK, TOUCH.
20	IO2	Digital_IO	Signal terminal IO2 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO2, ADC2_CH2, TOUCH2, RTC_GPIO12. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
21	IO0	Digital_IO	Signal terminal IO0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO0, ADC2_CH1, TOUCH1, RTC_GPIO11, CLK_OUT1. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
22	IO4	Digital_IO	Signal terminal IO4 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO4, ADC2_CH0, TOUCH0, RTC_GPIO10. Supported peripheral buses: ADC, RTC/CLK, TOUCH.
23	NC	NC	Signal terminal NC (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
24	NC	NC	Signal terminal NC (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
25	IO9	Digital_IO	Signal terminal IO9 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO9, U1RXD. Supported peripheral buses: UART.
26	IO10	Digital_IO	Signal terminal IO10 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO10, U1TXD. Supported peripheral buses: UART.
27	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
28	NC	NC	Signal terminal NC (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
29	IO5	Digital_IO	Signal terminal IO5 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO5. Supported peripheral buses: General.
30	IO18	Digital_IO	Signal terminal IO18 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO18. Supported peripheral buses: General.
31	IO23	Digital_IO	Signal terminal IO23 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO23. Supported peripheral buses: General.
32	IO19	Digital_IO	Signal terminal IO19 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO19, U0CTS. Supported peripheral buses: UART.
33	IO22	Digital_IO	Signal terminal IO22 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO22, U0RTS. Supported peripheral buses: UART.
34	IO21	Digital_IO	Signal terminal IO21 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO21. Supported peripheral buses: General.
35	RXD0	Digital_IO	Signal terminal RXD0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO3, U0RXD, CLK_OUT2. Supported peripheral buses: UART.
36	TXD0	Digital_IO	Signal terminal TXD0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO1, U0TXD, CLK_OUT3. Supported peripheral buses: UART.
37	NC	NC	Signal terminal NC (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
38	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
39	GND	GND	Bottom exposed die attach pad (GND) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
40	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
41	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
42	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
43	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
44	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
45	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
46	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
47	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
48	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
49	GND	GND	Bottom exposed die attach pad (GND) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
50	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
51	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
52	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
53	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
54	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
55	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.

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ESP32-MINI-1U-H4

Synchronized Pinout (Symbol / 2D / 3D) (55/55)

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 20 Extracted Figures)

Technical Specifications & Part Details (ESP32-MINI-1U-H4)

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