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CH9126 (LQFP-64M(10x10)) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH9126

WCHID: C717616LQFP-64M(10x10) · 64 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH9126 (LQFP-64M(10x10))1RSETE2VCC333GND4RXP5RXN6VCC187TXP8TXN9GND10XI11XO12VCC3313GND14NC15NC16NC17VCC3318GND19VCC1820GND21VCC3322NC23NC24NC25NC26CMD_DATA27MODVer28VCC1829VCC3330PULSEIN31RESV32NC64VCC1863VCC3362NC61NC60PULSEOUT59RESET58TXD57RXD56NC55NC54VCC1853NC52ELINK51DIR50NC49NC48GND47NC46NC45VCC3344GND43VCC1842VCC3341GND40VCC3339NC38NC37GND36RSTI35NC34NC33NCGrid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.245.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364E=10.00mm · Pitch e=0.50mmD=10.00mm-9-7-5-3-11357997531-1-3-5-7-9mm
3. 3D CAD MODEL
Package Body: 10.00mm × 10.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1RSETEI/OMultiplexed I/O & Peripheral Pin RSETE (General)
2VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
3GNDGNDGround Reference Pin (GND)
4RXPI/OMultiplexed I/O & Peripheral Pin RXP (General)
5RXNI/OMultiplexed I/O & Peripheral Pin RXN (General)
6VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
7TXPI/OMultiplexed I/O & Peripheral Pin TXP (General)
8TXNI/OMultiplexed I/O & Peripheral Pin TXN (General)
9GNDGNDGround Reference Pin (GND)
10XII/OMultiplexed I/O & Peripheral Pin XI (RTC/CLK)
11XOI/OMultiplexed I/O & Peripheral Pin XO (RTC/CLK)
12VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
13GNDGNDGround Reference Pin (GND)
14NCI/OMultiplexed I/O & Peripheral Pin NC (General)
15NCI/OMultiplexed I/O & Peripheral Pin NC (General)
16NCI/OMultiplexed I/O & Peripheral Pin NC (General)
17VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
18GNDGNDGround Reference Pin (GND)
19VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
20GNDGNDGround Reference Pin (GND)
21VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
22NCI/OMultiplexed I/O & Peripheral Pin NC (General)
23NCI/OMultiplexed I/O & Peripheral Pin NC (General)
24NCI/OMultiplexed I/O & Peripheral Pin NC (General)
25NCI/OMultiplexed I/O & Peripheral Pin NC (General)
26CMD_DATAI/OMultiplexed I/O & Peripheral Pin CMD_DATA (General)
27MODVerI/OMultiplexed I/O & Peripheral Pin MODVer (General)
28VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
29VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
30PULSEINI/OMultiplexed I/O & Peripheral Pin PULSEIN (General)
31RESVI/OMultiplexed I/O & Peripheral Pin RESV (General)
32NCI/OMultiplexed I/O & Peripheral Pin NC (General)
33NCI/OMultiplexed I/O & Peripheral Pin NC (General)
34NCI/OMultiplexed I/O & Peripheral Pin NC (General)
35NCI/OMultiplexed I/O & Peripheral Pin NC (General)
36RSTII/OMultiplexed I/O & Peripheral Pin RSTI (General)
37GNDGNDGround Reference Pin (GND)
38NCI/OMultiplexed I/O & Peripheral Pin NC (General)
39NCI/OMultiplexed I/O & Peripheral Pin NC (General)
40VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
41GNDGNDGround Reference Pin (GND)
42VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
43VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
44GNDGNDGround Reference Pin (GND)
45VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
46NCI/OMultiplexed I/O & Peripheral Pin NC (General)
47NCI/OMultiplexed I/O & Peripheral Pin NC (General)
48GNDGNDGround Reference Pin (GND)
49NCI/OMultiplexed I/O & Peripheral Pin NC (General)
50NCI/OMultiplexed I/O & Peripheral Pin NC (General)
51DIRI/OMultiplexed I/O & Peripheral Pin DIR (General)
52ELINKI/OMultiplexed I/O & Peripheral Pin ELINK (General)
53NCI/OMultiplexed I/O & Peripheral Pin NC (General)
54VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
55NCI/OMultiplexed I/O & Peripheral Pin NC (General)
56NCI/OMultiplexed I/O & Peripheral Pin NC (General)
57RXDI/OMultiplexed I/O & Peripheral Pin RXD (UART)
58TXDI/OMultiplexed I/O & Peripheral Pin TXD (UART)
59RESETISystem Enable & Hardware Reset (RESET)
60PULSEOUTI/OMultiplexed I/O & Peripheral Pin PULSEOUT (General)
61NCI/OMultiplexed I/O & Peripheral Pin NC (General)
62NCI/OMultiplexed I/O & Peripheral Pin NC (General)
63VCC33PowerPower Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)
64VCC18PowerPower Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)
PIN 1 RSETE
I/O
Multiplexed I/O & Peripheral Pin RSETE (General)
Design note: Signal terminal RSETE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSETE. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 7 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH9126 (WCH · LQFP-64M(10x10))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH9126 (LQFP-64M(10x10)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH9126 (LQFP-64M(10x10)) - 2. Standard Pinout (Top View)
True package pinout (64 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH9126 (LQFP-64M(10x10)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH9126 (LQFP-64M(10x10)) - 4. Package Dimensions (D×E×A)
LQFP-64M(10x10) · 10.00×10.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH9126 (LQFP-64M(10x10)) - 5. Recommended Land Pattern
IPC-7351B Footprint (64 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH9126 (LQFP-64M(10x10)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (7 figures · Page 1/1)
Showing 1–7 of 7 uncropped original figures for CH9126
P2 · p02_fig02EXACT PACKAGE
CH9126 (LQFP-64M(10x10)) — 封装形式 塑体尺寸 引脚间距 封装说明 订货型号 | LQFP64M 10.0*10.0mm 0.5mm 19.7mil LQFP64M(10*10)贴片 CH9126 | 4、引脚 | CH9126 引脚号 引脚名称 类型 引脚说明 | 2、12、17、 21、29、40、 42、45、63 VCC33 电源 3.3V 正电源输入端，外接0.1uF 电源退耦电容 | 6、19、28、 43、54、64 VCC18 电源 1.8V 正电源输入端，外接0.1uF 电源退耦电容
封装形式 塑体尺寸 引脚间距 封装说明 订货型号 | LQFP64M 10.0*10.0mm 0.5mm 19.7mil LQFP64M(10*10)贴片 CH9126 | 4、引脚 | CH9126 引脚号 引脚名称 类型 引脚说明 | 2、12、17、 21、29、40、 42、45、63 VCC33 电源 3.3V 正电源输入端，外接0.1uF 电源退耦电容 | 6、19、28、 43、54、64 VCC18 电源 1.8V 正电源输入端，外接0.1uF 电源退耦电容
P1 · p01_fig011551×705px
CH9126 (LQFP-64M(10x10)) — 2、特点
2、特点
P2 · p02_fig011659×1652px
CH9126 (LQFP-64M(10x10)) — 封装形式 塑体尺寸 引脚间距 封装说明 订货型号
封装形式 塑体尺寸 引脚间距 封装说明 订货型号
P2 · p02_fig01P2
CH9126 (LQFP-64M(10x10)) — Datasheet Page 2 (p02_fig01)
Datasheet Page 2 (p02_fig01)
P2 · p02_fig02P2
CH9126 (LQFP-64M(10x10)) — Datasheet Page 2 (p02_fig02)
Datasheet Page 2 (p02_fig02)
P3 · p03_fig011687×1959px
CH9126 (LQFP-64M(10x10)) — 5、功能说明
5、功能说明
P4 · p04_fig011522×611px
CH9126 (LQFP-64M(10x10)) — 1、命令码：0x51 功能：设置当前的时间 数据：数据区则是时间数据，格式为：年+月+日+小时+分钟+秒，BCD 码格式，比如：0x16、0x11、 0x22、0x14、0x44、0x57，表示2016 年11 月22 日，14 点44 分57 秒。 说明：该命令是实时有效的，随时配置则芯片会实时更改内部时间参数。 应答：正确响应则返回0xAA。 2、命令码：0x52 功能：设置网络参数 数据： | 大小（字节） 名称 功能 备注 | 6 MAC 地址 设置MAC 地址 暂时
1、命令码：0x51 功能：设置当前的时间 数据：数据区则是时间数据，格式为：年+月+日+小时+分钟+秒，BCD 码格式，比如：0x16、0x11、 0x22、0x14、0x44、0x57，表示2016 年11 月22 日，14 点44 分57 秒。 说明：该命令是实时有效的，随时配置则芯片会实时更改内部时间参数。 应答：正确响应则返回0xAA。 2、命令码：0x52 功能：设置网络参数 数据： | 大小（字节） 名称 功能 备注 | 6 MAC 地址 设置MAC 地址 暂时

Technical Specifications & Part Details (CH9126)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CH9126 (LQFP-64M(10x10)) is a 64-pin standard electronic & interconnect component featuring a 10.00 × 10.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated UART, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
10.00 × 10.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-64M(10x10))
Pin Count & Lead PitchN / e
64 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol64 auto-grouped pins
OK
IPC-7351B Land Pattern64 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-64M(10x10))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
10.00 × 10.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 1.25 mm
Pins / Total PadsTopology
64P / 64Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-64M(10x10)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CH9126 (LQFP-64M(10x10))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH9126 (LQFP-64M(10x10))?

Manufactured by WCH, the CH9126 is housed in a LQFP-64M(10x10) package with 64 pins and a 0.50 mm lead pitch. Key pins include: 1 (RSETE: Multiplexed I/O & Peripheral Pin RSETE (General)), 2 (VCC33: Power Supply Input (VCC33 — 3.3V / 5.0V Standard Logic)), 3 (GND: Ground Reference Pin (GND)), 4 (RXP: Multiplexed I/O & Peripheral Pin RXP (General)), 5 (RXN: Multiplexed I/O & Peripheral Pin RXN (General)), 6 (VCC18: Power Supply Input (VCC18 — 3.3V / 5.0V Standard Logic)).

What are the IPC-7351B PCB Footprint dimensions for CH9126?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH9126 (LQFP-64M(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.50 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH9126?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH9126 (WCH, LQFP-64M(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & CH9126 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1RSETEDigital_IOSignal terminal RSETE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSETE. Supported peripheral buses: General.
2VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
3GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
4RXPDigital_IOSignal terminal RXP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RXP. Supported peripheral buses: General.
5RXNDigital_IOSignal terminal RXN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RXN. Supported peripheral buses: General.
6VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
7TXPDigital_IOSignal terminal TXP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TXP. Supported peripheral buses: General.
8TXNDigital_IOSignal terminal TXN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TXN. Supported peripheral buses: General.
9GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
10XIDigital_IOSignal terminal XI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XI. Supported peripheral buses: RTC/CLK.
11XODigital_IOSignal terminal XO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XO. Supported peripheral buses: RTC/CLK.
12VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
13GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
14NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
15NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
16NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
17VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
18GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
19VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
20GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
21VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
22NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
23NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
24NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
25NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
26CMD_DATADigital_IOSignal terminal CMD_DATA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CMD_DATA. Supported peripheral buses: General.
27MODVerDigital_IOSignal terminal MODVer (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: MODVer. Supported peripheral buses: General.
28VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
29VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
30PULSEINDigital_IOSignal terminal PULSEIN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PULSEIN. Supported peripheral buses: General.
31RESVDigital_IOSignal terminal RESV (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RESV. Supported peripheral buses: General.
32NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
33NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
34NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
35NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
36RSTIDigital_IOSignal terminal RSTI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RSTI. Supported peripheral buses: General.
37GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
38NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
39NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
40VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
41GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
42VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
43VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
44GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
45VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
46NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
47NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
48GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
49NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
50NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
51DIRDigital_IOSignal terminal DIR (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: DIR. Supported peripheral buses: General.
52ELINKDigital_IOSignal terminal ELINK (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: ELINK. Supported peripheral buses: General.
53NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
54VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
55NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
56NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
57RXDDigital_IOSignal terminal RXD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RXD. Supported peripheral buses: UART.
58TXDDigital_IOSignal terminal TXD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TXD. Supported peripheral buses: UART.
59RESETDigital_IOActive-low hardware reset terminal (RESET): pulling this pin Low resets the processor core and peripherals.
60PULSEOUTDigital_IOSignal terminal PULSEOUT (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PULSEOUT. Supported peripheral buses: General.
61NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
62NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
63VCC33Power_InPrimary positive power supply input (VCC33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
64VCC18Power_InPrimary positive power supply input (VCC18) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
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