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STM32G071C8T7 (LQFP-48(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32G071C8T7

STID: C7021412LQFP-48(7x7) · 48 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32G071C8T7 (LQFP-48(7x7))1PC132PC14 - OSC3233V34VBAT5VREF+6VDD/VDDA7VSS/VSSA8PF0OSC IN -_9PF1 - OSC_OU10PF2 NRST -11PA012PA113PA214PA315PA416PA517PA618PA719PB020PB121PB222PB1023PB1124PB1248PB947PB846PB745PB644PB543PB442PB341PD340PD239PD138PD037PA1536PA14BOOT0 -35PA1334PA12 [PA10]33PA11 [PA9]32PA1031PC730PC629PA928PA827PB1526PB1425PB13Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.835.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748E=7.00mm · Pitch e=0.50mmD=7.00mm-7-5-3-113577531-1-3-5-7mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (48/48)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
2PC14 - OSC32_IN (PC14)I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)
33V3Power3.3V Main Power Supply Rail (3.0V ~ 3.6V)
4VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
5VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
6VDD/VDDAPowerPower Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))
7VSS/VSSAGNDGround Reference Pin (VSS/VSSA)
8PF0OSC IN -_ (PF0)I/OMultiplexed I/O & Peripheral Pin PF0OSC IN -_ (PF0) (RTC/CLK)
9PF1 - OSC_OUT (PF1)I/OMultiplexed I/O & Peripheral Pin PF1 - OSC_OUT (PF1) (RTC/CLK)
10PF2 NRST -I/OMultiplexed I/O & Peripheral Pin PF2 NRST - (RTC/CLK)
11PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, SPI, PWM)
12PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, PWM)
13PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, SPI)
14PA3I/OMultiplexed I/O & Peripheral Pin PA3 (SPI, PWM)
15PA4I/OMultiplexed I/O & Peripheral Pin PA4 (SPI, ADC, RTC/CLK)
16PA5I/OMultiplexed I/O & Peripheral Pin PA5 (UART, SPI, ADC, PWM)
17PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC, PWM)
18PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
19PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, SPI, ADC, PWM)
20PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, PWM)
21PB2I/OMultiplexed I/O & Peripheral Pin PB2 (SPI)
22PB10I/OMultiplexed I/O & Peripheral Pin PB10 (SPI, ADC, PWM)
23PB11I/OMultiplexed I/O & Peripheral Pin PB11 (SPI, I2C, ADC, PWM)
24PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI, ADC)
25PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, PWM)
26PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
27PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, RTC/CLK)
28PA8I/OMultiplexed I/O & Peripheral Pin PA8 (SPI, PWM, RTC/CLK)
29PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, PWM, RTC/CLK)
30PC6I/OMultiplexed I/O & Peripheral Pin PC6 (PWM)
31PC7I/OMultiplexed I/O & Peripheral Pin PC7 (PWM)
32PA10I/OMultiplexed I/O & Peripheral Pin PA10 (SPI, I2C, PWM)
33PA11 [PA9]I/OMultiplexed I/O & Peripheral Pin PA11 [PA9] (UART, SPI)
34PA12 [PA10]I/OMultiplexed I/O & Peripheral Pin PA12 [PA10] (UART, SPI, I2C)
35PA13I/OMultiplexed I/O & Peripheral Pin PA13 (SWD/JTAG)
36PA14BOOT0 -I/OMultiplexed I/O & Peripheral Pin PA14BOOT0 - (UART, SWD/JTAG)
37PA15I/OMultiplexed I/O & Peripheral Pin PA15 (UART, SPI, PWM)
38PD0I/OMultiplexed I/O & Peripheral Pin PD0 (SPI)
39PD1I/OMultiplexed I/O & Peripheral Pin PD1 (SPI)
40PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
41PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, PWM)
42PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI, PWM)
43PB4I/OMultiplexed I/O & Peripheral Pin PB4 (SPI, PWM)
44PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, PWM)
45PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART)
46PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART)
47PB8I/OMultiplexed I/O & Peripheral Pin PB8 (SPI)
48PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI)
PIN 1 PC13
I/O
Multiplexed I/O & Peripheral Pin PC13 (General)
Design note: Signal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 20 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32G071C8T7 (ST · LQFP-48(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32G071C8T7 (LQFP-48(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32G071C8T7 (LQFP-48(7x7)) - 2. Standard Pinout (Top View)
True package pinout (48 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32G071C8T7 (LQFP-48(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32G071C8T7 (LQFP-48(7x7)) - 4. Package Dimensions (D×E×A)
LQFP-48(7x7) · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32G071C8T7 (LQFP-48(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (48 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32G071C8T7 (LQFP-48(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (20 figures · Page 1/2)
Showing 1–12 of 20 uncropped original figures for STM32G071
P1 · p01_fig01EXACT PACKAGE
STM32G071C8T7 (LQFP-48(7x7)) — Arm® Cortex®-M0+ 32-bit MCU, up to 128 KB Flash, 36 KB RAM,
Arm® Cortex®-M0+ 32-bit MCU, up to 128 KB Flash, 36 KB RAM,
P37 · p37_fig01EXACT PACKAGE
STM32G071C8T7 (LQFP-48(7x7)) — Figure 4. STM32G071RxI UFBGA64 pinout 1 2 3 4 5 6 7 8
Figure 4. STM32G071RxI UFBGA64 pinout 1 2 3 4 5 6 7 8
P37 · p37_fig02EXACT PACKAGE
STM32G071C8T7 (LQFP-48(7x7)) — Figure 5. STM32G071CxT LQFP48 pinout
Figure 5. STM32G071CxT LQFP48 pinout
P121 · p121_fig01EXACT PACKAGE
STM32G071C8T7 (LQFP-48(7x7)) — Figure 47. LQFP48 package outline
Figure 47. LQFP48 package outline
P122 · p122_fig01EXACT PACKAGE
STM32G071C8T7 (LQFP-48(7x7)) — Figure 48. Recommended footprint for LQFP48 package
Figure 48. Recommended footprint for LQFP48 package
P1 · p01_fig02P1
STM32G071C8T7 (LQFP-48(7x7)) — Datasheet Page 1 (p01_fig02)
Datasheet Page 1 (p01_fig02)
P37 · p37_fig02P37
STM32G071C8T7 (LQFP-48(7x7)) — Datasheet Page 37 (p37_fig02)
Datasheet Page 37 (p37_fig02)
P40 · p40_fig011546×1343px
STM32G071C8T7 (LQFP-48(7x7)) — Figure 9. STM32G071GxU UFQFPN28 pinout
Figure 9. STM32G071GxU UFQFPN28 pinout
P40 · p40_fig021546×813px
STM32G071C8T7 (LQFP-48(7x7)) — Figure 10. STM32G071Ex WLCSP25 pinout
Figure 10. STM32G071Ex WLCSP25 pinout
P53 · p53_fig011548×1316px
STM32G071C8T7 (LQFP-48(7x7)) — Figure 13. Power supply scheme
Figure 13. Power supply scheme
P53 · p53_fig01P53
STM32G071C8T7 (LQFP-48(7x7)) — Datasheet Page 53 (p53_fig01)
Datasheet Page 53 (p53_fig01)
P72 · p72_fig011546×702px
STM32G071C8T7 (LQFP-48(7x7)) — Figure 18. Typical application with an 8 MHz crystal
Figure 18. Typical application with an 8 MHz crystal
Page 1 / 2 (20 extracted figures)

Technical Specifications & Part Details (STM32G071C8T7)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32G071C8T7 (LQFP-48(7x7)) is a 48-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.62 V - 3.6 V supply operation across -40°C to 85°C with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.62 V - 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to 85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
64 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
41 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-48(7x7))
Pin Count & Lead PitchN / e
48 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PA14BOOT0 -): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol48 auto-grouped pins
OK
IPC-7351B Land Pattern48 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-48(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 1.20 mm
Pins / Total PadsTopology
48P / 48Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-48(7x7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32G071C8T7 (LQFP-48(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32G071C8T7 (LQFP-48(7x7))?

Manufactured by ST, the STM32G071C8T7 is housed in a LQFP-48(7x7) package with 48 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.62 V - 3.6 V. Key pins include: 1 (PC13: Multiplexed I/O & Peripheral Pin PC13 (General)), 2 (PC14 - OSC32_IN (PC14): Multiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)), 3 (3V3: 3.3V Main Power Supply Rail (3.0V ~ 3.6V)), 4 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))), 5 (VREF+: Multiplexed I/O & Peripheral Pin VREF+ (General)), 6 (VDD/VDDA: Power Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))).

What are the IPC-7351B PCB Footprint dimensions for STM32G071C8T7?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G071C8T7 (LQFP-48(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 48 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G071C8T7?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G071C8T7 (ST, LQFP-48(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (48 pins) & STM32G071 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
2PC14 - OSC32_IN (PC14)Digital_IOSignal terminal PC14 - OSC32_IN (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN (PC14). Supported peripheral buses: RTC/CLK.
33V3Power_In3.3V Main Power Supply Rail (3.0V ~ 3.6V)
4VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
5VREF+AnalogSignal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
6VDD/VDDAPower_InPrimary positive power supply input (VDD/VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
7VSS/VSSAGND0V electrical ground return terminal (VSS/VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
8PF0OSC IN -_ (PF0)Digital_IOSignal terminal PF0OSC IN -_ (PF0) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF0OSC IN -_ (PF0). Supported peripheral buses: RTC/CLK.
9PF1 - OSC_OUT (PF1)Digital_IOSignal terminal PF1 - OSC_OUT (PF1) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF1 - OSC_OUT (PF1). Supported peripheral buses: RTC/CLK.
10PF2 NRST -Digital_IOSignal terminal PF2 NRST - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF2 NRST -. Supported peripheral buses: RTC/CLK.
11PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKUSART2CTS. Supported peripheral buses: UART, SPI, PWM.
12PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, PWM.
13PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI.
14PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISOUSART2RX. Supported peripheral buses: SPI, PWM.
15PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI2_MOSITIM14CH1. Supported peripheral buses: SPI, ADC, RTC/CLK.
16PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, ADC, PWM.
17PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, ADC, PWM.
18PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
19PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, ADC, PWM.
20PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, PWM.
21PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISOUSART3TX. Supported peripheral buses: SPI.
22PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKI2C2SCL. Supported peripheral buses: SPI, ADC, PWM.
23PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSILPUART1TX. Supported peripheral buses: SPI, I2C, ADC, PWM.
24PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: UART, SPI, ADC.
25PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKLPUART1CTS. Supported peripheral buses: UART, SPI, PWM.
26PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI, PWM.
27PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSITIM1CH3N. Supported peripheral buses: SPI, RTC/CLK.
28PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, PWM, RTC/CLK.
29PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: UART, PWM, RTC/CLK.
30PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: PWM.
31PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: PWM.
32PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSIUSART1RX, I2C1_SDAEVENTOUT. Supported peripheral buses: SPI, I2C, PWM.
33PA11 [PA9]Digital_IOSignal terminal PA11 [PA9] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI.
34PA12 [PA10]Digital_IOSignal terminal PA12 [PA10] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI, I2C.
35PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: SWD/JTAG.
36PA14BOOT0 -Digital_IOSignal terminal PA14BOOT0 - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14BOOT0 -. Supported peripheral buses: UART, SWD/JTAG.
37PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, PWM.
38PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI.
39PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI.
40PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
41PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: UART, PWM.
42PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, PWM.
43PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI, PWM.
44PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, PWM.
45PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: UART.
46PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART.
47PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI.
48PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSSI2C1SDA. Supported peripheral buses: SPI.
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