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C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL) — Symbol, Footprint IPC-7351B & 3D STEP Model

C6689610

SemiconductorUFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL · 169 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL)A1PE2A2PI6A3VDDA4VDD11A5PG15A6VDDIO2A7PG9A8VDDA9PC11A10PA15A11VDDA12PI1A13PH15B1VDDB2VSSB3PI5B4VSSB5PB6B6PB4B7PD6B8VSSB9PD0B10PI4B11VSSB12PI0B13PH12C1VBATC2PE4C3PI7C4PE1C5PH3-BOOT0C6PB5C7PG10C8PD4C9PC10C10PA14C11PH14C12PH13C13PH10D1PC14-OSC32_ID2PE5D3PE3D4PE0D5PB9D6PB3D7PD7D8PD3D9PH11D10PI3D11PI2D12PH8D13VDDE1PC15-OSC32_OE2PF0E3PC13E4PE6E5PB8E6PG12E7PD5E8PC12E9PH9E10PH4E11PH6E12VSSE13VDDUSBF1PF8F2VSSF3PF1F4PF2F5PB7F6PD1F7PD2F8PH7F9PH5F10PH2F11PA10F12PA13F13PA12G1VDDG2PF7G3PF9G4PF5G5PF3G6PF4G7PA8N13PB13N12VDDN11VDD11N10VDDSMPSN9VLXSMPSN8PE12N7VDDN6PF15N5PB1N4PA6N3VDDN2PA3N1PA4M13PD11M12PB14M11VSSM10VSSSMPSM9PE15M8PE11M7VSSM6PF13M5PF11M4PC5M3VSSM2PA2M1OPAMP1_VINML13PD9L12PD8L11PB15L10PB12L9PB11L8PE13L7PE7L6PF14L5PB2L4PC4L3PA1L2VDDAL1VREF+K13PG2K12PD13K11PD10K10PD12K9PB10K8PE14K7PE8K6PF12K5PB0K4PA5K3PA0K2VSSAK1PC3J13VDDJ12VSSJ11PD15J10PD14J9PG5J8PG3J7PE9J6PG0J5PA7J4PC2J3PC1J2PC0J1PH1-OSC_OUTH13PC6H12VDDIO2H11PG4H10PG6H9PG8H8PE10H7PG1H6PF6H5OPAMP2_VINMH4PF10H3NRSTH2VSSH1PH0-OSC_ING13PA11G12PC7G11PA9G10PC8G9PC9G8PG7Grid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.2114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1L1M1N1A2B2C2D2E2F2G2H2J2K2L2M2N2A3B3C3D3E3F3G3H3J3K3L3M3N3A4B4C4D4E4F4G4H4J4K4L4M4N4A5B5C5D5E5F5G5H5J5K5L5M5N5A6B6C6D6E6F6G6H6J6K6L6M6N6A7B7C7D7E7F7G7H7J7K7L7M7N7A8B8C8D8E8F8G8H8J8K8L8M8N8A9B9C9D9E9F9G9H9J9K9L9M9N9A10B10C10D10E10F10G10H10J10K10L10M10N10A11B11C11D11E11F11G11H11J11K11L11M11N11A12B12C12D12E12F12G12H12J12K12L12M12N12A13B13C13D13E13F13G13H13J13K13L13M13N13E=7.00mm · Pitch e=0.50mmD=7.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (169/169)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
A2PI6I/OMultiplexed I/O & Peripheral Pin PI6 (General)
A3VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
A4VDD11PowerPower Supply Input (VDD11 — 3.3V / 5.0V Standard Logic)
A5PG15I/OMultiplexed I/O & Peripheral Pin PG15 (General)
A6VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V / 5.0V Standard Logic)
A7PG9I/OMultiplexed I/O & Peripheral Pin PG9 (General)
A8VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
A9PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
A10PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
A11VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
A12PI1I/OMultiplexed I/O & Peripheral Pin PI1 (General)
A13PH15I/OMultiplexed I/O & Peripheral Pin PH15 (General)
B1VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
B2VSSGNDGround Reference Pin (VSS)
B3PI5I/OMultiplexed I/O & Peripheral Pin PI5 (General)
B4VSSGNDGround Reference Pin (VSS)
B5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
B6PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
B7PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
B8VSSGNDGround Reference Pin (VSS)
B9PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
B10PI4I/OMultiplexed I/O & Peripheral Pin PI4 (General)
B11VSSGNDGround Reference Pin (VSS)
B12PI0I/OMultiplexed I/O & Peripheral Pin PI0 (General)
B13PH12I/OMultiplexed I/O & Peripheral Pin PH12 (General)
C1VBATPowerPower Supply Input (VBAT — 3.3V / 5.0V Standard Logic)
C2PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
C3PI7I/OMultiplexed I/O & Peripheral Pin PI7 (General)
C4PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
C5PH3-BOOT0I/OMultiplexed I/O & Peripheral Pin PH3-BOOT0 (General)
C6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
C7PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
C8PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
C9PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
C10PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
C11PH14I/OMultiplexed I/O & Peripheral Pin PH14 (General)
C12PH13I/OMultiplexed I/O & Peripheral Pin PH13 (General)
C13PH10I/OMultiplexed I/O & Peripheral Pin PH10 (General)
D1PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
D2PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
D3PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
D4PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
D5PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
D6PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
D7PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
D8PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
D9PH11I/OMultiplexed I/O & Peripheral Pin PH11 (General)
D10PI3I/OMultiplexed I/O & Peripheral Pin PI3 (General)
D11PI2I/OMultiplexed I/O & Peripheral Pin PI2 (General)
D12PH8I/OMultiplexed I/O & Peripheral Pin PH8 (General)
D13VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
E1PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
E2PF0I/OMultiplexed I/O & Peripheral Pin PF0 (General)
E3PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
E4PE6I/OMultiplexed I/O & Peripheral Pin PE6 (General)
E5PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
E6PG12I/OMultiplexed I/O & Peripheral Pin PG12 (General)
E7PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
E8PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
E9PH9I/OMultiplexed I/O & Peripheral Pin PH9 (General)
E10PH4I/OMultiplexed I/O & Peripheral Pin PH4 (General)
E11PH6I/OMultiplexed I/O & Peripheral Pin PH6 (General)
E12VSSGNDGround Reference Pin (VSS)
E13VDDUSBPowerPower Supply Input (VDDUSB — 3.3V / 5.0V Standard Logic)
F1PF8I/OMultiplexed I/O & Peripheral Pin PF8 (General)
F2VSSGNDGround Reference Pin (VSS)
F3PF1I/OMultiplexed I/O & Peripheral Pin PF1 (General)
F4PF2I/OMultiplexed I/O & Peripheral Pin PF2 (General)
F5PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
F6PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
F7PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
F8PH7I/OMultiplexed I/O & Peripheral Pin PH7 (General)
F9PH5I/OMultiplexed I/O & Peripheral Pin PH5 (General)
F10PH2I/OMultiplexed I/O & Peripheral Pin PH2 (General)
F11PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
F12PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
F13PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
G1VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
G2PF7I/OMultiplexed I/O & Peripheral Pin PF7 (General)
G3PF9I/OMultiplexed I/O & Peripheral Pin PF9 (General)
G4PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
G5PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
G6PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
G7PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
G8PG7I/OMultiplexed I/O & Peripheral Pin PG7 (General)
G9PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
G10PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
G11PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
G12PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
G13PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
H1PH0-OSC_INI/OMultiplexed I/O & Peripheral Pin PH0-OSC_IN (RTC/CLK)
H2VSSGNDGround Reference Pin (VSS)
H3NRSTISystem Enable & Hardware Reset (NRST)
H4PF10I/OMultiplexed I/O & Peripheral Pin PF10 (General)
H5OPAMP2_VINMPowerPower Supply Input (OPAMP2_VINM — 3.3V / 5.0V Standard Logic)
H6PF6I/OMultiplexed I/O & Peripheral Pin PF6 (General)
H7PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
H8PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
H9PG8I/OMultiplexed I/O & Peripheral Pin PG8 (General)
H10PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
H11PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
H12VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V / 5.0V Standard Logic)
H13PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
J1PH1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PH1-OSC_OUT (RTC/CLK)
J2PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
J3PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
J4PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
J5PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
J6PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
J7PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
J8PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
J9PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
J10PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
J11PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
J12VSSGNDGround Reference Pin (VSS)
J13VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
K1PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
K2VSSAGNDGround Reference Pin (VSSA)
K3PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
K4PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
K5PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
K6PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
K7PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
K8PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
K9PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
K10PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
K11PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
K12PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
K13PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
L1VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (General)
L2VDDAPowerPower Supply Input (VDDA — 3.3V / 5.0V Standard Logic)
L3PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
L4PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
L5PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
L6PF14I/OMultiplexed I/O & Peripheral Pin PF14 (General)
L7PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
L8PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
L9PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
L10PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
L11PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
L12PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
L13PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
M1OPAMP1_VINMPowerPower Supply Input (OPAMP1_VINM — 3.3V / 5.0V Standard Logic)
M2PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
M3VSSGNDGround Reference Pin (VSS)
M4PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
M5PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
M6PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
M7VSSGNDGround Reference Pin (VSS)
M8PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
M9PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
M10VSSSMPSGNDGround Reference Pin (VSSSMPS)
M11VSSGNDGround Reference Pin (VSS)
M12PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
M13PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
N1PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
N2PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
N3VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
N4PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
N5PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
N6PF15I/OMultiplexed I/O & Peripheral Pin PF15 (General)
N7VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
N8PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
N9VLXSMPSI/OMultiplexed I/O & Peripheral Pin VLXSMPS (General)
N10VDDSMPSPowerPower Supply Input (VDDSMPS — 3.3V / 5.0V Standard Logic)
N11VDD11PowerPower Supply Input (VDD11 — 3.3V / 5.0V Standard Logic)
N12VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
N13PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
PIN A1 PE2
I/O
Multiplexed I/O & Peripheral Pin PE2 (General)
Design note: Signal terminal PE2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: C6689610 (Semiconductor · UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL) - 2. Standard Pinout (Top View)
True package pinout (169 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL) - 4. Package Dimensions (D×E×A)
UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL) - 5. Recommended Land Pattern
IPC-7351B Footprint (169 Pads)Expand ›
6. Application SchematicSCHEMATIC
C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (C6689610)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL) is a 169-pin standard electronic & interconnect component featuring a 7.00 × 7.00 × 0.50 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 0.50 mm (A1=0.20 mm)
Package family: BGA (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL)
Pin Count & Lead PitchN / e
169 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol169 auto-grouped pins
OK
IPC-7351B Land Pattern169 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.50mm · e=0.50mm
Pad Size (W × L)Level B
0.22 × 0.22 mm
Pins / Total PadsTopology
169P / 169Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL)?

Manufactured by Semiconductor, the C6689610 is housed in a UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL package with 169 pins and a 0.50 mm lead pitch. Key pins include: A1 (PE2: Multiplexed I/O & Peripheral Pin PE2 (General)), A2 (PI6: Multiplexed I/O & Peripheral Pin PI6 (General)), A3 (VDD: Power Supply Input (VDD — 3.3V / 5.0V Standard Logic)), A4 (VDD11: Power Supply Input (VDD11 — 3.3V / 5.0V Standard Logic)), A5 (PG15: Multiplexed I/O & Peripheral Pin PG15 (General)), A6 (VDDIO2: Power Supply Input (VDDIO2 — 3.3V / 5.0V Standard Logic)).

What are the IPC-7351B PCB Footprint dimensions for C6689610?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), C6689610 (UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 169 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for C6689610?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for C6689610 (Semiconductor, UFBGA-169_L7.0-W7.0-R13-C13-P0.50-BL) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (169 pins) & STM32U585 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PE2Digital_IOSignal terminal PE2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
A2PI6Digital_IOSignal terminal PI6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PI6. Supported peripheral buses: General.
A3VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
A4VDD11Power_InPrimary positive power supply input (VDD11) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
A5PG15Digital_IOSignal terminal PG15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PG15. Supported peripheral buses: General.
A6VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
A7PG9Digital_IOSignal terminal PG9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PG9. Supported peripheral buses: General.
A8VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
A9PC11Digital_IOSignal terminal PC11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
A10PA15Digital_IOSignal terminal PA15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
A11VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
A12PI1Digital_IOSignal terminal PI1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PI1. Supported peripheral buses: General.
A13PH15Digital_IOSignal terminal PH15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PH15. Supported peripheral buses: General.
B1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
B2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B3PI5Digital_IOSignal terminal PI5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PI5. Supported peripheral buses: General.
B4VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
B6PB4Digital_IOSignal terminal PB4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
B7PD6Digital_IOSignal terminal PD6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General.
B8VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B9PD0Digital_IOSignal terminal PD0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
B10PI4Digital_IOSignal terminal PI4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PI4. Supported peripheral buses: General.
B11VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B12PI0Digital_IOSignal terminal PI0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PI0. Supported peripheral buses: General.
B13PH12Digital_IOSignal terminal PH12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PH12. Supported peripheral buses: General.
C1VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
C2PE4Digital_IOSignal terminal PE4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
C3PI7Digital_IOSignal terminal PI7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PI7. Supported peripheral buses: General.
C4PE1Digital_IOSignal terminal PE1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
C5PH3-BOOT0Digital_IOSignal terminal PH3-BOOT0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PH3-BOOT0. Supported peripheral buses: General.
C6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
C7PG10Digital_IOSignal terminal PG10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General.
C8PD4Digital_IOSignal terminal PD4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
C9PC10Digital_IOSignal terminal PC10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
C10PA14Digital_IOSignal terminal PA14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
C11PH14Digital_IOSignal terminal PH14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PH14. Supported peripheral buses: General.
C12PH13Digital_IOSignal terminal PH13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PH13. Supported peripheral buses: General.
C13PH10Digital_IOSignal terminal PH10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PH10. Supported peripheral buses: General.
D1PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
D2PE5Digital_IOSignal terminal PE5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
D3PE3Digital_IOSignal terminal PE3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
D4PE0Digital_IOSignal terminal PE0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
D5PB9Digital_IOSignal terminal PB9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
D6PB3Digital_IOSignal terminal PB3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
D7PD7Digital_IOSignal terminal PD7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General.
D8PD3Digital_IOSignal terminal PD3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
D9PH11Digital_IOSignal terminal PH11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PH11. Supported peripheral buses: General.
D10PI3Digital_IOSignal terminal PI3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PI3. Supported peripheral buses: General.
D11PI2Digital_IOSignal terminal PI2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PI2. Supported peripheral buses: General.
D12PH8Digital_IOSignal terminal PH8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PH8. Supported peripheral buses: General.
D13VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
E1PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
E2PF0Digital_IOSignal terminal PF0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF0. Supported peripheral buses: General.
E3PC13Digital_IOSignal terminal PC13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
E4PE6Digital_IOSignal terminal PE6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General.
E5PB8Digital_IOSignal terminal PB8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
E6PG12Digital_IOSignal terminal PG12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PG12. Supported peripheral buses: General.
E7PD5Digital_IOSignal terminal PD5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
E8PC12Digital_IOSignal terminal PC12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
E9PH9Digital_IOSignal terminal PH9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PH9. Supported peripheral buses: General.
E10PH4Digital_IOSignal terminal PH4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PH4. Supported peripheral buses: General.
E11PH6Digital_IOSignal terminal PH6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PH6. Supported peripheral buses: General.
E12VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
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