ChipDocs.org
⌘K
2284 PARTSUpload PDF
HMC571LC5TR (STM-32(5x5)) — Symbol, Footprint IPC-7351B & 3D STEP Model

HMC571LC5TR

ADIID: C661838STM-32(5x5) · 33 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · HMC571LC5TR (STM-32(5x5))1VDDLO2NC3VDDLO24NC5NC6NC7VDDRF8NC9NC10GND11RF12NC13NC14NC15NC16NC17NC33EP32NC31NC30LO29GND28NC27NC26NC25NC24GND23IF122NC21NC20IF219GND18NCGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.827.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233E=5.00mm · Pitch e=0.50mmD=5.00mm-4-3-2-10123443210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 5.00mm × 5.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (33/33)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VDDLOPowerPower Supply Input (VDDLO — 3.3V / 5.0V Standard Logic)
2NCI/OMultiplexed I/O & Peripheral Pin NC (General)
3VDDLO2PowerPower Supply Input (VDDLO2 — 3.3V / 5.0V Standard Logic)
4NCI/OMultiplexed I/O & Peripheral Pin NC (General)
5NCI/OMultiplexed I/O & Peripheral Pin NC (General)
6NCI/OMultiplexed I/O & Peripheral Pin NC (General)
7VDDRFPowerPower Supply Input (VDDRF — 3.3V / 5.0V Standard Logic)
8NCI/OMultiplexed I/O & Peripheral Pin NC (General)
9NCI/OMultiplexed I/O & Peripheral Pin NC (General)
10GNDGNDGround Reference Pin (GND)
11RFI/OMultiplexed I/O & Peripheral Pin RF (General)
12NCI/OMultiplexed I/O & Peripheral Pin NC (General)
13NCI/OMultiplexed I/O & Peripheral Pin NC (General)
14NCI/OMultiplexed I/O & Peripheral Pin NC (General)
15NCI/OMultiplexed I/O & Peripheral Pin NC (General)
16NCI/OMultiplexed I/O & Peripheral Pin NC (General)
17NCI/OMultiplexed I/O & Peripheral Pin NC (General)
18NCI/OMultiplexed I/O & Peripheral Pin NC (General)
19GNDGNDGround Reference Pin (GND)
20IF2I/OMultiplexed I/O & Peripheral Pin IF2 (General)
21NCI/OMultiplexed I/O & Peripheral Pin NC (General)
22NCI/OMultiplexed I/O & Peripheral Pin NC (General)
23IF1I/OMultiplexed I/O & Peripheral Pin IF1 (General)
24GNDGNDGround Reference Pin (GND)
25NCI/OMultiplexed I/O & Peripheral Pin NC (General)
26NCI/OMultiplexed I/O & Peripheral Pin NC (General)
27NCI/OMultiplexed I/O & Peripheral Pin NC (General)
28NCI/OMultiplexed I/O & Peripheral Pin NC (General)
29GNDGNDGround Reference Pin (GND)
30LOI/OMultiplexed I/O & Peripheral Pin LO (General)
31NCI/OMultiplexed I/O & Peripheral Pin NC (General)
32NCI/OMultiplexed I/O & Peripheral Pin NC (General)
33EPGNDExposed Thermal & Ground Pad (EP)
PIN 1 VDDLO
Power
Power Supply Input (VDDLO — 3.3V / 5.0V Standard Logic)
Design note: Primary positive power supply input (VDDLO) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 12 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: HMC571LC5TR (ADI · STM-32(5x5))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
HMC571LC5TR (STM-32(5x5)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
HMC571LC5TR (STM-32(5x5)) - 2. Standard Pinout (Top View)
True package pinout (33 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
HMC571LC5TR (STM-32(5x5)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
HMC571LC5TR (STM-32(5x5)) - 4. Package Dimensions (D×E×A)
STM-32(5x5) · 5.00×5.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
HMC571LC5TR (STM-32(5x5)) - 5. Recommended Land Pattern
IPC-7351B Footprint (33 Pads)Expand ›
6. Application SchematicSCHEMATIC
HMC571LC5TR (STM-32(5x5)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (12 figures · Page 1/1)
Showing 1–12 of 12 uncropped original figures for HMC571
P1 · p01_fig011782×769px
HMC571LC5TR (STM-32(5x5)) — 32 Lead 5x5mm SMT Package: 25mm²
32 Lead 5x5mm SMT Package: 25mm²
P1 · p01_fig021566×1129px
HMC571LC5TR (STM-32(5x5)) — Electrical Specifications, TA = +25 °C, IF = 100 MHz, LO = +4 dBm, Vdd = 3.5 Vdc*
Electrical Specifications, TA = +25 °C, IF = 100 MHz, LO = +4 dBm, Vdd = 3.5 Vdc*
P1 · p01_fig01P1
HMC571LC5TR (STM-32(5x5)) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P2 · p02_fig011782×616px
HMC571LC5TR (STM-32(5x5)) — 15
15
P2 · p02_fig021612×769px
HMC571LC5TR (STM-32(5x5)) — 21 - 25 GHz
21 - 25 GHz
P2 · p02_fig03824×690px
HMC571LC5TR (STM-32(5x5)) — Input P1dB vs. Temperature
Input P1dB vs. Temperature
P2 · p02_fig04863×896px
HMC571LC5TR (STM-32(5x5)) — 10
10
P2 · p02_fig05863×880px
HMC571LC5TR (STM-32(5x5)) — RF LO
RF LO
P2 · p02_fig06824×690px
HMC571LC5TR (STM-32(5x5)) — For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
P5 · p05_fig011782×1449px
HMC571LC5TR (STM-32(5x5)) — HMC571LC5 | v08.0514 | GaAs MMIC I/Q DOWNCONVERTER | 21 - 25 GHz | Outline Drawing
HMC571LC5 | v08.0514 | GaAs MMIC I/Q DOWNCONVERTER | 21 - 25 GHz | Outline Drawing
P6 · p06_fig011782×695px
HMC571LC5TR (STM-32(5x5)) — 2, 4 - 6, 8, 9, 12 - 18, 21, 22, 25 - 28, 31, 32 N/C No connection required. These pins may be connected
2, 4 - 6, 8, 9, 12 - 18, 21, 22, 25 - 28, 31, 32 N/C No connection required. These pins may be connected
P7 · p07_fig011782×1761px
HMC571LC5TR (STM-32(5x5)) — List of Materials for Evaluation PCB 113758 [1]
List of Materials for Evaluation PCB 113758 [1]

Technical Specifications & Part Details (HMC571LC5TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:HMC571LC5TR (STM-32(5x5)) is a 32-pin standard electronic & interconnect component featuring a 5.00 × 5.00 × 1.30 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across 85C -40C with integrated Standard I/O / Passive interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
85C -40C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
25 GHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
5.00 × 5.00 × 1.30 mm (A1=0.10 mm)
Package family: OTHER (STM-32(5x5))
Pin Count & Lead PitchN / e
32 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Standard I/O / Passive
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol33 auto-grouped pins
OK
IPC-7351B Land Pattern33 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteEPAD 3.50×3.50mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (STM-32(5x5))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
5.00 × 5.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.85mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 0.60 mm
Pins / Total PadsTopology
33P / 33Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
STM-32(5x5)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — HMC571LC5TR (STM-32(5x5))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of HMC571LC5TR (STM-32(5x5))?

Manufactured by ADI, the HMC571LC5TR is housed in a STM-32(5x5) package with 33 pins and a 0.50 mm lead pitch. Key pins include: 1 (VDDLO: Power Supply Input (VDDLO — 3.3V / 5.0V Standard Logic)), 2 (NC: Multiplexed I/O & Peripheral Pin NC (General)), 3 (VDDLO2: Power Supply Input (VDDLO2 — 3.3V / 5.0V Standard Logic)), 4 (NC: Multiplexed I/O & Peripheral Pin NC (General)), 5 (NC: Multiplexed I/O & Peripheral Pin NC (General)), 6 (NC: Multiplexed I/O & Peripheral Pin NC (General)).

What are the IPC-7351B PCB Footprint dimensions for HMC571LC5TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), HMC571LC5TR (STM-32(5x5)) has a nominal body envelope of 5.00 × 5.00 mm, pitch e = 0.50 mm, and 33 copper pads plus a central exposed thermal pad (EPAD) of 3.50 × 3.50 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for HMC571LC5TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for HMC571LC5TR (ADI, STM-32(5x5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (33 pins) & HMC571 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VDDLOPower_InPrimary positive power supply input (VDDLO) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
2NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
3VDDLO2Power_InPrimary positive power supply input (VDDLO2) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
4NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
5NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
6NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
7VDDRFPower_InPrimary positive power supply input (VDDRF) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
8NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
9NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
10GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
11RFRF_50OhmSignal terminal RF (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: RF. Supported peripheral buses: General.
12NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
13NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
14NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
15NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
16NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
17NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
18NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
19GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
20IF2Digital_IOSignal terminal IF2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: IF2. Supported peripheral buses: General.
21NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
22NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
23IF1Digital_IOSignal terminal IF1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: IF1. Supported peripheral buses: General.
24GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
25NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
26NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
27NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
28NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
29GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
30LODigital_IOSignal terminal LO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: LO. Supported peripheral buses: General.
31NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
32NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
33EPGNDBottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.
ExplorePartsPackagesMFRsUpload