- · 41P
Synchronized Pinout (Symbol / 2D / 3D) (41/41)
Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D| Pin | Symbol | Type | Function (EN) |
|---|---|---|---|
| 1 | GND | GND | Ground Reference Pin (GND) |
| 2 | 3V3 | Power | Power Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V)) |
| 3 | EN | I | System Enable & Hardware Reset (EN) |
| 4 | IO4 | I/O | Multiplexed I/O & Peripheral Pin IO4 (ADC, RTC/CLK, TOUCH) |
| 5 | IO5 | I/O | Multiplexed I/O & Peripheral Pin IO5 (ADC, RTC/CLK, TOUCH) |
| 6 | IO6 | I/O | Multiplexed I/O & Peripheral Pin IO6 (ADC, RTC/CLK, TOUCH) |
| 7 | IO7 | I/O | Multiplexed I/O & Peripheral Pin IO7 (ADC, RTC/CLK, TOUCH) |
| 8 | IO15 | I/O | Multiplexed I/O & Peripheral Pin IO15 (ADC, RTC/CLK) |
| 9 | IO16 | I/O | Multiplexed I/O & Peripheral Pin IO16 (ADC, RTC/CLK) |
| 10 | IO17 | I/O | Multiplexed I/O & Peripheral Pin IO17 (UART, ADC, DAC, RTC/CLK) |
| 11 | IO18 | I/O | Multiplexed I/O & Peripheral Pin IO18 (UART, ADC, DAC, RTC/CLK) |
| 12 | IO8 | I/O | Multiplexed I/O & Peripheral Pin IO8 (ADC, RTC/CLK, TOUCH) |
| 13 | IO19 | I/O | Multiplexed I/O & Peripheral Pin IO19 (USB, ADC, RTC/CLK) |
| 14 | IO20 | I/O | Multiplexed I/O & Peripheral Pin IO20 (USB, ADC, RTC/CLK) |
| 15 | IO3 | I/O | Multiplexed I/O & Peripheral Pin IO3 (ADC, RTC/CLK, TOUCH) |
| 16 | IO46 | I/O | Multiplexed I/O & Peripheral Pin IO46 (General) |
| 17 | IO9 | I/O | Multiplexed I/O & Peripheral Pin IO9 (SPI, ADC, RTC/CLK, TOUCH) |
| 18 | IO10 | I/O | Multiplexed I/O & Peripheral Pin IO10 (SPI, ADC, RTC/CLK, TOUCH) |
| 19 | IO11 | I/O | Multiplexed I/O & Peripheral Pin IO11 (SPI, ADC, RTC/CLK, TOUCH) |
| 20 | IO12 | I/O | Multiplexed I/O & Peripheral Pin IO12 (SPI, ADC, RTC/CLK, TOUCH) |
| 21 | IO13 | I/O | Multiplexed I/O & Peripheral Pin IO13 (SPI, ADC, RTC/CLK, TOUCH) |
| 22 | IO14 | I/O | Multiplexed I/O & Peripheral Pin IO14 (SPI, ADC, RTC/CLK, TOUCH) |
| 23 | IO21 | I/O | Multiplexed I/O & Peripheral Pin IO21 (RTC/CLK) |
| 24 | IO33 | I/O | Multiplexed I/O & Peripheral Pin IO33 (SPI) |
| 25 | IO34 | I | Input-Only Pin IO34 (SPI) |
| 26 | IO45 | I/O | Multiplexed I/O & Peripheral Pin IO45 (General) |
| 27 | IO0 | I/O | Multiplexed I/O & Peripheral Pin IO0 (RTC/CLK) |
| 28 | IO35 | I | Input-Only Pin IO35 (SPI) |
| 29 | IO36 | I | Input-Only Pin IO36 (SPI) |
| 30 | IO37 | I | Input-Only Pin IO37 (SPI) |
| 31 | IO38 | I | Input-Only Pin IO38 (SPI) |
| 32 | IO39 | I | Input-Only Pin IO39 (SWD/JTAG) |
| 33 | IO40 | I/O | Multiplexed I/O & Peripheral Pin IO40 (SWD/JTAG) |
| 34 | IO41 | I/O | Multiplexed I/O & Peripheral Pin IO41 (SWD/JTAG) |
| 35 | P IO42 | I/O | Multiplexed I/O & Peripheral Pin P IO42 (SWD/JTAG) |
| 36 | RXD0 | I/O | Multiplexed I/O & Peripheral Pin RXD0 (UART) |
| 37 | TXD0 | I/O | Multiplexed I/O & Peripheral Pin TXD0 (UART) |
| 38 | IO2 | I/O | Multiplexed I/O & Peripheral Pin IO2 (ADC, RTC/CLK, TOUCH) |
| 39 | IO1 | I/O | Multiplexed I/O & Peripheral Pin IO1 (ADC, RTC/CLK, TOUCH) |
| 40 | P40 | I/O | Multiplexed I/O & Peripheral Pin P40 (General) |
| 41 | EPAD/GND | GND | Ground Reference Pin (EPAD/GND) |
PIN 1 GND
GNDGround Reference Pin (GND)
Design note: Ground
IPC-7351B Solder Density & Span C/G/Z Tuner
Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 29 Extracted Figures)
Read the original datasheet PDF directly or click any drawing to view fullscreen1. Realistic 3D PackageREPRESENTATIVE
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
True package pinout (41 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
SMD-41P · 18.00×19.20mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
IPC-7351B Footprint (41 Pads)Expand ›
6. Application SchematicSCHEMATIC
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (29 figures · Page 1/3)
Showing 1–12 of 29 uncropped original figures for ESP32-S2-SOLO
P1 · p01_fig01EXACT PACKAGE
P1 · p01_fig02EXACT PACKAGE
P20 · p20_fig01EXACT PACKAGE
P20 · p20_fig02EXACT PACKAGE
P22 · p22_fig01EXACT PACKAGE
P22 · p22_fig04EXACT PACKAGE
P22 · p22_fig05EXACT PACKAGE
P1 · p01_fig03482×483px
P1 · p01_fig02P1
P9 · p09_fig012762×3601px
P9 · p09_fig021859×1740px
P21 · p21_fig012782×3601px
Page 1 / 3 (29 extracted figures)
Technical Specifications & Part Details (ESP32-S2-SOLO-2U-N4R2)
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)Detailed Overview:ESP32-S2-SOLO-2U-N4R2 (SMD-41P) is a 41-pin wireless wi-fi / bluetooth le soc module featuring a 19.20 × 18.00 × 3.10 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0 ~ 3.6 V supply operation across 85 °C – 105 °C with integrated Wi-Fi, USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, RTC/CLK, SWD/JTAG, TOUCH interfaces.
Operating Supply VoltageV_CC / V_DD
3.0 ~ 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
85 °C – 105 °C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
2.4 GHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_TX(peak) ≈ 310 mA @ 3.3V | Deep-Sleep ≈ 10 µA | I_GPIO(max) = 40 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
19.20 × 18.00 × 3.10 mm (A1=0.00 mm)
Package family: CASTELLATED_MODULE (SMD-41P)
Pin Count & Lead PitchN / e
41 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Wi-Fi, USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, RTC/CLK, SWD/JTAG, TOUCH
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (IO46, IO45, IO0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.
5-Point Standards Verification
Automated compliance checks prior to exportIEEE-315 Symbol41 auto-grouped pins
IPC-7351B Land Pattern41 pads · Pitch 1.27mm
IPC-7525 60% Solder PasteEPAD 3.70×3.70mm windowed grid
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
Hardware Verification & Community Engineering Reviews
Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet5.00 PCB Verified
IPC-7351B
Select package variant or sibling MPN sharing this datasheetFamily Variants & Same Datasheet Chips — ESP32-S2-SOLO (5)
SMD-40P · 41P
41P25.5×18.0×3.20mmP=1.27mm
ESP32-S2-SOLO (SMD-40P)
SMD-41P · 41P
41P25.5×18.0×3.10mmP=1.27mm
ESP32-S2-SOLO (SMD-41P)
SMD-41P · 41P
41P25.5×18.0×3.10mmP=1.27mm
ESP32-S2-SOLO (SMD-41P)
SMD-41P · 41P
41P19.2×18.0×3.20mmP=1.27mm
ESP32-S2-SOLO (SMD-41P)
Mechanical Dimensions & Land Pattern (SMD-41P)
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
19.20 × 18.00 mm
Height (A) & Pitch (e)IPC-7351B
A=3.20mm · e=1.27mm
Pad Size (W × L)Level B
0.90 × 1.50 mm
Pins / Total PadsTopology
41P / 41Pad (CASTELLATED_MODULE)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| C1, C2 BOM | 22µF (or 10µF) X5R + 100nF X7R 0805 + 0402 | 3V3 supply decoupling for ~500mA Wi-Fi TX bursts — place closest to 3V3 pin; supply must deliver >= 600mA. |
| R_en + C_en BOM | R = 10kΩ to 3V3 + C = 1µF to GND 0402 / 0603 | Power-On Reset RC delay at EN (CHIP_PU) — 1µF capacitor at EN is REQUIRED for reliable cold boot. |
| R_boot + SW1 BOM | 10kΩ Pull-up + BOOT button 0402 + SMD | Firmware boot-mode strap (IO0 on ESP32/S2/S3, IO9 on ESP32-C3) — on C3 pull IO8 high via 10kΩ for UART/USB download. |
| D_esd BOM | USBLC6-2SC6 / LESD5D5.0CT1G SOT-23-6 / SOD-523 | ESD surge protection on USB D+/D- — place right next to USB Type-C connector before IO18/IO19/IO20. |
| ESP32-S3-MINI-1-N8 / 1U-N4R2 Espressif | 100% Drop-in | Same 15.4×15.4mm 65-pad footprint as ESP32-S2-MINI-2 — verify USB GPIO 19/20 pin mapping. |
Technical Frequently Asked Questions (FAQ) — ESP32-S2-SOLO-2U-N4R2 (SMD-41P)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of ESP32-S2-SOLO-2U-N4R2 (SMD-41P)?
Manufactured by ESPRESSIF, the ESP32-S2-SOLO-2U-N4R2 is housed in a SMD-41P package with 41 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 3.0 ~ 3.6 V. Key pins include: 1 (GND: Ground Reference Pin (GND)), 2 (3V3: Power Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))), 3 (EN: System Enable & Hardware Reset (EN)), 4 (IO4: Multiplexed I/O & Peripheral Pin IO4 (ADC, RTC/CLK, TOUCH)), 5 (IO5: Multiplexed I/O & Peripheral Pin IO5 (ADC, RTC/CLK, TOUCH)), 6 (IO6: Multiplexed I/O & Peripheral Pin IO6 (ADC, RTC/CLK, TOUCH)).
What are the IPC-7351B PCB Footprint dimensions for ESP32-S2-SOLO-2U-N4R2?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ESP32-S2-SOLO-2U-N4R2 (SMD-41P) has a nominal body envelope of 18.00 × 19.20 mm, pitch e = 1.27 mm, and 41 copper pads plus a central exposed thermal pad (EPAD) of 3.70 × 3.70 mm with a 60% IPC-7525 windowed solder paste grid.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ESP32-S2-SOLO-2U-N4R2?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ESP32-S2-SOLO-2U-N4R2 (ESPRESSIF, SMD-41P) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (41 pins) & ESP32-S2-SOLO Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| 1 | GND | GND | 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks. |
| 2 | 3V3 | Power_In | Primary positive power supply input (3V3) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V). |
| 3 | EN | Digital_IO | Chip enable and power-on reset control input (EN): High enables the SoC; Low powers down the chip into reset. |
| 4 | IO4 | Digital_IO | Signal terminal IO4 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO4, GPIO4, TOUCH4, ADC1_CH3. Supported peripheral buses: ADC, RTC/CLK, TOUCH. |
| 5 | IO5 | Digital_IO | Signal terminal IO5 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO5, GPIO5, TOUCH5, ADC1_CH4. Supported peripheral buses: ADC, RTC/CLK, TOUCH. |
| 6 | IO6 | Digital_IO | Signal terminal IO6 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO6, GPIO6, TOUCH6, ADC1_CH5. Supported peripheral buses: ADC, RTC/CLK, TOUCH. |
| 7 | IO7 | Digital_IO | Signal terminal IO7 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO7, GPIO7, TOUCH7, ADC1_CH6. Supported peripheral buses: ADC, RTC/CLK, TOUCH. |
| 8 | IO15 | Digital_IO | Signal terminal IO15 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO15, GPIO15, U0RTS, ADC2_CH4. Supported peripheral buses: ADC, RTC/CLK. |
| 9 | IO16 | Digital_IO | Signal terminal IO16 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO16, GPIO16, U0CTS, ADC2_CH5. Supported peripheral buses: ADC, RTC/CLK. |
| 10 | IO17 | Digital_IO | Signal terminal IO17 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO17, GPIO17, U1TXD, ADC2_CH6. Supported peripheral buses: UART, ADC, DAC, RTC/CLK. |
| 11 | IO18 | Digital_IO | Signal terminal IO18 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO18, GPIO18, U1RXD, ADC2_CH7, CLK_OUT3. Supported peripheral buses: UART, ADC, DAC, RTC/CLK. |
| 12 | IO8 | Digital_IO | Signal terminal IO8 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO8, GPIO8, TOUCH8, ADC1_CH7. Supported peripheral buses: ADC, RTC/CLK, TOUCH. |
| 13 | IO19 | Digital_IO | Signal terminal IO19 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO19, GPIO19, U1RTS, ADC2_CH8, CLK_OUT2. Supported peripheral buses: USB, ADC, RTC/CLK. |
| 14 | IO20 | Digital_IO | Signal terminal IO20 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO20, GPIO20, U1CTS, ADC2_CH9, CLK_OUT1. Supported peripheral buses: USB, ADC, RTC/CLK. |
| 15 | IO3 | Digital_IO | Signal terminal IO3 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO3, GPIO3, TOUCH3, ADC1_CH2. Supported peripheral buses: ADC, RTC/CLK, TOUCH. |
| 16 | IO46 | Digital_IO | Signal terminal IO46 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO46. Supported peripheral buses: General. |
| 17 | IO9 | Digital_IO | Signal terminal IO9 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO9, GPIO9, TOUCH9, ADC1_CH8, FSPIHD. Supported peripheral buses: SPI, ADC, RTC/CLK, TOUCH. |
| 18 | IO10 | Digital_IO | Signal terminal IO10 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO10, GPIO10, TOUCH10, ADC1_CH9, FSPICS0, FSPIIO4. Supported peripheral buses: SPI, ADC, RTC/CLK, TOUCH. |
| 19 | IO11 | Digital_IO | Signal terminal IO11 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO11, GPIO11, TOUCH11, ADC2_CH0, FSPID, FSPIIO5. Supported peripheral buses: SPI, ADC, RTC/CLK, TOUCH. |
| 20 | IO12 | Digital_IO | Signal terminal IO12 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO12, GPIO12, TOUCH12, ADC2_CH1, FSPICLK, FSPIIO6. Supported peripheral buses: SPI, ADC, RTC/CLK, TOUCH. |
| 21 | IO13 | Digital_IO | Signal terminal IO13 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO13, GPIO13, TOUCH13, ADC2_CH2, FSPIQ, FSPIIO7. Supported peripheral buses: SPI, ADC, RTC/CLK, TOUCH. |
| 22 | IO14 | Digital_IO | Signal terminal IO14 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO14, GPIO14, TOUCH14, ADC2_CH3, FSPIWP, FSPIDQS. Supported peripheral buses: SPI, ADC, RTC/CLK, TOUCH. |
| 23 | IO21 | Digital_IO | Signal terminal IO21 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO21, GPIO21. Supported peripheral buses: RTC/CLK. |
| 24 | IO33 | Digital_IO | Signal terminal IO33 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO4, GPIO33, FSPIHD. Supported peripheral buses: SPI. |
| 25 | IO34 | Digital_IO | Signal terminal IO34 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO5, GPIO34, FSPICS0. Supported peripheral buses: SPI. |
| 26 | IO45 | Digital_IO | Signal terminal IO45 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO45. Supported peripheral buses: General. |
| 27 | IO0 | Digital_IO | Signal terminal IO0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO0, GPIO0. Supported peripheral buses: RTC/CLK. |
| 28 | IO35 | Digital_IO | Signal terminal IO35 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO6, GPIO35, FSPID. Supported peripheral buses: SPI. |
| 29 | IO36 | Digital_IO | Signal terminal IO36 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIIO7, GPIO36, FSPICLK. Supported peripheral buses: SPI. |
| 30 | IO37 | Digital_IO | Signal terminal IO37 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: SPIDQS, GPIO37, FSPIQ. Supported peripheral buses: SPI. |
| 31 | IO38 | Digital_IO | Signal terminal IO38 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: GPIO38, FSPIWP. Supported peripheral buses: SPI. |
| 32 | IO39 | Digital_IO | Signal terminal IO39 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTCK, GPIO39, CLK_OUT3. Supported peripheral buses: SWD/JTAG. |
| 33 | IO40 | Digital_IO | Signal terminal IO40 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTDO, GPIO40, CLK_OUT2. Supported peripheral buses: SWD/JTAG. |
| 34 | IO41 | Digital_IO | Signal terminal IO41 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTDI, GPIO41, CLK_OUT1. Supported peripheral buses: SWD/JTAG. |
| 35 | P IO42 | Digital_IO | Signal terminal P IO42 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: MTMS, GPIO42. Supported peripheral buses: SWD/JTAG. |
| 36 | RXD0 | Digital_IO | Signal terminal RXD0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: U0RXD, GPIO44, CLK_OUT2. Supported peripheral buses: UART. |
| 37 | TXD0 | Digital_IO | Signal terminal TXD0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: U0TXD, GPIO43, CLK_OUT1. Supported peripheral buses: UART. |
| 38 | IO2 | Digital_IO | Signal terminal IO2 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO2, GPIO2, TOUCH2, ADC1_CH1. Supported peripheral buses: ADC, RTC/CLK, TOUCH. |
| 39 | IO1 | Digital_IO | Signal terminal IO1 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RTC_GPIO1, GPIO1, TOUCH1, ADC1_CH0. Supported peripheral buses: ADC, RTC/CLK, TOUCH. |
| 40 | P40 | Digital_IO | Signal terminal P40 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: P40. Supported peripheral buses: General. |
| 41 | EPAD/GND | GND | 0V electrical ground return terminal (EPAD/GND) for internal core logic, I/O drivers, and analog sub-blocks. |