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AT24C16B-TH-B (TSSOP-8) — Symbol, Footprint IPC-7351B & 3D STEP Model

AT24C16B-TH-B

MICROCHIPID: C6508037TSSOP-8 · 8 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · AT24C16B-TH-B (TSSOP-8)1NC2NC3NC4GND8VCC7WP6SCL5SDAGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.810.25.10-5.1-10.2mm
2. 2D FOOTPRINT
12345678E=3.00mm · Pitch e=0.65mmD=4.40mm-5-4-3-2-101234543210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 3.00mm × 4.40mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (8/8)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1NCI/OMultiplexed I/O & Peripheral Pin NC (General)
2NCI/OMultiplexed I/O & Peripheral Pin NC (General)
3NCI/OMultiplexed I/O & Peripheral Pin NC (General)
4GNDGNDGround Reference Pin (GND)
5SDAI/OMultiplexed I/O & Peripheral Pin SDA (I2C)
6SCLI/OMultiplexed I/O & Peripheral Pin SCL (I2C)
7WPI/OMultiplexed I/O & Peripheral Pin WP (General)
8VCCPowerPower Supply Input (VCC — 1.8V to 5.5V)
PIN 1 NC
I/O
Multiplexed I/O & Peripheral Pin NC (General)
Design note: Signal terminal NC (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 7 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: AT24C16B-TH-B (MICROCHIP · TSSOP-8)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
AT24C16B-TH-B (TSSOP-8) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
AT24C16B-TH-B (TSSOP-8) - 2. Standard Pinout (Top View)
True package pinout (8 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
AT24C16B-TH-B (TSSOP-8) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
AT24C16B-TH-B (TSSOP-8) - 4. Package Dimensions (D×E×A)
TSSOP-8 · 3.00×4.40mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
AT24C16B-TH-B (TSSOP-8) - 5. Recommended Land Pattern
IPC-7351B Footprint (8 Pads)Expand ›
6. Application SchematicSCHEMATIC
AT24C16B-TH-B (TSSOP-8) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (7 figures · Page 1/1)
Showing 1–7 of 7 uncropped original figures for AT24C16B
P1 · p01_fig01524×243px
AT24C16B-TH-B (TSSOP-8) — Two-wire Serial EEPROM
Two-wire Serial EEPROM
P1 · p01_fig01P1
AT24C16B-TH-B (TSSOP-8) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P2 · p02_fig011279×1080px
AT24C16B-TH-B (TSSOP-8) — Figure 2-1. Block Diagram
Figure 2-1. Block Diagram
P21 · p21_fig012128×2773px
AT24C16B-TH-B (TSSOP-8) — 21 | 5175E-SEEPR-3/09 | AT24C16B | 12.3 8A2 - TSSOP | 2325 Orchard Parkway San Jose, CA 95131 | TITLE DRAWING NO. | R | REV. | 5/30/02 | COMMON DIMENSIONS | (Unit of Measure = mm) | SYMBOL MIN NOM MAX NOTE | D 2.90 3.00 3.10 2, 5 | E 6.40 B
21 | 5175E-SEEPR-3/09 | AT24C16B | 12.3 8A2 - TSSOP | 2325 Orchard Parkway San Jose, CA 95131 | TITLE DRAWING NO. | R | REV. | 5/30/02 | COMMON DIMENSIONS | (Unit of Measure = mm) | SYMBOL MIN NOM MAX NOTE | D 2.90 3.00 3.10 2, 5 | E 6.40 B
P21 · p21_fig01P21
AT24C16B-TH-B (TSSOP-8) — Datasheet Page 21 (p21_fig01)
Datasheet Page 21 (p21_fig01)
P22 · p22_fig012124×2747px
AT24C16B-TH-B (TSSOP-8) — 22 | 5175E-SEEPR-3/09 AT24C16B | 12.4 8Y6 - Mini Map | 2325 Orchard Parkway San Jose, CA 95131 | TITLE DRAWING NO. | R | REV. 8Y6, 8-lead 2.0 x 3.0 mm Body, 0.50 mm Pitch, Utlra Thin Mini-Map, Dual No Lead Package (DFN) ,(MLP 2x3) D 8Y6 | 1
22 | 5175E-SEEPR-3/09 AT24C16B | 12.4 8Y6 - Mini Map | 2325 Orchard Parkway San Jose, CA 95131 | TITLE DRAWING NO. | R | REV. 8Y6, 8-lead 2.0 x 3.0 mm Body, 0.50 mm Pitch, Utlra Thin Mini-Map, Dual No Lead Package (DFN) ,(MLP 2x3) D 8Y6 | 1
P25 · p25_fig012128×2773px
AT24C16B-TH-B (TSSOP-8) — 25 | 5175E-SEEPR-3/09 | AT24C16B | 12.7 8D3 - ULA | 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 | TITLE DRAWING NO. | R | REV. 8D3, 8-lead (1.80 x 2.20 mm Body) Ultra Leadframe Land Grid Array (ULLGA) D3 0 8D3 | 11/15/05 | COMMON
25 | 5175E-SEEPR-3/09 | AT24C16B | 12.7 8D3 - ULA | 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 | TITLE DRAWING NO. | R | REV. 8D3, 8-lead (1.80 x 2.20 mm Body) Ultra Leadframe Land Grid Array (ULLGA) D3 0 8D3 | 11/15/05 | COMMON

Technical Specifications & Part Details (AT24C16B-TH-B)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:AT24C16B-TH-B (TSSOP-8) is a 8-pin standard electronic & interconnect component featuring a 3.00 × 4.40 × 1.20 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 1.8V to 5.5V supply operation across 55°C to +125°C with integrated I2C interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V to 5.5V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
55°C to +125°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
1 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
3.00 × 4.40 × 1.20 mm (A1=0.10 mm)
Package family: TSSOP (TSSOP-8)
Pin Count & Lead PitchN / e
8 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
I2C
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol8 auto-grouped pins
OK
IPC-7351B Land Pattern8 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TSSOP-8)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
3.00 × 4.40 mm
Height (A) & Pitch (e)IPC-7351B
A=1.20mm · e=0.65mm
Pad Size (W × L)Level B
0.42 × 1.45 mm
Pins / Total PadsTopology
8P / 8Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
TSSOP-8
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — AT24C16B-TH-B (TSSOP-8)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of AT24C16B-TH-B (TSSOP-8)?

Manufactured by MICROCHIP, the AT24C16B-TH-B is housed in a TSSOP-8 package with 8 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 1.8V to 5.5V. Key pins include: 1 (NC: Multiplexed I/O & Peripheral Pin NC (General)), 2 (NC: Multiplexed I/O & Peripheral Pin NC (General)), 3 (NC: Multiplexed I/O & Peripheral Pin NC (General)), 4 (GND: Ground Reference Pin (GND)), 5 (SDA: Multiplexed I/O & Peripheral Pin SDA (I2C)), 6 (SCL: Multiplexed I/O & Peripheral Pin SCL (I2C)).

What are the IPC-7351B PCB Footprint dimensions for AT24C16B-TH-B?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), AT24C16B-TH-B (TSSOP-8) has a nominal body envelope of 4.40 × 3.00 mm, pitch e = 0.65 mm, and 8 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for AT24C16B-TH-B?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for AT24C16B-TH-B (MICROCHIP, TSSOP-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (8 pins) & AT24C16B Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1NCNCSignal terminal NC (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
2NCNCSignal terminal NC (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
3NCNCSignal terminal NC (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
4GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
5SDADigital_IOSignal terminal SDA (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: SDA. Supported peripheral buses: I2C.
6SCLDigital_IOSignal terminal SCL (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: SCL. Supported peripheral buses: I2C.
7WPDigital_IOSignal terminal WP (I/O, 1.8V to 5.5V domain). Multiplexed alternate functions: WP. Supported peripheral buses: General.
8VCCPower_InPrimary positive power supply input (VCC) operating in the 1.8V to 5.5V domain (Max rating: 5.5V).
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