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C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL) — Symbol, Footprint IPC-7351B & 3D STEP Model

C6501783

SemiconductorLQFP-128_L14.0-W14.0-P0.40-LS16.0-BL · 128 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL)1PE22PE33PE44PE55PE66VBAT7PC138PC14-OSC32_I9PC15-OSC32_O10PF311PF412VSS13VDD14PF515PF716PF817PF918PF1019PF0-OSC_IN20PF1-OSC_OUT21PG10-NRST22PC023PC124PC225PC326PF227PA028PA129PA230VSS31VDD32PA333PA434PA535PA636PA737PC438PC539PB040PB141PB242VSSA43VREF+44VREF+45VDDA46VSS47VDD48PF1149PF1250PF1351PF1452PF1553PE754PE855PE956PE1057PE1158PE1259PE1360PE1461PE1562PB1063VSS64VDD128VDD127VSS126PE1125PE0124PB9123PB8-BOOT0122PB7121PB6120PB5119PB4118PB3117PD7116PD6115PD5114PD4113PD3112PD2111VDD110VSS109PD1108PD0107PG9106PG8105PG7104PG6103PG5102PC12101PC11100PC1099PA1598PA1497PF696PA1395VDD94VSS93PA1292PA1191PA1090PA989PA888PC987PC886PG485PG384PG283PG182PG081PC780PC679VDD78VSS77PD1576PD1475PD1374PD1273PD1172PD1071PD970PD869PB1568PB1467PB1366PB1265PB11Grid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.286.481.376.271.166.061.055.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9-61.0-66.0-71.1-76.2-81.3-86.4mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128E=14.00mm · Pitch e=0.40mmD=14.00mm-13-11-9-7-5-3-1135791113131197531-1-3-5-7-9-11-13mm
3. 3D CAD MODEL
Package Body: 14.00mm × 14.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (128/128)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
3PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
4PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
5PE6I/OMultiplexed I/O & Peripheral Pin PE6 (General)
6VBATPowerPower Supply Input (VBAT — 3.3V / 5.0V Standard Logic)
7PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
8PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
9PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
10PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
11PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
12VSSGNDGround Reference Pin (VSS)
13VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
14PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
15PF7I/OMultiplexed I/O & Peripheral Pin PF7 (General)
16PF8I/OMultiplexed I/O & Peripheral Pin PF8 (General)
17PF9I/OMultiplexed I/O & Peripheral Pin PF9 (General)
18PF10I/OMultiplexed I/O & Peripheral Pin PF10 (General)
19PF0-OSC_INI/OMultiplexed I/O & Peripheral Pin PF0-OSC_IN (RTC/CLK)
20PF1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PF1-OSC_OUT (RTC/CLK)
21PG10-NRSTI/OMultiplexed I/O & Peripheral Pin PG10-NRST (General)
22PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
23PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
24PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
25PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
26PF2I/OMultiplexed I/O & Peripheral Pin PF2 (General)
27PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
28PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
29PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
30VSSGNDGround Reference Pin (VSS)
31VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
32PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
33PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
34PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
35PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
36PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
37PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
38PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
39PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
40PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
41PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
42VSSAGNDGround Reference Pin (VSSA)
43VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (General)
44VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (General)
45VDDAPowerPower Supply Input (VDDA — 3.3V / 5.0V Standard Logic)
46VSSGNDGround Reference Pin (VSS)
47VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
48PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
49PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
50PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
51PF14I/OMultiplexed I/O & Peripheral Pin PF14 (General)
52PF15I/OMultiplexed I/O & Peripheral Pin PF15 (General)
53PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
54PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
55PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
56PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
57PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
58PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
59PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
60PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
61PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
62PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
63VSSGNDGround Reference Pin (VSS)
64VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
65PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
66PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
67PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
68PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
69PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
70PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
71PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
72PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
73PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
74PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
75PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
76PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
77PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
78VSSGNDGround Reference Pin (VSS)
79VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
80PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
81PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
82PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
83PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
84PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
85PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
86PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
87PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
88PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
89PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
90PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
91PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
92PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
93PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
94VSSGNDGround Reference Pin (VSS)
95VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
96PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
97PF6I/OMultiplexed I/O & Peripheral Pin PF6 (General)
98PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
99PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
100PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
101PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
102PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
103PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
104PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
105PG7I/OMultiplexed I/O & Peripheral Pin PG7 (General)
106PG8I/OMultiplexed I/O & Peripheral Pin PG8 (General)
107PG9I/OMultiplexed I/O & Peripheral Pin PG9 (General)
108PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
109PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
110VSSGNDGround Reference Pin (VSS)
111VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
112PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
113PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
114PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
115PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
116PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
117PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
118PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
119PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
120PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
121PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
122PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
123PB8-BOOT0I/OMultiplexed I/O & Peripheral Pin PB8-BOOT0 (General)
124PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
125PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
126PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
127VSSGNDGround Reference Pin (VSS)
128VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
PIN 1 PE2
I/O
Multiplexed I/O & Peripheral Pin PE2 (General)
Design note: Signal terminal PE2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: C6501783 (Semiconductor · LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL) - 2. Standard Pinout (Top View)
True package pinout (128 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL) - 4. Package Dimensions (D×E×A)
LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL · 14.00×14.00mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL) - 5. Recommended Land Pattern
IPC-7351B Footprint (128 Pads)Expand ›
6. Application SchematicSCHEMATIC
C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (C6501783)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL) is a 128-pin standard electronic & interconnect component featuring a 7.00 × 7.00 × 1.60 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL)
Pin Count & Lead PitchN / e
128 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol128 auto-grouped pins
OK
IPC-7351B Land Pattern128 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
14.00 × 14.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 1.46 mm
Pins / Total PadsTopology
128P / 128Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL)?

Manufactured by Semiconductor, the C6501783 is housed in a LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL package with 128 pins and a 0.40 mm lead pitch. Key pins include: 1 (PE2: Multiplexed I/O & Peripheral Pin PE2 (General)), 2 (PE3: Multiplexed I/O & Peripheral Pin PE3 (General)), 3 (PE4: Multiplexed I/O & Peripheral Pin PE4 (General)), 4 (PE5: Multiplexed I/O & Peripheral Pin PE5 (General)), 5 (PE6: Multiplexed I/O & Peripheral Pin PE6 (General)), 6 (VBAT: Power Supply Input (VBAT — 3.3V / 5.0V Standard Logic)).

What are the IPC-7351B PCB Footprint dimensions for C6501783?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), C6501783 (LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL) has a nominal body envelope of 14.00 × 14.00 mm, pitch e = 0.40 mm, and 128 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for C6501783?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for C6501783 (Semiconductor, LQFP-128_L14.0-W14.0-P0.40-LS16.0-BL) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (128 pins) & STM32G473 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PE2Digital_IOSignal terminal PE2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
3PE4Digital_IOSignal terminal PE4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
4PE5Digital_IOSignal terminal PE5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
5PE6Digital_IOSignal terminal PE6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General.
6VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
7PC13Digital_IOSignal terminal PC13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
8PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
9PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
10PF3Digital_IOSignal terminal PF3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF3. Supported peripheral buses: General.
11PF4Digital_IOSignal terminal PF4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF4. Supported peripheral buses: General.
12VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
13VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
14PF5Digital_IOSignal terminal PF5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF5. Supported peripheral buses: General.
15PF7Digital_IOSignal terminal PF7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF7. Supported peripheral buses: General.
16PF8Digital_IOSignal terminal PF8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF8. Supported peripheral buses: General.
17PF9Digital_IOSignal terminal PF9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF9. Supported peripheral buses: General.
18PF10Digital_IOSignal terminal PF10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF10. Supported peripheral buses: General.
19PF0-OSC_INDigital_IOSignal terminal PF0-OSC_IN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF0-OSC_IN. Supported peripheral buses: RTC/CLK.
20PF1-OSC_OUTDigital_IOSignal terminal PF1-OSC_OUT (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF1-OSC_OUT. Supported peripheral buses: RTC/CLK.
21PG10-NRSTDigital_IOSignal terminal PG10-NRST (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PG10-NRST. Supported peripheral buses: General.
22PC0Digital_IOSignal terminal PC0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC0. Supported peripheral buses: General.
23PC1Digital_IOSignal terminal PC1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC1. Supported peripheral buses: General.
24PC2Digital_IOSignal terminal PC2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC2. Supported peripheral buses: General.
25PC3Digital_IOSignal terminal PC3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC3. Supported peripheral buses: General.
26PF2Digital_IOSignal terminal PF2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF2. Supported peripheral buses: General.
27PA0Digital_IOSignal terminal PA0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA0. Supported peripheral buses: General.
28PA1Digital_IOSignal terminal PA1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
29PA2Digital_IOSignal terminal PA2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
30VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
31VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
32PA3Digital_IOSignal terminal PA3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General.
33PA4Digital_IOSignal terminal PA4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General.
34PA5Digital_IOSignal terminal PA5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
35PA6Digital_IOSignal terminal PA6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
36PA7Digital_IOSignal terminal PA7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General.
37PC4Digital_IOSignal terminal PC4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC4. Supported peripheral buses: General.
38PC5Digital_IOSignal terminal PC5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC5. Supported peripheral buses: General.
39PB0Digital_IOSignal terminal PB0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB0. Supported peripheral buses: General.
40PB1Digital_IOSignal terminal PB1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General.
41PB2Digital_IOSignal terminal PB2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General.
42VSSAGND0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
43VREF+Digital_IOSignal terminal VREF+ (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
44VREF+Digital_IOSignal terminal VREF+ (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
45VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
46VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
47VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
48PF11Digital_IOSignal terminal PF11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF11. Supported peripheral buses: General.
49PF12Digital_IOSignal terminal PF12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF12. Supported peripheral buses: General.
50PF13Digital_IOSignal terminal PF13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF13. Supported peripheral buses: General.
51PF14Digital_IOSignal terminal PF14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF14. Supported peripheral buses: General.
52PF15Digital_IOSignal terminal PF15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF15. Supported peripheral buses: General.
53PE7Digital_IOSignal terminal PE7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General.
54PE8Digital_IOSignal terminal PE8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE8. Supported peripheral buses: General.
55PE9Digital_IOSignal terminal PE9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE9. Supported peripheral buses: General.
56PE10Digital_IOSignal terminal PE10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE10. Supported peripheral buses: General.
57PE11Digital_IOSignal terminal PE11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE11. Supported peripheral buses: General.
58PE12Digital_IOSignal terminal PE12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE12. Supported peripheral buses: General.
59PE13Digital_IOSignal terminal PE13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE13. Supported peripheral buses: General.
60PE14Digital_IOSignal terminal PE14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE14. Supported peripheral buses: General.
61PE15Digital_IOSignal terminal PE15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE15. Supported peripheral buses: General.
62PB10Digital_IOSignal terminal PB10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
63VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
64VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
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