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RN2483A-I/RM105 (SMD,26.7x17.8mm) — Symbol, Footprint IPC-7351B & 3D STEP Model

RN2483A-I/RM105

MICROCHIPSMD,26.7x17.8mm · 47 Pins · Pitch 1.27mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · RN2483A-I/RM105 (SMD,26.7x17.8mm)1GND2UART_RTS3UART_CTS4RESERVED5RESERVED6UART_TX7UART_RX8GND9GPIO1310GPIO1211GND12VDD13GPIO1114GPIO1015NC16NC17NC18NC19NC20GND21GND22GND23RFH24GND47GND46GPIO945GPIO844GPIO743GPIO642NC41GND40GPIO539GPIO438GPIO337GPIO236GPIO135GPIO034VDD33GND32RESET31PGD_INT30PGC_INT29NC28GND27GND26GND25RFLGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.835.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6mm
2. 2D FOOTPRINT
1234567891011121314151617181920212223242526272829303132333435363738394041424344454647E=17.80mm · Pitch e=1.27mmD=26.70mm-17-15-13-11-9-7-5-3-1135791113151721191715131197531-1-3-5-7-9-11-13-15-17-19-21mm
3. 3D CAD MODEL
Package Body: 17.80mm × 26.70mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (47/47)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1GNDGNDGround Reference Pin (GND)
2UART_RTSI/OMultiplexed I/O & Peripheral Pin UART_RTS (UART)
3UART_CTSI/OMultiplexed I/O & Peripheral Pin UART_CTS (UART)
4RESERVEDI/OMultiplexed I/O & Peripheral Pin RESERVED (General)
5RESERVEDI/OMultiplexed I/O & Peripheral Pin RESERVED (General)
6UART_TXI/OMultiplexed I/O & Peripheral Pin UART_TX (UART)
7UART_RXI/OMultiplexed I/O & Peripheral Pin UART_RX (UART)
8GNDGNDGround Reference Pin (GND)
9GPIO13I/OMultiplexed I/O & Peripheral Pin GPIO13 (General)
10GPIO12I/OMultiplexed I/O & Peripheral Pin GPIO12 (General)
11GNDGNDGround Reference Pin (GND)
12VDDPowerPower Supply Input (VDD — 2.1V to 3.6V)
13GPIO11I/OMultiplexed I/O & Peripheral Pin GPIO11 (General)
14GPIO10I/OMultiplexed I/O & Peripheral Pin GPIO10 (General)
15NCI/OMultiplexed I/O & Peripheral Pin NC (General)
16NCI/OMultiplexed I/O & Peripheral Pin NC (General)
17NCI/OMultiplexed I/O & Peripheral Pin NC (General)
18NCI/OMultiplexed I/O & Peripheral Pin NC (General)
19NCI/OMultiplexed I/O & Peripheral Pin NC (General)
20GNDGNDGround Reference Pin (GND)
21GNDGNDGround Reference Pin (GND)
22GNDGNDGround Reference Pin (GND)
23RFHI/OMultiplexed I/O & Peripheral Pin RFH (General)
24GNDGNDGround Reference Pin (GND)
25RFLI/OMultiplexed I/O & Peripheral Pin RFL (General)
26GNDGNDGround Reference Pin (GND)
27GNDGNDGround Reference Pin (GND)
28GNDGNDGround Reference Pin (GND)
29NCI/OMultiplexed I/O & Peripheral Pin NC (General)
30PGC_INTI/OMultiplexed I/O & Peripheral Pin PGC_INT (General)
31PGD_INTI/OMultiplexed I/O & Peripheral Pin PGD_INT (General)
32RESETISystem Enable & Hardware Reset (RESET)
33GNDGNDGround Reference Pin (GND)
34VDDPowerPower Supply Input (VDD — 2.1V to 3.6V)
35GPIO0I/OMultiplexed I/O & Peripheral Pin GPIO0 (General)
36GPIO1I/OMultiplexed I/O & Peripheral Pin GPIO1 (General)
37GPIO2I/OMultiplexed I/O & Peripheral Pin GPIO2 (General)
38GPIO3I/OMultiplexed I/O & Peripheral Pin GPIO3 (General)
39GPIO4I/OMultiplexed I/O & Peripheral Pin GPIO4 (General)
40GPIO5I/OMultiplexed I/O & Peripheral Pin GPIO5 (General)
41GNDGNDGround Reference Pin (GND)
42NCI/OMultiplexed I/O & Peripheral Pin NC (General)
43GPIO6I/OMultiplexed I/O & Peripheral Pin GPIO6 (General)
44GPIO7I/OMultiplexed I/O & Peripheral Pin GPIO7 (General)
45GPIO8I/OMultiplexed I/O & Peripheral Pin GPIO8 (General)
46GPIO9I/OMultiplexed I/O & Peripheral Pin GPIO9 (General)
47GNDGNDGround Reference Pin (GND)
PIN 1 GND
GND
Ground Reference Pin (GND)
Design note: Groundsupplyterminal
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: RN2483A-I/RM105 (MICROCHIP · SMD,26.7x17.8mm)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
RN2483A-I/RM105 (SMD,26.7x17.8mm) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
RN2483A-I/RM105 (SMD,26.7x17.8mm) - 2. Standard Pinout (Top View)
True package pinout (47 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
RN2483A-I/RM105 (SMD,26.7x17.8mm) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
RN2483A-I/RM105 (SMD,26.7x17.8mm) - 4. Package Dimensions (D×E×A)
SMD,26.7x17.8mm · 17.80×26.70mm · Pitch 1.27mmExpand ›
5. Recommended Land PatternLAND PATTERN
RN2483A-I/RM105 (SMD,26.7x17.8mm) - 5. Recommended Land Pattern
IPC-7351B Footprint (47 Pads)Expand ›
6. Application SchematicSCHEMATIC
RN2483A-I/RM105 (SMD,26.7x17.8mm) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)
Showing 1–9 of 9 uncropped original figures for RN2483
P1 · p01_fig01376×200px
RN2483A-I/RM105 (SMD,26.7x17.8mm) — Low-Power Long Range LoRa® Technology
Low-Power Long Range LoRa® Technology
P1 · p01_fig02787×563px
RN2483A-I/RM105 (SMD,26.7x17.8mm) — Description
Description
P2 · p02_fig011778×724px
RN2483A-I/RM105 (SMD,26.7x17.8mm) — TO OUR VALUED CUSTOMERS
TO OUR VALUED CUSTOMERS
P3 · p03_fig01785×579px
RN2483A-I/RM105 (SMD,26.7x17.8mm) — FIGURE 1-1: RN2483 TOP VIEW
FIGURE 1-1: RN2483 TOP VIEW
P3 · p03_fig021777×1170px
RN2483A-I/RM105 (SMD,26.7x17.8mm) — FIGURE 1-3: RN2483 BLOCK DIAGRAM
FIGURE 1-3: RN2483 BLOCK DIAGRAM
P11 · p11_fig011741×1026px
RN2483A-I/RM105 (SMD,26.7x17.8mm) — FIGURE 4-1: RN2483 PHYSICAL DIMENSIONS
FIGURE 4-1: RN2483 PHYSICAL DIMENSIONS
P11 · p11_fig021777×1185px
RN2483A-I/RM105 (SMD,26.7x17.8mm) — FIGURE 4-2: RECOMMENDED PCB FOOTPRINT
FIGURE 4-2: RECOMMENDED PCB FOOTPRINT
P12 · p12_fig011627×725px
RN2483A-I/RM105 (SMD,26.7x17.8mm) — FIGURE 5-1: RF TRACE ROUTING (TOP LAYER)
FIGURE 5-1: RF TRACE ROUTING (TOP LAYER)
P12 · p12_fig021720×833px
RN2483A-I/RM105 (SMD,26.7x17.8mm) — FIGURE 5-2: RF TRACE ROUTING (BOTTOM LAYER)
FIGURE 5-2: RF TRACE ROUTING (BOTTOM LAYER)

Technical Specifications & Part Details (RN2483A-I/RM105)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Wireless Wi-Fi / Bluetooth LE SoC Module
Detailed Overview:RN2483A-I/RM105 (SMD,26.7x17.8mm) is a 47-pin wireless wi-fi / bluetooth le soc module featuring a 26.67 × 17.78 × 3.10 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 2.1V to 3.6V supply operation across -40°C to +85°C with integrated UART, SPI, I2C interfaces.
Operating Supply VoltageV_CC / V_DD
2.1V to 3.6V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to +85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
433 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
26.67 × 17.78 × 3.10 mm (A1=0.00 mm)
Package family: CASTELLATED_MODULE (SMD,26.7x17.8mm)
Pin Count & Lead PitchN / e
47 Pins | Pitch e = 1.27 mm (50.0 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (GPIO0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol47 auto-grouped pins
OK
IPC-7351B Land Pattern47 pads · Pitch 1.27mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SMD,26.7x17.8mm)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
26.70 × 17.80 mm
Height (A) & Pitch (e)IPC-7351B
A=3.10mm · e=1.27mm
Pad Size (W × L)Level B
1.02 × 1.52 mm
Pins / Total PadsTopology
47P / 47Pad (CASTELLATED_MODULE)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SMD,26.7x17.8mm
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — RN2483A-I/RM105 (SMD,26.7x17.8mm)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of RN2483A-I/RM105 (SMD,26.7x17.8mm)?

Manufactured by MICROCHIP, the RN2483A-I/RM105 is housed in a SMD,26.7x17.8mm package with 47 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 2.1V to 3.6V. Key pins include: 1 (GND: Ground Reference Pin (GND)), 2 (UART_RTS: Multiplexed I/O & Peripheral Pin UART_RTS (UART)), 3 (UART_CTS: Multiplexed I/O & Peripheral Pin UART_CTS (UART)), 4 (RESERVED: Multiplexed I/O & Peripheral Pin RESERVED (General)), 5 (RESERVED: Multiplexed I/O & Peripheral Pin RESERVED (General)), 6 (UART_TX: Multiplexed I/O & Peripheral Pin UART_TX (UART)).

What are the IPC-7351B PCB Footprint dimensions for RN2483A-I/RM105?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), RN2483A-I/RM105 (SMD,26.7x17.8mm) has a nominal body envelope of 17.80 × 26.70 mm, pitch e = 1.27 mm, and 47 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for RN2483A-I/RM105?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for RN2483A-I/RM105 (MICROCHIP, SMD,26.7x17.8mm) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (47 pins) & RN2483 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
2UART_RTSDigital_IOSignal terminal UART_RTS (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: UART_RTS. Supported peripheral buses: UART.
3UART_CTSDigital_IOSignal terminal UART_CTS (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: UART_CTS. Supported peripheral buses: UART.
4RESERVEDDigital_IOSignal terminal RESERVED (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: RESERVED. Supported peripheral buses: General.
5RESERVEDDigital_IOSignal terminal RESERVED (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: RESERVED. Supported peripheral buses: General.
6UART_TXDigital_IOSignal terminal UART_TX (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: UART_TX. Supported peripheral buses: UART.
7UART_RXDigital_IOSignal terminal UART_RX (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: UART_RX. Supported peripheral buses: UART.
8GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
9GPIO13Digital_IOSignal terminal GPIO13 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO13. Supported peripheral buses: General.
10GPIO12Digital_IOSignal terminal GPIO12 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO12. Supported peripheral buses: General.
11GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
12VDDPower_InPrimary positive power supply input (VDD) operating in the 2.1V to 3.6V domain (Max rating: 3.6V).
13GPIO11Digital_IOSignal terminal GPIO11 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO11. Supported peripheral buses: General.
14GPIO10Digital_IOSignal terminal GPIO10 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO10. Supported peripheral buses: General.
15NCNCSignal terminal NC (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
16NCNCSignal terminal NC (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
17NCNCSignal terminal NC (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
18NCNCSignal terminal NC (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
19NCNCSignal terminal NC (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
20GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
21GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
22GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
23RFHRF_50OhmSignal terminal RFH (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: RFH. Supported peripheral buses: General.
24GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
25RFLRF_50OhmSignal terminal RFL (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: RFL. Supported peripheral buses: General.
26GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
27GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
28GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
29NCNCSignal terminal NC (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
30PGC_INTDigital_IOSignal terminal PGC_INT (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: PGC_INT. Supported peripheral buses: General.
31PGD_INTDigital_IOSignal terminal PGD_INT (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: PGD_INT. Supported peripheral buses: General.
32RESETDigital_IOActive-low hardware reset terminal (RESET): pulling this pin Low resets the processor core and peripherals.
33GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
34VDDPower_InPrimary positive power supply input (VDD) operating in the 2.1V to 3.6V domain (Max rating: 3.6V).
35GPIO0Digital_IOSignal terminal GPIO0 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO0. Supported peripheral buses: General.
36GPIO1Digital_IOSignal terminal GPIO1 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO1. Supported peripheral buses: General.
37GPIO2Digital_IOSignal terminal GPIO2 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO2. Supported peripheral buses: General.
38GPIO3Digital_IOSignal terminal GPIO3 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO3. Supported peripheral buses: General.
39GPIO4Digital_IOSignal terminal GPIO4 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO4. Supported peripheral buses: General.
40GPIO5Digital_IOSignal terminal GPIO5 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO5. Supported peripheral buses: General.
41GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
42NCNCSignal terminal NC (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
43GPIO6Digital_IOSignal terminal GPIO6 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO6. Supported peripheral buses: General.
44GPIO7Digital_IOSignal terminal GPIO7 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO7. Supported peripheral buses: General.
45GPIO8Digital_IOSignal terminal GPIO8 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO8. Supported peripheral buses: General.
46GPIO9Digital_IOSignal terminal GPIO9 (I/O, 2.1V to 3.6V domain). Multiplexed alternate functions: GPIO9. Supported peripheral buses: General.
47GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
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