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HV2803/AHA (TFBGA-132) — Symbol, Footprint IPC-7351B & 3D STEP Model

HV2803/AHA

MICROCHIPID: C633944TFBGA-132 · 132 Pins · Pitch 0.80mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · HV2803/AHA (TFBGA-132)A1D OUTA2V LLA3SW10AA4SW11AA5SW12AA6SW13AA7SW14AA8SW15AA9SW16AA10SW17AA11SW18AA12SW19AA13SW20AA14SW21AB1CLKB2CLRB3SW10BB4SW11BB5SW12BB6SW13BB7SW14BB8SW15BB9SW16BB10SW17BB11SW18BB12SW19BB13SW20BB14SW21BC1LE/ENC2MODEC13NCC14NCD1D /AB IND2STBYD13VDDD14VDDE1DGNDE2VDDE5GNDE6GNDE7GNDE8GNDE9GNDE10GNDE13VSSE14VSSF1VSSF2VDDF5GNDF6GNDF7GNDF8GNDF9GNDF10GNDF13SW22BF14SW22AG1SW9AG2SW9BG5GNDG6GNDG7GNDG8GNDG9GNDG10GNDG13SW23BG14SW23AP14SW26AP13SW27AP12SW28AP11SW29AP10SW30AP9SW31AP8SW0AP7SW1AP6SW2AP5SW3AP4SW4AP3SW5AP2NCP1NCN14SW26BN13SW27BN12SW28BN11SW29BN10SW30BN9SW31BN8SW0BN7SW1BN6SW2BN5SW3BN4SW4BN3SW5BN2NCN1NCM14VDDM13VDDM2VDDM1VDDL14VSSL13VSSL2VSSL1VSSK14NCK13NCK10GNDK9GNDK8GNDK7GNDK6GNDK5GNDK2SW6BK1SW6AJ14SW25AJ13SW25BJ10GNDJ9GNDJ8GNDJ7GNDJ6GNDJ5GNDJ2SW7BJ1SW7AH14SW24AH13SW24BH10GNDH9GNDH8GNDH7GNDH6GNDH5GNDH2SW8BH1SW8AGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.888.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1L1M1N1P1A2B2C2D2E2F2G2H2J2K2L2M2N2P2A3B3N3P3A4B4N4P4A5B5E5F5G5H5J5K5N5P5A6B6E6F6G6H6J6K6N6P6A7B7E7F7G7H7J7K7N7P7A8B8E8F8G8H8J8K8N8P8A9B9E9F9G9H9J9K9N9P9A10B10E10F10G10H10J10K10N10P10A11B11N11P11A12B12N12P12A13B13C13D13E13F13G13H13J13K13L13M13N13P13A14B14C14D14E14F14G14H14J14K14L14M14N14P14E=12.00mm · Pitch e=0.80mmD=12.00mm-9-7-5-3-11357997531-1-3-5-7-9mm
3. 3D CAD MODEL
Package Body: 12.00mm × 12.00mm · Pitch: 0.80mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (132/132)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1D OUTI/OMultiplexed I/O & Peripheral Pin D OUT (General)
A2V LLI/OMultiplexed I/O & Peripheral Pin V LL (General)
A3SW10AI/OMultiplexed I/O & Peripheral Pin SW10A (General)
A4SW11AI/OMultiplexed I/O & Peripheral Pin SW11A (General)
A5SW12AI/OMultiplexed I/O & Peripheral Pin SW12A (General)
A6SW13AI/OMultiplexed I/O & Peripheral Pin SW13A (General)
A7SW14AI/OMultiplexed I/O & Peripheral Pin SW14A (General)
A8SW15AI/OMultiplexed I/O & Peripheral Pin SW15A (General)
A9SW16AI/OMultiplexed I/O & Peripheral Pin SW16A (General)
A10SW17AI/OMultiplexed I/O & Peripheral Pin SW17A (General)
A11SW18AI/OMultiplexed I/O & Peripheral Pin SW18A (General)
A12SW19AI/OMultiplexed I/O & Peripheral Pin SW19A (General)
A13SW20AI/OMultiplexed I/O & Peripheral Pin SW20A (General)
A14SW21AI/OMultiplexed I/O & Peripheral Pin SW21A (General)
B1CLKI/OMultiplexed I/O & Peripheral Pin CLK (General)
B2CLRI/OMultiplexed I/O & Peripheral Pin CLR (General)
B3SW10BI/OMultiplexed I/O & Peripheral Pin SW10B (General)
B4SW11BI/OMultiplexed I/O & Peripheral Pin SW11B (General)
B5SW12BI/OMultiplexed I/O & Peripheral Pin SW12B (General)
B6SW13BI/OMultiplexed I/O & Peripheral Pin SW13B (General)
B7SW14BI/OMultiplexed I/O & Peripheral Pin SW14B (General)
B8SW15BI/OMultiplexed I/O & Peripheral Pin SW15B (General)
B9SW16BI/OMultiplexed I/O & Peripheral Pin SW16B (General)
B10SW17BI/OMultiplexed I/O & Peripheral Pin SW17B (General)
B11SW18BI/OMultiplexed I/O & Peripheral Pin SW18B (General)
B12SW19BI/OMultiplexed I/O & Peripheral Pin SW19B (General)
B13SW20BI/OMultiplexed I/O & Peripheral Pin SW20B (General)
B14SW21BI/OMultiplexed I/O & Peripheral Pin SW21B (General)
C1LE/ENI/OMultiplexed I/O & Peripheral Pin LE/EN (General)
C2MODEI/OMultiplexed I/O & Peripheral Pin MODE (General)
C13NCI/OMultiplexed I/O & Peripheral Pin NC (General)
C14NCI/OMultiplexed I/O & Peripheral Pin NC (General)
D1D /AB INI/OMultiplexed I/O & Peripheral Pin D /AB IN (General)
D2STBYI/OMultiplexed I/O & Peripheral Pin STBY (General)
D13VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
D14VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
E1DGNDGNDGround Reference Pin (DGND)
E2VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
E5GNDGNDGround Reference Pin (GND)
E6GNDGNDGround Reference Pin (GND)
E7GNDGNDGround Reference Pin (GND)
E8GNDGNDGround Reference Pin (GND)
E9GNDGNDGround Reference Pin (GND)
E10GNDGNDGround Reference Pin (GND)
E13VSSGNDGround Reference Pin (VSS)
E14VSSGNDGround Reference Pin (VSS)
F1VSSGNDGround Reference Pin (VSS)
F2VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
F5GNDGNDGround Reference Pin (GND)
F6GNDGNDGround Reference Pin (GND)
F7GNDGNDGround Reference Pin (GND)
F8GNDGNDGround Reference Pin (GND)
F9GNDGNDGround Reference Pin (GND)
F10GNDGNDGround Reference Pin (GND)
F13SW22BI/OMultiplexed I/O & Peripheral Pin SW22B (General)
F14SW22AI/OMultiplexed I/O & Peripheral Pin SW22A (General)
G1SW9AI/OMultiplexed I/O & Peripheral Pin SW9A (General)
G2SW9BI/OMultiplexed I/O & Peripheral Pin SW9B (General)
G5GNDGNDGround Reference Pin (GND)
G6GNDGNDGround Reference Pin (GND)
G7GNDGNDGround Reference Pin (GND)
G8GNDGNDGround Reference Pin (GND)
G9GNDGNDGround Reference Pin (GND)
G10GNDGNDGround Reference Pin (GND)
G13SW23BI/OMultiplexed I/O & Peripheral Pin SW23B (General)
G14SW23AI/OMultiplexed I/O & Peripheral Pin SW23A (General)
H1SW8AI/OMultiplexed I/O & Peripheral Pin SW8A (General)
H2SW8BI/OMultiplexed I/O & Peripheral Pin SW8B (General)
H5GNDGNDGround Reference Pin (GND)
H6GNDGNDGround Reference Pin (GND)
H7GNDGNDGround Reference Pin (GND)
H8GNDGNDGround Reference Pin (GND)
H9GNDGNDGround Reference Pin (GND)
H10GNDGNDGround Reference Pin (GND)
H13SW24BI/OMultiplexed I/O & Peripheral Pin SW24B (General)
H14SW24AI/OMultiplexed I/O & Peripheral Pin SW24A (General)
J1SW7AI/OMultiplexed I/O & Peripheral Pin SW7A (General)
J2SW7BI/OMultiplexed I/O & Peripheral Pin SW7B (General)
J5GNDGNDGround Reference Pin (GND)
J6GNDGNDGround Reference Pin (GND)
J7GNDGNDGround Reference Pin (GND)
J8GNDGNDGround Reference Pin (GND)
J9GNDGNDGround Reference Pin (GND)
J10GNDGNDGround Reference Pin (GND)
J13SW25BI/OMultiplexed I/O & Peripheral Pin SW25B (General)
J14SW25AI/OMultiplexed I/O & Peripheral Pin SW25A (General)
K1SW6AI/OMultiplexed I/O & Peripheral Pin SW6A (General)
K2SW6BI/OMultiplexed I/O & Peripheral Pin SW6B (General)
K5GNDGNDGround Reference Pin (GND)
K6GNDGNDGround Reference Pin (GND)
K7GNDGNDGround Reference Pin (GND)
K8GNDGNDGround Reference Pin (GND)
K9GNDGNDGround Reference Pin (GND)
K10GNDGNDGround Reference Pin (GND)
K13NCI/OMultiplexed I/O & Peripheral Pin NC (General)
K14NCI/OMultiplexed I/O & Peripheral Pin NC (General)
L1VSSGNDGround Reference Pin (VSS)
L2VSSGNDGround Reference Pin (VSS)
L13VSSGNDGround Reference Pin (VSS)
L14VSSGNDGround Reference Pin (VSS)
M1VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
M2VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
M13VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
M14VDDPowerPower Supply Input (VDD — 3.3V / 5.0V Standard Logic)
N1NCI/OMultiplexed I/O & Peripheral Pin NC (General)
N2NCI/OMultiplexed I/O & Peripheral Pin NC (General)
N3SW5BI/OMultiplexed I/O & Peripheral Pin SW5B (General)
N4SW4BI/OMultiplexed I/O & Peripheral Pin SW4B (General)
N5SW3BI/OMultiplexed I/O & Peripheral Pin SW3B (General)
N6SW2BI/OMultiplexed I/O & Peripheral Pin SW2B (General)
N7SW1BI/OMultiplexed I/O & Peripheral Pin SW1B (General)
N8SW0BI/OMultiplexed I/O & Peripheral Pin SW0B (General)
N9SW31BI/OMultiplexed I/O & Peripheral Pin SW31B (General)
N10SW30BI/OMultiplexed I/O & Peripheral Pin SW30B (General)
N11SW29BI/OMultiplexed I/O & Peripheral Pin SW29B (General)
N12SW28BI/OMultiplexed I/O & Peripheral Pin SW28B (General)
N13SW27BI/OMultiplexed I/O & Peripheral Pin SW27B (General)
N14SW26BI/OMultiplexed I/O & Peripheral Pin SW26B (General)
P1NCI/OMultiplexed I/O & Peripheral Pin NC (General)
P2NCI/OMultiplexed I/O & Peripheral Pin NC (General)
P3SW5AI/OMultiplexed I/O & Peripheral Pin SW5A (General)
P4SW4AI/OMultiplexed I/O & Peripheral Pin SW4A (General)
P5SW3AI/OMultiplexed I/O & Peripheral Pin SW3A (General)
P6SW2AI/OMultiplexed I/O & Peripheral Pin SW2A (General)
P7SW1AI/OMultiplexed I/O & Peripheral Pin SW1A (General)
P8SW0AI/OMultiplexed I/O & Peripheral Pin SW0A (General)
P9SW31AI/OMultiplexed I/O & Peripheral Pin SW31A (General)
P10SW30AI/OMultiplexed I/O & Peripheral Pin SW30A (General)
P11SW29AI/OMultiplexed I/O & Peripheral Pin SW29A (General)
P12SW28AI/OMultiplexed I/O & Peripheral Pin SW28A (General)
P13SW27AI/OMultiplexed I/O & Peripheral Pin SW27A (General)
P14SW26AI/OMultiplexed I/O & Peripheral Pin SW26A (General)
PIN A1 D OUT
I/O
Multiplexed I/O & Peripheral Pin D OUT (General)
Design note: DataOutLogicOutput
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 18 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: HV2803/AHA (MICROCHIP · TFBGA-132)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
HV2803/AHA (TFBGA-132) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
HV2803/AHA (TFBGA-132) - 2. Standard Pinout (Top View)
True package pinout (132 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
HV2803/AHA (TFBGA-132) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
HV2803/AHA (TFBGA-132) - 4. Package Dimensions (D×E×A)
TFBGA-132 · 12.00×12.00mm · Pitch 0.80mmExpand ›
5. Recommended Land PatternLAND PATTERN
HV2803/AHA (TFBGA-132) - 5. Recommended Land Pattern
IPC-7351B Footprint (132 Pads)Expand ›
6. Application SchematicSCHEMATIC
HV2803/AHA (TFBGA-132) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (18 figures · Page 1/2)
Showing 1–12 of 18 uncropped original figures for HV2803 / HV2904
P1 · p01_fig01376×200px
HV2803/AHA (TFBGA-132) — No High-Voltage Bias, Low Harmonic Distortion,
No High-Voltage Bias, Low Harmonic Distortion,
P1 · p01_fig021777×1141px
HV2803/AHA (TFBGA-132) — Applications
Applications
P1 · p01_fig02P1
HV2803/AHA (TFBGA-132) — Datasheet Page 1 (p01_fig02)
Datasheet Page 1 (p01_fig02)
P2 · p02_fig011778×1710px
HV2803/AHA (TFBGA-132) — HV2803/HV2903/HV2904 | Block Diagram | Level Shifters | VDD VSS | Output Switches SW0A | SW0B | SW1A | SW1B | SW2A | SW2B | SW30A | SW30B | SW31A | SW31B | Bleed Resistors | RGND | HV2903 has bleed resistor at SWxA and SWxB HV2904 has bleed
HV2803/HV2903/HV2904 | Block Diagram | Level Shifters | VDD VSS | Output Switches SW0A | SW0B | SW1A | SW1B | SW2A | SW2B | SW30A | SW30B | SW31A | SW31B | Bleed Resistors | RGND | HV2903 has bleed resistor at SWxA and SWxB HV2904 has bleed
P8 · p08_fig011777×1823px
HV2803/AHA (TFBGA-132) — FIGURE 2-1: 132-Ball TFBGA Package - Top View.
FIGURE 2-1: 132-Ball TFBGA Package - Top View.
P16 · p16_fig011777×750px
HV2803/AHA (TFBGA-132) — Tx/Rx Array
Tx/Rx Array
P16 · p16_fig021778×1058px
HV2803/AHA (TFBGA-132) — FIGURE 5-1: Typical Medical Ultrasound Imaging System.
FIGURE 5-1: Typical Medical Ultrasound Imaging System.
P16 · p16_fig03212×144px
HV2803/AHA (TFBGA-132) — FIGURE 5-1: Typical Medical Ultrasound Imaging System.
FIGURE 5-1: Typical Medical Ultrasound Imaging System.
P19 · p19_fig011777×2615px
HV2803/AHA (TFBGA-132) — FIGURE 5-3: Example of Bank Switching for 4-Probe Selection.
FIGURE 5-3: Example of Bank Switching for 4-Probe Selection.
P19 · p19_fig01P19
HV2803/AHA (TFBGA-132) — Datasheet Page 19 (p19_fig01)
Datasheet Page 19 (p19_fig01)
P21 · p21_fig011778×1624px
HV2803/AHA (TFBGA-132) — FIGURE 5-5: Standby Mode Timing Diagram at Individual Switching Mode.
FIGURE 5-5: Standby Mode Timing Diagram at Individual Switching Mode.
P22 · p22_fig011698×1047px
HV2803/AHA (TFBGA-132) — FIGURE 5-6: Layout Guidelines.
FIGURE 5-6: Layout Guidelines.
Page 1 / 2 (18 extracted figures)

Technical Specifications & Part Details (HV2803/AHA)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:HV2803/AHA (TFBGA-132) is a 132-pin standard electronic & interconnect component featuring a 12.00 × 12.00 × 1.20 mm mechanical envelope (lead pitch e = 0.80 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated Standard I/O / Passive interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
66 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
12.00 × 12.00 × 1.20 mm (A1=0.25 mm)
Package family: BGA (TFBGA-132)
Pin Count & Lead PitchN / e
132 Pins | Pitch e = 0.80 mm (31.5 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Standard I/O / Passive
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol132 auto-grouped pins
OK
IPC-7351B Land Pattern132 pads · Pitch 0.80mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — HV2803 / HV2904 (2)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (TFBGA-132)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
12.00 × 12.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.20mm · e=0.80mm
Pad Size (W × L)Level B
0.32 × 0.32 mm
Pins / Total PadsTopology
132P / 132Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
TFBGA-132
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — HV2803/AHA (TFBGA-132)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of HV2803/AHA (TFBGA-132)?

Manufactured by MICROCHIP, the HV2803/AHA is housed in a TFBGA-132 package with 132 pins and a 0.80 mm lead pitch. Key pins include: A1 (D OUT: Multiplexed I/O & Peripheral Pin D OUT (General)), A2 (V LL: Multiplexed I/O & Peripheral Pin V LL (General)), A3 (SW10A: Multiplexed I/O & Peripheral Pin SW10A (General)), A4 (SW11A: Multiplexed I/O & Peripheral Pin SW11A (General)), A5 (SW12A: Multiplexed I/O & Peripheral Pin SW12A (General)), A6 (SW13A: Multiplexed I/O & Peripheral Pin SW13A (General)).

What are the IPC-7351B PCB Footprint dimensions for HV2803/AHA?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), HV2803/AHA (TFBGA-132) has a nominal body envelope of 12.00 × 12.00 mm, pitch e = 0.80 mm, and 132 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for HV2803/AHA?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for HV2803/AHA (MICROCHIP, TFBGA-132) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (132 pins) & HV2803 / HV2904 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1D OUTDigital_IOSignal terminal D OUT (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D OUT. Supported peripheral buses: General.
A2V LLDigital_IOSignal terminal V LL (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: V LL. Supported peripheral buses: General.
A3SW10ADigital_IOSignal terminal SW10A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW10A. Supported peripheral buses: General.
A4SW11ADigital_IOSignal terminal SW11A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW11A. Supported peripheral buses: General.
A5SW12ADigital_IOSignal terminal SW12A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW12A. Supported peripheral buses: General.
A6SW13ADigital_IOSignal terminal SW13A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW13A. Supported peripheral buses: General.
A7SW14ADigital_IOSignal terminal SW14A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW14A. Supported peripheral buses: General.
A8SW15ADigital_IOSignal terminal SW15A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW15A. Supported peripheral buses: General.
A9SW16ADigital_IOSignal terminal SW16A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW16A. Supported peripheral buses: General.
A10SW17ADigital_IOSignal terminal SW17A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW17A. Supported peripheral buses: General.
A11SW18ADigital_IOSignal terminal SW18A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW18A. Supported peripheral buses: General.
A12SW19ADigital_IOSignal terminal SW19A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW19A. Supported peripheral buses: General.
A13SW20ADigital_IOSignal terminal SW20A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW20A. Supported peripheral buses: General.
A14SW21ADigital_IOSignal terminal SW21A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW21A. Supported peripheral buses: General.
B1CLKDigital_IOSignal terminal CLK (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CLK. Supported peripheral buses: General.
B2CLRDigital_IOSignal terminal CLR (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CLR. Supported peripheral buses: General.
B3SW10BDigital_IOSignal terminal SW10B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW10B. Supported peripheral buses: General.
B4SW11BDigital_IOSignal terminal SW11B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW11B. Supported peripheral buses: General.
B5SW12BDigital_IOSignal terminal SW12B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW12B. Supported peripheral buses: General.
B6SW13BDigital_IOSignal terminal SW13B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW13B. Supported peripheral buses: General.
B7SW14BDigital_IOSignal terminal SW14B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW14B. Supported peripheral buses: General.
B8SW15BDigital_IOSignal terminal SW15B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW15B. Supported peripheral buses: General.
B9SW16BDigital_IOSignal terminal SW16B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW16B. Supported peripheral buses: General.
B10SW17BDigital_IOSignal terminal SW17B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW17B. Supported peripheral buses: General.
B11SW18BDigital_IOSignal terminal SW18B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW18B. Supported peripheral buses: General.
B12SW19BDigital_IOSignal terminal SW19B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW19B. Supported peripheral buses: General.
B13SW20BDigital_IOSignal terminal SW20B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW20B. Supported peripheral buses: General.
B14SW21BDigital_IOSignal terminal SW21B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW21B. Supported peripheral buses: General.
C1LE/ENDigital_IOSignal terminal LE/EN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: LE/EN. Supported peripheral buses: General.
C2MODEDigital_IOSignal terminal MODE (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: MODE. Supported peripheral buses: General.
C13NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
C14NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
D1D /AB INDigital_IOSignal terminal D /AB IN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: D /AB IN. Supported peripheral buses: General.
D2STBYDigital_IOSignal terminal STBY (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: STBY. Supported peripheral buses: General.
D13VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
D14VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
E1DGNDGND0V electrical ground return terminal (DGND) for internal core logic, I/O drivers, and analog sub-blocks.
E2VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
E5GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
E6GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
E7GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
E8GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
E9GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
E10GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
E13VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E14VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F1VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F2VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
F5GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
F6GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
F7GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
F8GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
F9GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
F10GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
F13SW22BDigital_IOSignal terminal SW22B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW22B. Supported peripheral buses: General.
F14SW22ADigital_IOSignal terminal SW22A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW22A. Supported peripheral buses: General.
G1SW9ADigital_IOSignal terminal SW9A (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW9A. Supported peripheral buses: General.
G2SW9BDigital_IOSignal terminal SW9B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SW9B. Supported peripheral buses: General.
G5GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
G6GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
G7GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
G8GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
G9GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
G10GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
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