Mechanical Dimensions & Land Pattern (WFBGA-128)
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.35mm · e=0.50mm
Pad Size (W × L)Level B
0.22 × 0.22 mm
Pins / Total PadsTopology
128P / 128Pad (BGA_GRID)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit WFBGA-128 | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — MEC1428-TF-C1 (WFBGA-128)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of MEC1428-TF-C1 (WFBGA-128)?
Manufactured by MICROCHIP, the MEC1428-TF-C1 is housed in a WFBGA-128 package with 128 pins and a 0.50 mm lead pitch. Key pins include: A1 (GPIO067/CLKRUN#: Multiplexed I/O & Peripheral Pin GPIO067/CLKRUN# (General)), A2 (GPIO041/LAD1/ESPI_IO1: Multiplexed I/O & Peripheral Pin GPIO041/LAD1/ESPI_IO1 (General)), A3 (GPIO040/LAD0/ESPI_IO0: Multiplexed I/O & Peripheral Pin GPIO040/LAD0/ESPI_IO0 (General)), A4 (IOA4: General Purpose Digital I/O Pin IOA4), A5 (GPIO064/LRESET#: System Enable & Hardware Reset (GPIO064/LRESET#)), A6 (IOA6: General Purpose Digital I/O Pin IOA6).
What are the IPC-7351B PCB Footprint dimensions for MEC1428-TF-C1?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MEC1428-TF-C1 (WFBGA-128) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 128 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MEC1428-TF-C1?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MEC1428-TF-C1 (MICROCHIP, WFBGA-128) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (128 pins) & MEC1428 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | GPIO067/CLKRUN# | Digital_IO | Signal terminal GPIO067/CLKRUN# (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO067/CLKRUN#. Supported peripheral buses: General. |
| A2 | GPIO041/LAD1/ESPI_IO1 | Digital_IO | Signal terminal GPIO041/LAD1/ESPI_IO1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO041/LAD1/ESPI_IO1. Supported peripheral buses: General. |
| A3 | GPIO040/LAD0/ESPI_IO0 | Digital_IO | Signal terminal GPIO040/LAD0/ESPI_IO0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO040/LAD0/ESPI_IO0. Supported peripheral buses: General. |
| A4 | IOA4 | Digital_IO | General Purpose Digital I/O Pin IOA4 |
| A5 | GPIO064/LRESET# | Digital_IO | Active-low hardware reset terminal (GPIO064/LRESET#): pulling this pin Low resets the processor core and peripherals. |
| A6 | IOA6 | Digital_IO | General Purpose Digital I/O Pin IOA6 |
| A7 | GPIO060/KBRST | Digital_IO | Signal terminal GPIO060/KBRST (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO060/KBRST. Supported peripheral buses: General. |
| A8 | GPIO055/PWM2/KSO08 | Digital_IO | Signal terminal GPIO055/PWM2/KSO08 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO055/PWM2/KSO08. Supported peripheral buses: PWM. |
| A9 | GPIO053/PWM0/SPI_IO0 | Digital_IO | Signal terminal GPIO053/PWM0/SPI_IO0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO053/PWM0/SPI_IO0. Supported peripheral buses: SPI, PWM. |
| A10 | GPIO052/SPI_IO2 | Digital_IO | Signal terminal GPIO052/SPI_IO2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO052/SPI_IO2. Supported peripheral buses: SPI. |
| A11 | GPIO050/TACH0 | Digital_IO | Signal terminal GPIO050/TACH0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO050/TACH0. Supported peripheral buses: General. |
| A12 | IOA12 | Digital_IO | General Purpose Digital I/O Pin IOA12 |
| A13 | GPIO030/PWM4 | Digital_IO | Signal terminal GPIO030/PWM4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO030/PWM4. Supported peripheral buses: PWM. |
| B1 | GPIO100/nEC_SCI | Digital_IO | Signal terminal GPIO100/nEC_SCI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO100/nEC_SCI. Supported peripheral buses: General. |
| B2 | GPIO043/LAD3/ESPI_IO3 | Digital_IO | Signal terminal GPIO043/LAD3/ESPI_IO3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO043/LAD3/ESPI_IO3. Supported peripheral buses: General. |
| B3 | GPIO042/LAD2/ESPI_IO2 | Digital_IO | Signal terminal GPIO042/LAD2/ESPI_IO2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO042/LAD2/ESPI_IO2. Supported peripheral buses: General. |
| B4 | IOB4 | Digital_IO | General Purpose Digital I/O Pin IOB4 |
| B5 | IOB5 | Digital_IO | General Purpose Digital I/O Pin IOB5 |
| B6 | GPIO026/PS2_CLK1B | Digital_IO | Signal terminal GPIO026/PS2_CLK1B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO026/PS2_CLK1B. Supported peripheral buses: General. |
| B7 | GPIO057/VCC_PWRGD | Power_In | Primary positive power supply input (GPIO057/VCC_PWRGD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| B8 | GPIO056/PWM3 | Digital_IO | Signal terminal GPIO056/PWM3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO056/PWM3. Supported peripheral buses: PWM. |
| B9 | GPIO054/PWM1/SPI_IO1 | Digital_IO | Signal terminal GPIO054/PWM1/SPI_IO1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO054/PWM1/SPI_IO1. Supported peripheral buses: SPI, PWM. |
| B10 | IOB10 | Digital_IO | General Purpose Digital I/O Pin IOB10 |
| B11 | GPIO032/SPI_CLK/PWM6 | Digital_IO | Signal terminal GPIO032/SPI_CLK/PWM6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO032/SPI_CLK/PWM6. Supported peripheral buses: SPI, PWM. |
| B12 | GPIO133/SHD_IO0 | Digital_IO | Signal terminal GPIO133/SHD_IO0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO133/SHD_IO0. Supported peripheral buses: General. |
| B13 | GPIO062/SPI_IO3 | Digital_IO | Signal terminal GPIO062/SPI_IO3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO062/SPI_IO3. Supported peripheral buses: SPI. |
| C1 | GPIO103/VCC_PWRGD | Power_In | Primary positive power supply input (GPIO103/VCC_PWRGD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| C2 | GPIO101/KSO04 | Digital_IO | Signal terminal GPIO101/KSO04 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO101/KSO04. Supported peripheral buses: General. |
| C12 | GPIO126/SHD_SCLK | Digital_IO | Signal terminal GPIO126/SHD_SCLK (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO126/SHD_SCLK. Supported peripheral buses: SPI, I2C. |
| C13 | GPIO136/SHD_IO3 | Digital_IO | Signal terminal GPIO136/SHD_IO3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO136/SHD_IO3. Supported peripheral buses: General. |
| D1 | IOD1 | Digital_IO | General Purpose Digital I/O Pin IOD1 |
| D2 | GPIO107/nRESET_OUT | Digital_IO | Active-low hardware reset terminal (GPIO107/nRESET_OUT): pulling this pin Low resets the processor core and peripherals. |
| D4 | GPIO105/PS2_CLK1B/PWM0 | Digital_IO | Signal terminal GPIO105/PS2_CLK1B/PWM0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO105/PS2_CLK1B/PWM0. Supported peripheral buses: PWM. |
| D5 | GPIO104/LED2 | Digital_IO | Signal terminal GPIO104/LED2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO104/LED2. Supported peripheral buses: General. |
| D6 | IOD6 | Digital_IO | General Purpose Digital I/O Pin IOD6 |
| D7 | GPIO025/KSO07 | Digital_IO | Signal terminal GPIO025/KSO07 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO025/KSO07. Supported peripheral buses: General. |
| D8 | GPIO051/TACH1 | Digital_IO | Signal terminal GPIO051/TACH1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO051/TACH1. Supported peripheral buses: General. |
| D9 | GPIO167 | Digital_IO | Signal terminal GPIO167 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO167. Supported peripheral buses: General. |
| D10 | GPIO031/SPI_CS#/PWM5 | Digital_IO | Signal terminal GPIO031/SPI_CS#/PWM5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO031/SPI_CS#/PWM5. Supported peripheral buses: SPI, PWM. |
| D12 | IOD12 | Digital_IO | General Purpose Digital I/O Pin IOD12 |
| D13 | GPIO134/SHD_IO1 | Digital_IO | Signal terminal GPIO134/SHD_IO1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO134/SHD_IO1. Supported peripheral buses: General. |
| E1 | IOE1 | Digital_IO | General Purpose Digital I/O Pin IOE1 |
| E2 | GPIO115/PS2_DAT0 | Digital_IO | Signal terminal GPIO115/PS2_DAT0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO115/PS2_DAT0. Supported peripheral buses: General. |
| E4 | GPIO111/KSO12/TACH3 | Digital_IO | Signal terminal GPIO111/KSO12/TACH3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO111/KSO12/TACH3. Supported peripheral buses: General. |
| E5 | VTR_LPC_ESPI | Digital_IO | Signal terminal VTR_LPC_ESPI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VTR_LPC_ESPI. Supported peripheral buses: General. |
| E6 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| E7 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| E8 | GPIO047/SHD_CS1#/KSO06 | Digital_IO | Signal terminal GPIO047/SHD_CS1#/KSO06 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO047/SHD_CS1#/KSO06. Supported peripheral buses: General. |
| E9 | VTR_33_18 | Digital_IO | Signal terminal VTR_33_18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VTR_33_18. Supported peripheral buses: General. |
| E10 | GPIO161/KSO07/PVT_IO2 | Digital_IO | Signal terminal GPIO161/KSO07/PVT_IO2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO161/KSO07/PVT_IO2. Supported peripheral buses: General. |
| E12 | IOE12 | Digital_IO | General Purpose Digital I/O Pin IOE12 |
| E13 | IOE13 | Digital_IO | General Purpose Digital I/O Pin IOE13 |
| F1 | IOF1 | Digital_IO | General Purpose Digital I/O Pin IOF1 |
| F2 | GPIO114/PS2_CLK0 | Digital_IO | Signal terminal GPIO114/PS2_CLK0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO114/PS2_CLK0. Supported peripheral buses: General. |
| F4 | GPIO110/KSO11/TACH2 | Digital_IO | Signal terminal GPIO110/KSO11/TACH2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO110/KSO11/TACH2. Supported peripheral buses: General. |
| F5 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| F9 | VTR | Digital_IO | Signal terminal VTR (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VTR. Supported peripheral buses: General. |
| F10 | IOF10 | Digital_IO | General Purpose Digital I/O Pin IOF10 |
| F12 | GPIO020/CMP_VIN0 | Power_In | Primary positive power supply input (GPIO020/CMP_VIN0) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V). |
| F13 | GPIO165/CMP_VREF0 | Analog | Signal terminal GPIO165/CMP_VREF0 (Analog, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: GPIO165/CMP_VREF0. Supported peripheral buses: General. |
| G1 | IOG1 | Digital_IO | General Purpose Digital I/O Pin IOG1 |
| G2 | IOG2 | Digital_IO | General Purpose Digital I/O Pin IOG2 |
| G4 | IOG4 | Digital_IO | General Purpose Digital I/O Pin IOG4 |
| G5 | VTR | Digital_IO | Signal terminal VTR (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VTR. Supported peripheral buses: General. |