PIC16F727T-I/ML (QFN-44-EP(8x8)) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of PIC16F727T-I/ML (QFN-44-EP(8x8))?

Manufactured by MICROCHIP, the PIC16F727T-I/ML is housed in a QFN-44-EP(8x8) package with 45 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 1.8V-5.5V. Key pins include: 1 (DT/RX/RC7: Multiplexed I/O & Peripheral Pin DT/RX/RC7 (General)), 2 (CPS12/RD4: Multiplexed I/O & Peripheral Pin CPS12/RD4 (General)), 3 (CPS13/RD5: Multiplexed I/O & Peripheral Pin CPS13/RD5 (General)), 4 (CPS14/RD6: Multiplexed I/O & Peripheral Pin CPS14/RD6 (General)), 5 (CPS15/RD7: Multiplexed I/O & Peripheral Pin CPS15/RD7 (General)), 6 (VSS: Ground Reference Pin (VSS)).

Q: What are the IPC-7351B PCB Footprint dimensions for PIC16F727T-I/ML?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC16F727T-I/ML (QFN-44-EP(8x8)) has a nominal body envelope of 8.00 × 8.00 mm, pitch e = 0.65 mm, and 45 copper pads plus a central exposed thermal pad (EPAD) of 6.55 × 6.55 mm with a 60% IPC-7525 windowed solder paste grid.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC16F727T-I/ML?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC16F727T-I/ML (MICROCHIP, QFN-44-EP(8x8)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 8.00mm × 8.00mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (45/45)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	DT/RX/RC7	I/O	Multiplexed I/O & Peripheral Pin DT/RX/RC7 (General)
2	CPS12/RD4	I/O	Multiplexed I/O & Peripheral Pin CPS12/RD4 (General)
3	CPS13/RD5	I/O	Multiplexed I/O & Peripheral Pin CPS13/RD5 (General)
4	CPS14/RD6	I/O	Multiplexed I/O & Peripheral Pin CPS14/RD6 (General)
5	CPS15/RD7	I/O	Multiplexed I/O & Peripheral Pin CPS15/RD7 (General)
6	VSS	GND	Ground Reference Pin (VSS)
7	VDD	Power	Power Supply Input (VDD — 1.8V-5.5V)
8	VDD	Power	Power Supply Input (VDD — 1.8V-5.5V)
9	INT/CPS0/AN12/RB0	I/O	Multiplexed I/O & Peripheral Pin INT/CPS0/AN12/RB0 (General)
10	CPS1/AN10/RB1	I/O	Multiplexed I/O & Peripheral Pin CPS1/AN10/RB1 (General)
11	CPS2/AN8/RB2	I/O	Multiplexed I/O & Peripheral Pin CPS2/AN8/RB2 (General)
12	CCP2/CPS3/AN9/RB3	I/O	Multiplexed I/O & Peripheral Pin CCP2/CPS3/AN9/RB3 (General)
13	NC	I/O	Multiplexed I/O & Peripheral Pin NC (General)
14	CPS4/AN11/RB4	I/O	Multiplexed I/O & Peripheral Pin CPS4/AN11/RB4 (General)
15	T1G/CPS5/AN13/RB5	I/O	Multiplexed I/O & Peripheral Pin T1G/CPS5/AN13/RB5 (General)
16	ICSPCLK/RB6	I/O	Multiplexed I/O & Peripheral Pin ICSPCLK/RB6 (General)
17	ICSPDAT/RB7	I/O	Multiplexed I/O & Peripheral Pin ICSPDAT/RB7 (General)
18	VPP/MCLR#/RE3	I/O	Multiplexed I/O & Peripheral Pin VPP/MCLR#/RE3 (General)
19	VCAP/SS/AN0/RA0	I/O	Multiplexed I/O & Peripheral Pin VCAP/SS/AN0/RA0 (General)
20	AN1/RA1	I/O	Multiplexed I/O & Peripheral Pin AN1/RA1 (General)
21	AN2/RA2	I/O	Multiplexed I/O & Peripheral Pin AN2/RA2 (General)
22	VREF/AN3/RA3	Analog	Multiplexed I/O & Peripheral Pin VREF/AN3/RA3 (General)
23	RA4/CPS6/T0CKI	I/O	Multiplexed I/O & Peripheral Pin RA4/CPS6/T0CKI (General)
24	RA5/AN4/CPS7/SS/VCAP	I/O	Multiplexed I/O & Peripheral Pin RA5/AN4/CPS7/SS/VCAP (General)
25	RE0/AN5	I/O	Multiplexed I/O & Peripheral Pin RE0/AN5 (General)
26	RE1/AN6	I/O	Multiplexed I/O & Peripheral Pin RE1/AN6 (General)
27	RE2/AN7	I/O	Multiplexed I/O & Peripheral Pin RE2/AN7 (General)
28	VDD	Power	Power Supply Input (VDD — 1.8V-5.5V)
29	NC	I/O	Multiplexed I/O & Peripheral Pin NC (General)
30	VSS	GND	Ground Reference Pin (VSS)
31	VSS	GND	Ground Reference Pin (VSS)
32	RA7/OSC1/CLKIN	I/O	Multiplexed I/O & Peripheral Pin RA7/OSC1/CLKIN (RTC/CLK)
33	RA6/OSC2/CLKOUT/VCAP	I/O	Multiplexed I/O & Peripheral Pin RA6/OSC2/CLKOUT/VCAP (RTC/CLK)
34	RC0/T1OSO/T1CKI	I/O	Multiplexed I/O & Peripheral Pin RC0/T1OSO/T1CKI (General)
35	RC1/T1OSI/CCP2	I/O	Multiplexed I/O & Peripheral Pin RC1/T1OSI/CCP2 (General)
36	RC2/CCP1	I/O	Multiplexed I/O & Peripheral Pin RC2/CCP1 (General)
37	RC3/SCK/SCL	I/O	Multiplexed I/O & Peripheral Pin RC3/SCK/SCL (SPI, I2C)
38	RD0/CPS8	I/O	Multiplexed I/O & Peripheral Pin RD0/CPS8 (General)
39	RD1/CPS9	I/O	Multiplexed I/O & Peripheral Pin RD1/CPS9 (General)
40	RD2/CPS10	I/O	Multiplexed I/O & Peripheral Pin RD2/CPS10 (General)
41	RD3/CPS11	I/O	Multiplexed I/O & Peripheral Pin RD3/CPS11 (General)
42	RC4/SDI/SDA	I/O	Multiplexed I/O & Peripheral Pin RC4/SDI/SDA (I2C)
43	RC5/SDO	I/O	Multiplexed I/O & Peripheral Pin RC5/SDO (General)
44	RC6/TX/CK	I/O	Multiplexed I/O & Peripheral Pin RC6/TX/CK (General)
45	EP	GND	Exposed Thermal & Ground Pad (EP)

PIN 1 DT/RX/RC7

I/O

Multiplexed I/O & Peripheral Pin DT/RX/RC7 (General)

Design note: Signal terminal DT/RX/RC7 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: DT/RX/RC7. Supported peripheral buses: General.

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 12 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

PIC16F727T-I/ML (QFN-44-EP(8x8)) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

PIC16F727T-I/ML (QFN-44-EP(8x8)) - 2. Standard Pinout (Top View)

True package pinout (45 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

PIC16F727T-I/ML (QFN-44-EP(8x8)) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

PIC16F727T-I/ML (QFN-44-EP(8x8)) - 4. Package Dimensions (D×E×A)

QFN-44-EP(8x8) · 8.00×8.00mm · Pitch 0.65mmExpand ›

5. Recommended Land PatternLAND PATTERN

PIC16F727T-I/ML (QFN-44-EP(8x8)) - 5. Recommended Land Pattern

IPC-7351B Footprint (45 Pads)Expand ›

6. Application SchematicSCHEMATIC

PIC16F727T-I/ML (QFN-44-EP(8x8)) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (12 figures · Page 1/1)

Showing 1–12 of 12 uncropped original figures for PIC16F727T / PIC16F723

P1 · p01_fig01377×200px

28/40/44-Pin Flash Microcontrollers with XLP Technology

P122 · p122_fig011777×2074px

FIGURE 14-1: CAPACITIVE SENSING BLOCK DIAGRAM

P130 · p130_fig011617×587px

FIGURE 15-1: CAPTURE MODE OPERATION BLOCK DIAGRAM

P132 · p132_fig011763×946px

FIGURE 15-2: COMPARE MODE OPERATION BLOCK DIAGRAM

P132 · p132_fig021628×333px

PIC16F727T-I/ML (QFN-44-EP(8x8)) — Either RC1 or RB3 can be selected as the CCP2 pin. Refer to Section 6.1 “Alternate Pin Function” for more information. | 15.2.2 TIMER1 MODE SELECTION | In Compare mode, Timer1 must be running in either Timer mode or Synchronized Counter mod

Either RC1 or RB3 can be selected as the CCP2 pin. Refer to Section 6.1 “Alternate Pin Function” for more information. | 15.2.2 TIMER1 MODE SELECTION | In Compare mode, Timer1 must be running in either Timer mode or Synchronized Counter mod

P134 · p134_fig01867×478px

FIGURE 15-4: CCP PWM OUTPUT

P134 · p134_fig02867×1037px

FIGURE 15-3: SIMPLIFIED PWM BLOCK DIAGRAM Duty Cycle Registers

P134 · p134_fig01P134

Datasheet Page 134 (p134_fig01)

P186 · p186_fig011416×1013px

FIGURE 20-1: TYPICAL CONNECTION FOR ICSP™ PROGRAMMING

P186 · p186_fig01P186

Datasheet Page 186 (p186_fig01)

P263 · p263_fig011586×1912px

25.1 Package Marking Information

P271 · p271_fig01All Packages in PDF

PIC16F727T-I/ML (QFN-44-EP(8x8)) — PIC16(L)F722/3/4/6/7 - 28-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] - http://www.microchip.com/packaging |  2007-2015 Microchip Technology Inc. DS40001341F-page 271 | >D3dêÜè nóÜ§•îé qûÜóó m¶•óîüê .qm/ uîèê2 C4A6 ûû T†è

PIC16(L)F722/3/4/6/7 - 28-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] - http://www.microchip.com/packaging |  2007-2015 Microchip Technology Inc. DS40001341F-page 271 | >D3dêÜè nóÜ§•îé qûÜóó m¶•óîüê .qm/ uîèê2 C4A6 ûû T†è

Technical Specifications & Part Details (PIC16F727T-I/ML)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:PIC16F727T-I/ML (QFN-44-EP(8x8)) is a 44-pin standard electronic & interconnect component featuring a 8.00 × 8.00 × 0.90 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 1.8V-5.5V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated SPI, I2C, ADC, PWM, RTC/CLK interfaces.

Operating Supply VoltageV_CC / V_DD

1.8V-5.5V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C ~ +85°C (Industrial Grade)

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

20 MHz

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

8.00 × 8.00 × 0.90 mm (A1=0.03 mm)

Package family: QFN (QFN-44-EP(8x8))

Pin Count & Lead PitchN / e

44 Pins | Pitch e = 0.65 mm (25.6 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

SPI, I2C, ADC, PWM, RTC/CLK

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol45 auto-grouped pins

IPC-7351B Land Pattern45 pads · Pitch 0.65mm

IPC-7525 60% Solder PasteEPAD 6.55×6.55mm windowed grid

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

IPC-7351B

Family Variants & Same Datasheet Chips — PIC16F727T / PIC16F723 (2)

Select package variant or sibling MPN sharing this datasheet

SPDIP-28 · 28P

PIC16F723-I/SP

MICROCHIP·SPDIP-28

IPC-7351B

28P35.0×6.3×4.20mmP=2.54mm

PIC16F727T / PIC16F723 (SPDIP-28)

QFN-44-EP(8x8) · 45P

PIC16F727T-I/ML

MICROCHIP·QFN-44-EP(8x8)

IPC-7351B

45P8.0×8.0×0.90mmP=0.65mm

PIC16F727T / PIC16F723 (QFN-44-EP(8x8))

Mechanical Dimensions & Land Pattern (QFN-44-EP(8x8))

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

8.00 × 8.00 mm

Height (A) & Pitch (e)IPC-7351B

A=0.90mm · e=0.65mm

Pad Size (W × L)Level B

0.28 × 0.80 mm

Pins / Total PadsTopology

45P / 45Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit QFN-44-EP(8x8)	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — PIC16F727T-I/ML (QFN-44-EP(8x8))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of PIC16F727T-I/ML (QFN-44-EP(8x8))?

Manufactured by MICROCHIP, the PIC16F727T-I/ML is housed in a QFN-44-EP(8x8) package with 45 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 1.8V-5.5V. Key pins include: 1 (DT/RX/RC7: Multiplexed I/O & Peripheral Pin DT/RX/RC7 (General)), 2 (CPS12/RD4: Multiplexed I/O & Peripheral Pin CPS12/RD4 (General)), 3 (CPS13/RD5: Multiplexed I/O & Peripheral Pin CPS13/RD5 (General)), 4 (CPS14/RD6: Multiplexed I/O & Peripheral Pin CPS14/RD6 (General)), 5 (CPS15/RD7: Multiplexed I/O & Peripheral Pin CPS15/RD7 (General)), 6 (VSS: Ground Reference Pin (VSS)).

What are the IPC-7351B PCB Footprint dimensions for PIC16F727T-I/ML?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), PIC16F727T-I/ML (QFN-44-EP(8x8)) has a nominal body envelope of 8.00 × 8.00 mm, pitch e = 0.65 mm, and 45 copper pads plus a central exposed thermal pad (EPAD) of 6.55 × 6.55 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for PIC16F727T-I/ML?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for PIC16F727T-I/ML (MICROCHIP, QFN-44-EP(8x8)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (45 pins) & PIC16F727T / PIC16F723 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	DT/RX/RC7	Digital_IO	Signal terminal DT/RX/RC7 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: DT/RX/RC7. Supported peripheral buses: General.
2	CPS12/RD4	Digital_IO	Signal terminal CPS12/RD4 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: CPS12/RD4. Supported peripheral buses: General.
3	CPS13/RD5	Digital_IO	Signal terminal CPS13/RD5 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: CPS13/RD5. Supported peripheral buses: General.
4	CPS14/RD6	Digital_IO	Signal terminal CPS14/RD6 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: CPS14/RD6. Supported peripheral buses: General.
5	CPS15/RD7	Digital_IO	Signal terminal CPS15/RD7 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: CPS15/RD7. Supported peripheral buses: General.
6	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
7	VDD	Power_In	Primary positive power supply input (VDD) operating in the 1.8V-5.5V domain (Max rating: 5.5V).
8	VDD	Power_In	Primary positive power supply input (VDD) operating in the 1.8V-5.5V domain (Max rating: 5.5V).
9	INT/CPS0/AN12/RB0	Digital_IO	Signal terminal INT/CPS0/AN12/RB0 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: INT/CPS0/AN12/RB0. Supported peripheral buses: General.
10	CPS1/AN10/RB1	Digital_IO	Signal terminal CPS1/AN10/RB1 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: CPS1/AN10/RB1. Supported peripheral buses: General.
11	CPS2/AN8/RB2	Digital_IO	Signal terminal CPS2/AN8/RB2 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: CPS2/AN8/RB2. Supported peripheral buses: General.
12	CCP2/CPS3/AN9/RB3	Digital_IO	Signal terminal CCP2/CPS3/AN9/RB3 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: CCP2/CPS3/AN9/RB3. Supported peripheral buses: General.
13	NC	NC	Signal terminal NC (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
14	CPS4/AN11/RB4	Digital_IO	Signal terminal CPS4/AN11/RB4 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: CPS4/AN11/RB4. Supported peripheral buses: General.
15	T1G/CPS5/AN13/RB5	Digital_IO	Signal terminal T1G/CPS5/AN13/RB5 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: T1G/CPS5/AN13/RB5. Supported peripheral buses: General.
16	ICSPCLK/RB6	Digital_IO	Signal terminal ICSPCLK/RB6 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: ICSPCLK/RB6. Supported peripheral buses: General.
17	ICSPDAT/RB7	Digital_IO	Signal terminal ICSPDAT/RB7 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: ICSPDAT/RB7. Supported peripheral buses: General.
18	VPP/MCLR#/RE3	Digital_IO	Signal terminal VPP/MCLR#/RE3 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: VPP/MCLR#/RE3. Supported peripheral buses: General.
19	VCAP/SS/AN0/RA0	Digital_IO	Signal terminal VCAP/SS/AN0/RA0 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: VCAP/SS/AN0/RA0. Supported peripheral buses: General.
20	AN1/RA1	Digital_IO	Signal terminal AN1/RA1 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: AN1/RA1. Supported peripheral buses: General.
21	AN2/RA2	Digital_IO	Signal terminal AN2/RA2 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: AN2/RA2. Supported peripheral buses: General.
22	VREF/AN3/RA3	Analog	Signal terminal VREF/AN3/RA3 (Analog, 1.8V-5.5V domain). Multiplexed alternate functions: VREF/AN3/RA3. Supported peripheral buses: General.
23	RA4/CPS6/T0CKI	Digital_IO	Signal terminal RA4/CPS6/T0CKI (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RA4/CPS6/T0CKI. Supported peripheral buses: General.
24	RA5/AN4/CPS7/SS/VCAP	Digital_IO	Signal terminal RA5/AN4/CPS7/SS/VCAP (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RA5/AN4/CPS7/SS/VCAP. Supported peripheral buses: General.
25	RE0/AN5	Digital_IO	Signal terminal RE0/AN5 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RE0/AN5. Supported peripheral buses: General.
26	RE1/AN6	Digital_IO	Signal terminal RE1/AN6 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RE1/AN6. Supported peripheral buses: General.
27	RE2/AN7	Digital_IO	Signal terminal RE2/AN7 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RE2/AN7. Supported peripheral buses: General.
28	VDD	Power_In	Primary positive power supply input (VDD) operating in the 1.8V-5.5V domain (Max rating: 5.5V).
29	NC	NC	Signal terminal NC (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
30	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
31	VSS	GND	0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
32	RA7/OSC1/CLKIN	Digital_IO	Signal terminal RA7/OSC1/CLKIN (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RA7/OSC1/CLKIN. Supported peripheral buses: RTC/CLK.
33	RA6/OSC2/CLKOUT/VCAP	Digital_IO	Signal terminal RA6/OSC2/CLKOUT/VCAP (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RA6/OSC2/CLKOUT/VCAP. Supported peripheral buses: RTC/CLK.
34	RC0/T1OSO/T1CKI	Digital_IO	Signal terminal RC0/T1OSO/T1CKI (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RC0/T1OSO/T1CKI. Supported peripheral buses: General.
35	RC1/T1OSI/CCP2	Digital_IO	Signal terminal RC1/T1OSI/CCP2 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RC1/T1OSI/CCP2. Supported peripheral buses: General.
36	RC2/CCP1	Digital_IO	Signal terminal RC2/CCP1 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RC2/CCP1. Supported peripheral buses: General.
37	RC3/SCK/SCL	Digital_IO	Signal terminal RC3/SCK/SCL (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RC3/SCK/SCL. Supported peripheral buses: SPI, I2C.
38	RD0/CPS8	Digital_IO	Signal terminal RD0/CPS8 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RD0/CPS8. Supported peripheral buses: General.
39	RD1/CPS9	Digital_IO	Signal terminal RD1/CPS9 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RD1/CPS9. Supported peripheral buses: General.
40	RD2/CPS10	Digital_IO	Signal terminal RD2/CPS10 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RD2/CPS10. Supported peripheral buses: General.
41	RD3/CPS11	Digital_IO	Signal terminal RD3/CPS11 (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RD3/CPS11. Supported peripheral buses: General.
42	RC4/SDI/SDA	Digital_IO	Signal terminal RC4/SDI/SDA (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RC4/SDI/SDA. Supported peripheral buses: I2C.
43	RC5/SDO	Digital_IO	Signal terminal RC5/SDO (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RC5/SDO. Supported peripheral buses: General.
44	RC6/TX/CK	Digital_IO	Signal terminal RC6/TX/CK (I/O, 1.8V-5.5V domain). Multiplexed alternate functions: RC6/TX/CK. Supported peripheral buses: General.
45	EP	GND	Bottom exposed die attach pad (EP) providing primary thermal conduction path to the PCB and low-inductance 0V ground return.

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