MIC5013YM-TR (SOIC-8) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of MIC5013YM-TR (SOIC-8)?

Manufactured by MICROCHIP, the MIC5013YM-TR is housed in a SOIC-8 package with 8 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 7 –0.5V. Key pins include: 1 (Input: Multiplexed I/O & Peripheral Pin Input (General)), 2 (Threshold: Multiplexed I/O & Peripheral Pin Threshold (General)), 3 (Sense: Multiplexed I/O & Peripheral Pin Sense (General)), 4 (Source: Multiplexed I/O & Peripheral Pin Source (CAN)), 5 (Ground: Multiplexed I/O & Peripheral Pin Ground (General)), 6 (Gate: Multiplexed I/O & Peripheral Pin Gate (General)).

Q: What are the IPC-7351B PCB Footprint dimensions for MIC5013YM-TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MIC5013YM-TR (SOIC-8) has a nominal body envelope of 3.90 × 4.90 mm, pitch e = 1.27 mm, and 8 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MIC5013YM-TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MIC5013YM-TR (MICROCHIP, SOIC-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 3.90mm × 4.90mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (8/8)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	Input	I/O	Multiplexed I/O & Peripheral Pin Input (General)
2	Threshold	Analog	Multiplexed I/O & Peripheral Pin Threshold (General)
3	Sense	I/O	Multiplexed I/O & Peripheral Pin Sense (General)
4	Source	I/O	Multiplexed I/O & Peripheral Pin Source (CAN)
5	Ground	I/O	Multiplexed I/O & Peripheral Pin Ground (General)
6	Gate	I/O	Multiplexed I/O & Peripheral Pin Gate (General)
7	V+	I/O	Multiplexed I/O & Peripheral Pin V+ (General)
8	Fault	I/O	Multiplexed I/O & Peripheral Pin Fault (General)

PIN 1 Input

I/O

Multiplexed I/O & Peripheral Pin Input (General)

Design note: ResetscurrentsenselatchandturnsonpowerMOSFETwhentakenabove threshold(35Vtypical) Pin1requires<1µAtoswitch . . .

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 9 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

MIC5013YM-TR (SOIC-8) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

MIC5013YM-TR (SOIC-8) - 2. Standard Pinout (Top View)

True package pinout (8 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

MIC5013YM-TR (SOIC-8) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

MIC5013YM-TR (SOIC-8) - 4. Package Dimensions (D×E×A)

SOIC-8 · 3.90×4.90mm · Pitch 1.27mmExpand ›

5. Recommended Land PatternLAND PATTERN

MIC5013YM-TR (SOIC-8) - 5. Recommended Land Pattern

IPC-7351B Footprint (8 Pads)Expand ›

6. Application SchematicSCHEMATIC

MIC5013YM-TR (SOIC-8) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (9 figures · Page 1/1)

Showing 1–9 of 9 uncropped original figures for MIC5013

P1 · p01_fig01870×249px

MIC5013 Micrel, Inc.

P1 · p01_fig021647×955px

Figure 1. High-Side Driver with Current-Sensing MOSFET

P1 · p01_fig02P1

Datasheet Page 1 (p01_fig02)

P2 · p02_fig01337×347px

Fault | V+ | Gate | 1 | 2 | 3 | 4 | 8 MIC5013 | Gnd | 7 | 6 | 5 | Thresh | Sense | Source | Input

P9 · p09_fig012034×1014px

Figure 5. Time-Variable Trip Threshold

P10 · p10_fig012025×1415px

Figure 8. Improved Opto-Isolator Performance

P10 · p10_fig021474×1059px

Figure 8. Improved Opto-Isolator Performance

P15 · p15_fig011550×1737px

MIC5013YM-TR (SOIC-8) — MIC5013 Micrel, Inc. | Package Information | 0.380 (9.65) 0.370 (9.40) 0.135 (3.43) 0.125 (3.18) | PIN 1 | DIMENSIONS: | INCH (MM) | 0.018 (0.57) | 0.100 (2.54) | 0.013 (0.330) 0.010 (0.254) | 0.300 (7.62) | 0.255 (6.48) 0.245 (6.22) | 0.38

MIC5013 Micrel, Inc. | Package Information | 0.380 (9.65) 0.370 (9.40) 0.135 (3.43) 0.125 (3.18) | PIN 1 | DIMENSIONS: | INCH (MM) | 0.018 (0.57) | 0.100 (2.54) | 0.013 (0.330) 0.010 (0.254) | 0.300 (7.62) | 0.255 (6.48) 0.245 (6.22) | 0.38

P15 · p15_fig01P15

Datasheet Page 15 (p15_fig01)

Technical Specifications & Part Details (MIC5013YM-TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:MIC5013YM-TR (SOIC-8) is a 8-pin standard electronic & interconnect component featuring a 4.90 × 3.90 × 1.75 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 7 –0.5V supply operation across 40°C to +85°C with integrated CAN interfaces.

Operating Supply VoltageV_CC / V_DD

7 –0.5V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

40°C to +85°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

DC / Broadband Passive

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

4.90 × 3.90 × 1.75 mm (A1=0.15 mm)

Package family: SOIC (SOIC-8)

Pin Count & Lead PitchN / e

8 Pins | Pitch e = 1.27 mm (50.0 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

CAN

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol8 auto-grouped pins

IPC-7351B Land Pattern8 pads · Pitch 1.27mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOIC-8)

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

4.90 × 3.90 mm

Height (A) & Pitch (e)IPC-7351B

A=1.75mm · e=1.27mm

Pad Size (W × L)Level B

0.60 × 1.55 mm

Pins / Total PadsTopology

8P / 8Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit SOIC-8	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — MIC5013YM-TR (SOIC-8)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of MIC5013YM-TR (SOIC-8)?

Manufactured by MICROCHIP, the MIC5013YM-TR is housed in a SOIC-8 package with 8 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 7 –0.5V. Key pins include: 1 (Input: Multiplexed I/O & Peripheral Pin Input (General)), 2 (Threshold: Multiplexed I/O & Peripheral Pin Threshold (General)), 3 (Sense: Multiplexed I/O & Peripheral Pin Sense (General)), 4 (Source: Multiplexed I/O & Peripheral Pin Source (CAN)), 5 (Ground: Multiplexed I/O & Peripheral Pin Ground (General)), 6 (Gate: Multiplexed I/O & Peripheral Pin Gate (General)).

What are the IPC-7351B PCB Footprint dimensions for MIC5013YM-TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MIC5013YM-TR (SOIC-8) has a nominal body envelope of 3.90 × 4.90 mm, pitch e = 1.27 mm, and 8 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MIC5013YM-TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MIC5013YM-TR (MICROCHIP, SOIC-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (8 pins) & MIC5013 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	Input	Digital_IO	Signal terminal Input (I/O, 7 –0.5V domain). Multiplexed alternate functions: Input. Supported peripheral buses: General.
2	Threshold	Analog	Signal terminal Threshold (Analog, 7 –0.5V domain). Multiplexed alternate functions: Threshold. Supported peripheral buses: General.
3	Sense	Digital_IO	Signal terminal Sense (I/O, 7 –0.5V domain). Multiplexed alternate functions: Sense. Supported peripheral buses: General.
4	Source	Digital_IO	Signal terminal Source (I/O, 7 –0.5V domain). Multiplexed alternate functions: Source. Supported peripheral buses: CAN.
5	Ground	Digital_IO	Signal terminal Ground (I/O, 7 –0.5V domain). Multiplexed alternate functions: Ground. Supported peripheral buses: General.
6	Gate	Digital_IO	Signal terminal Gate (I/O, 7 –0.5V domain). Multiplexed alternate functions: Gate. Supported peripheral buses: General.
7	V+	Digital_IO	Signal terminal V+ (I/O, 7 –0.5V domain). Multiplexed alternate functions: V+. Supported peripheral buses: General.
8	Fault	Digital_IO	Signal terminal Fault (I/O, 7 –0.5V domain). Multiplexed alternate functions: Fault. Supported peripheral buses: General.

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