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STM32G491CCT3TR (LQFP-48(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32G491CCT3TR

STID: C6240927LQFP-48(7x7) · 48 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32G491CCT3TR (LQFP-48(7x7))1VBAT2PC133PC14 - OSC324PC15 - OSC325PF0OSC IN -_6PF1 - OSC_OU7PG10NRST -8PA09PA110PA211PA312PA413PA514PA615PA716PB017PB118PB219VSSA20VREF+21VDDA22PB1023VSS24VDD48VDD47VSS46PB945PB8BOOT0 -44PB743PB642PB541PB440PB339PA1538PA1437PA1336VDD35VSS34PA1233PA1132PA1031PA930PA829PB1528PB1427PB1326PB1225PB11Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.835.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748E=7.00mm · Pitch e=0.50mmD=7.00mm-7-5-3-113577531-1-3-5-7mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (48/48)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
2PC13I/OMultiplexed I/O & Peripheral Pin PC13 (PWM, RTC/CLK)
3PC14 - OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (RTC/CLK)
4PC15 - OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15 - OSC32_OUT (RTC/CLK)
5PF0OSC IN -_I/OMultiplexed I/O & Peripheral Pin PF0OSC IN -_ (SPI, I2C, ADC, PWM, RTC/CLK)
6PF1 - OSC_OUTI/OMultiplexed I/O & Peripheral Pin PF1 - OSC_OUT (SPI, ADC, RTC/CLK)
7PG10NRST -I/OMultiplexed I/O & Peripheral Pin PG10NRST - (RTC/CLK)
8PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
9PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, ADC, RTC/CLK)
10PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
11PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
12PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC, PWM)
13PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
14PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, ADC)
15PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
16PB0I/OMultiplexed I/O & Peripheral Pin PB0 (ADC, PWM)
17PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
18PB2I/OMultiplexed I/O & Peripheral Pin PB2 (I2C, ADC, RTC/CLK)
19VSSAGNDGround Reference Pin (VSSA)
20VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
21VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
22PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, PWM)
23VSSGNDGround Reference Pin (VSS)
24VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
25PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, ADC, PWM)
26PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C, ADC)
27PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, ADC, PWM)
28PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, ADC, PWM)
29PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, ADC, PWM, RTC/CLK)
30PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, SPI, I2C, PWM, RTC/CLK)
31PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, I2C)
32PA10I/OMultiplexed I/O & Peripheral Pin PA10 (USB, UART, SPI, I2C, PWM)
33PA11I/OMultiplexed I/O & Peripheral Pin PA11 (USB, UART, SPI, PWM)
34PA12I/OMultiplexed I/O & Peripheral Pin PA12 (USB, UART, PWM)
35VSSGNDGround Reference Pin (VSS)
36VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
37PA13I/OMultiplexed I/O & Peripheral Pin PA13 (UART, I2C, SWD/JTAG)
38PA14I/OMultiplexed I/O & Peripheral Pin PA14 (UART, I2C, SWD/JTAG)
39PA15I/OMultiplexed I/O & Peripheral Pin PA15 (UART, SPI, I2C, PWM, SWD/JTAG)
40PB3I/OMultiplexed I/O & Peripheral Pin PB3 (USB, UART, SPI, PWM, SWD/JTAG)
41PB4I/OMultiplexed I/O & Peripheral Pin PB4 (UART, SPI, PWM)
42PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C, PWM)
43PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, PWM)
44PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, PWM)
45PB8BOOT0 -I/OMultiplexed I/O & Peripheral Pin PB8BOOT0 - (UART, PWM)
46PB9I/OMultiplexed I/O & Peripheral Pin PB9 (PWM)
47VSSGNDGround Reference Pin (VSS)
48VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
PIN 1 VBAT
Power
Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 13 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32G491CCT3TR (ST · LQFP-48(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32G491CCT3TR (LQFP-48(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32G491CCT3TR (LQFP-48(7x7)) - 2. Standard Pinout (Top View)
True package pinout (48 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32G491CCT3TR (LQFP-48(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32G491CCT3TR (LQFP-48(7x7)) - 4. Package Dimensions (D×E×A)
LQFP-48(7x7) · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32G491CCT3TR (LQFP-48(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (48 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32G491CCT3TR (LQFP-48(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (13 figures · Page 1/2)
Showing 1–12 of 13 uncropped original figures for STM32G491
P46 · p46_fig01EXACT PACKAGE
STM32G491CCT3TR (LQFP-48(7x7)) — Figure 7. STM32G491xC/xE LQFP48 pinout
Figure 7. STM32G491xC/xE LQFP48 pinout
P46 · p46_fig02EXACT PACKAGE
STM32G491CCT3TR (LQFP-48(7x7)) — VSS
VSS
P171 · p171_fig01EXACT PACKAGE
STM32G491CCT3TR (LQFP-48(7x7)) — Figure 47. LQFP48 - Outline
Figure 47. LQFP48 - Outline
P173 · p173_fig01EXACT PACKAGE
STM32G491CCT3TR (LQFP-48(7x7)) — Figure 48. LQFP48 - Recommended footprint
Figure 48. LQFP48 - Recommended footprint
P1 · p01_fig01881×563px
STM32G491CCT3TR (LQFP-48(7x7)) — • Interconnect matrix
• Interconnect matrix
P49 · p49_fig011751×1423px
STM32G491CCT3TR (LQFP-48(7x7)) — Figure 11. STM32G491xC/xE LQFP80 pinout
Figure 11. STM32G491xC/xE LQFP80 pinout
P70 · p70_fig011546×1512px
STM32G491CCT3TR (LQFP-48(7x7)) — Figure 15. Power supply scheme
Figure 15. Power supply scheme
P70 · p70_fig01P70
STM32G491CCT3TR (LQFP-48(7x7)) — Datasheet Page 70 (p70_fig01)
Datasheet Page 70 (p70_fig01)
P79 · p79_fig011753×1570px
STM32G491CCT3TR (LQFP-48(7x7)) — all peripherals disable
all peripherals disable
P171 · p171_fig01P171
STM32G491CCT3TR (LQFP-48(7x7)) — Datasheet Page 171 (p171_fig01)
Datasheet Page 171 (p171_fig01)
P173 · p173_fig01P173
STM32G491CCT3TR (LQFP-48(7x7)) — Datasheet Page 173 (p173_fig01)
Datasheet Page 173 (p173_fig01)
P185 · p185_fig011546×1034px
STM32G491CCT3TR (LQFP-48(7x7)) — Figure 60. LQFP80 12 x 12 mm - Recommended footprint
Figure 60. LQFP80 12 x 12 mm - Recommended footprint
Page 1 / 2 (13 extracted figures)

Technical Specifications & Part Details (STM32G491CCT3TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32G491CCT3TR (LQFP-48(7x7)) is a 48-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
170 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
22 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-48(7x7))
Pin Count & Lead PitchN / e
48 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PB8BOOT0 -): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol48 auto-grouped pins
OK
IPC-7351B Land Pattern48 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-48(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 1.20 mm
Pins / Total PadsTopology
48P / 48Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-48(7x7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32G491CCT3TR (LQFP-48(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32G491CCT3TR (LQFP-48(7x7))?

Manufactured by ST, the STM32G491CCT3TR is housed in a LQFP-48(7x7) package with 48 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: 1 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))), 2 (PC13: Multiplexed I/O & Peripheral Pin PC13 (PWM, RTC/CLK)), 3 (PC14 - OSC32_IN: Multiplexed I/O & Peripheral Pin PC14 - OSC32_IN (RTC/CLK)), 4 (PC15 - OSC32_OUT: Multiplexed I/O & Peripheral Pin PC15 - OSC32_OUT (RTC/CLK)), 5 (PF0OSC IN -_: Multiplexed I/O & Peripheral Pin PF0OSC IN -_ (SPI, I2C, ADC, PWM, RTC/CLK)), 6 (PF1 - OSC_OUT: Multiplexed I/O & Peripheral Pin PF1 - OSC_OUT (SPI, ADC, RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for STM32G491CCT3TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G491CCT3TR (LQFP-48(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 48 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G491CCT3TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G491CCT3TR (ST, LQFP-48(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (48 pins) & STM32G491 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
2PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: PWM, RTC/CLK.
3PC14 - OSC32_INDigital_IOSignal terminal PC14 - OSC32_IN (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN. Supported peripheral buses: RTC/CLK.
4PC15 - OSC32_OUTDigital_IOSignal terminal PC15 - OSC32_OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC15 - OSC32_OUT. Supported peripheral buses: RTC/CLK.
5PF0OSC IN -_Digital_IOSignal terminal PF0OSC IN -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA, SPI2_NSS. Supported peripheral buses: SPI, I2C, ADC, PWM, RTC/CLK.
6PF1 - OSC_OUTDigital_IOSignal terminal PF1 - OSC_OUT (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, ADC, RTC/CLK.
7PG10NRST -Digital_IOSignal terminal PG10NRST - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG10NRST -. Supported peripheral buses: RTC/CLK.
8PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
9PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: UART, ADC, RTC/CLK.
10PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: UART, ADC, PWM.
11PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: UART, ADC, PWM.
12PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_NSS. Supported peripheral buses: UART, SPI, ADC, DAC, PWM.
13PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC, DAC, PWM.
14PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: UART, ADC.
15PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
16PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: ADC, PWM.
17PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, ADC, PWM.
18PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: I2C3_SMBA. Supported peripheral buses: I2C, ADC, RTC/CLK.
19VSSAGND0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
20VREF+AnalogSignal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
21VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
22PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: UART, SPI, PWM.
23VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
24VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
25PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: UART, ADC, PWM.
26PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: I2C2_SMBA, SPI2_NSS. Supported peripheral buses: UART, SPI, I2C, ADC.
27PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, ADC, PWM.
28PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI, ADC, PWM.
29PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, ADC, PWM, RTC/CLK.
30PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL. Supported peripheral buses: UART, SPI, I2C, PWM, RTC/CLK.
31PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: UART, I2C.
32PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SMBA, SPI2_MISOTIM1CH3. Supported peripheral buses: USB, UART, SPI, I2C, PWM.
33PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI, USB_DM. Supported peripheral buses: USB, UART, SPI, PWM.
34PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: USB_DP. Supported peripheral buses: USB, UART, PWM.
35VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
36VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
37PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCLIROUT. Supported peripheral buses: UART, I2C, SWD/JTAG.
38PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: UART, I2C, SWD/JTAG.
39PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_NSS. Supported peripheral buses: UART, SPI, I2C, PWM, SWD/JTAG.
40PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: USB, UART, SPI, PWM, SWD/JTAG.
41PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI3_MISO. Supported peripheral buses: UART, SPI, PWM.
42PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, I2C3_SDA. Supported peripheral buses: UART, SPI, I2C, PWM.
43PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: UART, PWM.
44PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: UART, PWM.
45PB8BOOT0 -Digital_IOSignal terminal PB8BOOT0 - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB8BOOT0 -. Supported peripheral buses: UART, PWM.
46PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: PWM.
47VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
48VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
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