HV9930LG-G (SOIC-8) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of HV9930LG-G (SOIC-8)?

Manufactured by MICROCHIP, the HV9930LG-G is housed in a SOIC-8 package with 8 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 7V to 10V. Key pins include: 1 (VIN: Power Supply Input (VIN — 7V to 10V)), 2 (CS1: Multiplexed I/O & Peripheral Pin CS1 (General)), 3 (GND: Ground Reference Pin (GND)), 4 (GATE: Multiplexed I/O & Peripheral Pin GATE (General)), 5 (PWMD: Multiplexed I/O & Peripheral Pin PWMD (PWM)), 6 (VDD: Power Supply Input (VDD — 7V to 10V)).

Q: What are the IPC-7351B PCB Footprint dimensions for HV9930LG-G?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), HV9930LG-G (SOIC-8) has a nominal body envelope of 3.90 × 4.90 mm, pitch e = 1.27 mm, and 8 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for HV9930LG-G?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for HV9930LG-G (MICROCHIP, SOIC-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 3.90mm × 4.90mm · Pitch: 1.27mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (8/8)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	VIN	Power	Power Supply Input (VIN — 7V to 10V)
2	CS1	I/O	Multiplexed I/O & Peripheral Pin CS1 (General)
3	GND	GND	Ground Reference Pin (GND)
4	GATE	I/O	Multiplexed I/O & Peripheral Pin GATE (General)
5	PWMD	I/O	Multiplexed I/O & Peripheral Pin PWMD (PWM)
6	VDD	Power	Power Supply Input (VDD — 7V to 10V)
7	CS2	I/O	Multiplexed I/O & Peripheral Pin CS2 (General)
8	REF	I/O	Multiplexed I/O & Peripheral Pin REF (General)

PIN 1 VIN

Power

Power Supply Input (VIN — 7V to 10V)

Design note: Primary positive power supply input (VIN) operating in the 7V to 10V domain (Max rating: 10.0V).

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 10 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

HV9930LG-G (SOIC-8) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

HV9930LG-G (SOIC-8) - 2. Standard Pinout (Top View)

True package pinout (8 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

HV9930LG-G (SOIC-8) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

HV9930LG-G (SOIC-8) - 4. Package Dimensions (D×E×A)

SOIC-8 · 3.90×4.90mm · Pitch 1.27mmExpand ›

5. Recommended Land PatternLAND PATTERN

HV9930LG-G (SOIC-8) - 5. Recommended Land Pattern

IPC-7351B Footprint (8 Pads)Expand ›

6. Application SchematicSCHEMATIC

HV9930LG-G (SOIC-8) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (10 figures · Page 1/1)

Showing 1–10 of 10 uncropped original figures for HV9930

P1 · p01_fig02EXACT PACKAGE

Package Type

P10 · p10_fig01EXACT PACKAGE

8-lead SOIC Example | NNN | XXXXXXXX | YYWW e3 | 236 | HV9930LG | 1912 e3

P1 · p01_fig01376×200px

Hysteretic Boost-Buck (Ćuk) LED Driver IC

P2 · p02_fig011352×967px

Functional Block Diagram

P3 · p03_fig011511×927px

Typical Application Circuit

P3 · p03_fig01P3

Datasheet Page 3 (p03_fig01)

P8 · p08_fig011778×1244px

EQUATION 4-9:

P8 · p08_fig021779×483px

HV9930LG-G (SOIC-8) — DS20005682A-page 8  2019 Microchip Technology Inc. | RMS current of the damping capacitor is determined with Equation 4-4. | EQUATION 4-4: | The value of RREF can be set as 10 kΩ for convenience. Then, the value of RS can be chosen from th

DS20005682A-page 8  2019 Microchip Technology Inc. | RMS current of the damping capacitor is determined with Equation 4-4. | EQUATION 4-4: | The value of RREF can be set as 10 kΩ for convenience. Then, the value of RS can be chosen from th

P10 · p10_fig021361×656px

HV9930LG-G (SOIC-8) — 3 e | 3 e Legend: XX...X Product Code or Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) Www Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code

3 e | 3 e Legend: XX...X Product Code or Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) Www Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code

P10 · p10_fig01P10

Datasheet Page 10 (p10_fig01)

Technical Specifications & Part Details (HV9930LG-G)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:HV9930LG-G (SOIC-8) is a 8-pin standard electronic & interconnect component featuring a 4.90 × 3.90 × 1.75 mm mechanical envelope (lead pitch e = 1.27 mm). Rated for 7V to 10V supply operation across 40°C to +150°C with integrated PWM interfaces.

Operating Supply VoltageV_CC / V_DD

7V to 10V

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

40°C to +150°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

DC / Broadband Passive

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

4.90 × 3.90 × 1.75 mm (A1=0.15 mm)

Package family: SOIC (SOIC-8)

Pin Count & Lead PitchN / e

8 Pins | Pitch e = 1.27 mm (50.0 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

PWM

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol8 auto-grouped pins

IPC-7351B Land Pattern8 pads · Pitch 1.27mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOIC-8)

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

4.90 × 3.90 mm

Height (A) & Pitch (e)IPC-7351B

A=1.75mm · e=1.27mm

Pad Size (W × L)Level B

0.60 × 1.55 mm

Pins / Total PadsTopology

8P / 8Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit SOIC-8	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — HV9930LG-G (SOIC-8)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of HV9930LG-G (SOIC-8)?

Manufactured by MICROCHIP, the HV9930LG-G is housed in a SOIC-8 package with 8 pins and a 1.27 mm lead pitch, supporting a VCC supply range of 7V to 10V. Key pins include: 1 (VIN: Power Supply Input (VIN — 7V to 10V)), 2 (CS1: Multiplexed I/O & Peripheral Pin CS1 (General)), 3 (GND: Ground Reference Pin (GND)), 4 (GATE: Multiplexed I/O & Peripheral Pin GATE (General)), 5 (PWMD: Multiplexed I/O & Peripheral Pin PWMD (PWM)), 6 (VDD: Power Supply Input (VDD — 7V to 10V)).

What are the IPC-7351B PCB Footprint dimensions for HV9930LG-G?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), HV9930LG-G (SOIC-8) has a nominal body envelope of 3.90 × 4.90 mm, pitch e = 1.27 mm, and 8 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for HV9930LG-G?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for HV9930LG-G (MICROCHIP, SOIC-8) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (8 pins) & HV9930 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	VIN	Power_In	Primary positive power supply input (VIN) operating in the 7V to 10V domain (Max rating: 10.0V).
2	CS1	Digital_IO	Signal terminal CS1 (I/O, 7V to 10V domain). Multiplexed alternate functions: CS1. Supported peripheral buses: General.
3	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
4	GATE	Digital_IO	Signal terminal GATE (I/O, 7V to 10V domain). Multiplexed alternate functions: GATE. Supported peripheral buses: General.
5	PWMD	Digital_IO	Signal terminal PWMD (I/O, 7V to 10V domain). Multiplexed alternate functions: PWMD. Supported peripheral buses: PWM.
6	VDD	Power_In	Primary positive power supply input (VDD) operating in the 7V to 10V domain (Max rating: 10.0V).
7	CS2	Digital_IO	Signal terminal CS2 (I/O, 7V to 10V domain). Multiplexed alternate functions: CS2. Supported peripheral buses: General.
8	REF	Digital_IO	Signal terminal REF (I/O, 7V to 10V domain). Multiplexed alternate functions: REF. Supported peripheral buses: General.

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