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ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) — Symbol, Footprint IPC-7351B & 3D STEP Model

ESP32-DevKitC-32D

ESPRESSIFID: C571181COMM-SMD_ESP32-DEVKITC-32D · 38 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D)J2-13V3J2-10IO26J2-11IO27J2-12IO14J2-13IO12J2-14GNDJ2-15IO13J2-16D2J2-17D3J2-18CMDJ2-195VJ2-2ENJ2-3VPJ2-4VNJ2-5IO34J2-6IO35J2-7IO32J2-8IO33J2-9IO25J3-9IO18J3-8IO19J3-7GNDJ3-6IO21J3-5RXJ3-4TXJ3-3IO22J3-2IO23J3-19CLKJ3-18D0J3-17D1J3-16IO15J3-15IO2J3-14IO0J3-13IO4J3-12IO16J3-11IO17J3-10IO5J3-1GNDGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.830.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5mm
2. 2D FOOTPRINT
J3-19J3-18J3-17J3-16J3-15J3-14J3-13J3-12J3-11J3-10J3-9J3-8J3-7J3-6J3-5J3-4J3-3J3-2J3-1J2-18J2-17J2-16J2-15J2-14J2-13J2-12J2-11J2-10J2-9J2-8J2-7J2-6J2-5J2-4J2-3J2-19J2-2J2-1E=27.90mm · Pitch e=0.50mmD=54.40mm-29-27-25-23-21-19-17-15-13-11-9-7-5-3-11357911131517192123252729424038363432302826242220181614121086420-2-4-6-8-10-12-14-16-18-20-22-24-26-28-30-32-34-36-38-40-42mm
3. 3D CAD MODEL
Package Body: 27.90mm × 54.40mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (38/38)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
J2-13V3PowerPower Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))
J2-10IO26I/OMultiplexed I/O & Peripheral Pin IO26 (General)
J2-11IO27I/OMultiplexed I/O & Peripheral Pin IO27 (General)
J2-12IO14I/OMultiplexed I/O & Peripheral Pin IO14 (General)
J2-13IO12I/OMultiplexed I/O & Peripheral Pin IO12 (General)
J2-14GNDGNDGround Reference Pin (GND)
J2-15IO13I/OMultiplexed I/O & Peripheral Pin IO13 (General)
J2-16D2I/OMultiplexed I/O & Peripheral Pin D2 (General)
J2-17D3I/OMultiplexed I/O & Peripheral Pin D3 (General)
J2-18CMDI/OMultiplexed I/O & Peripheral Pin CMD (General)
J2-195VPowerPower Supply Input (5V — 3.3V VDD3P3 (3.0V ~ 3.6V))
J2-2ENISystem Enable & Hardware Reset (EN)
J2-3VPI/OMultiplexed I/O & Peripheral Pin VP (General)
J2-4VNI/OMultiplexed I/O & Peripheral Pin VN (General)
J2-5IO34IInput-Only Pin IO34 (General)
J2-6IO35IInput-Only Pin IO35 (General)
J2-7IO32I/OMultiplexed I/O & Peripheral Pin IO32 (General)
J2-8IO33I/OMultiplexed I/O & Peripheral Pin IO33 (General)
J2-9IO25I/OMultiplexed I/O & Peripheral Pin IO25 (General)
J3-1GNDGNDGround Reference Pin (GND)
J3-10IO5I/OMultiplexed I/O & Peripheral Pin IO5 (General)
J3-11IO17I/OMultiplexed I/O & Peripheral Pin IO17 (General)
J3-12IO16I/OMultiplexed I/O & Peripheral Pin IO16 (General)
J3-13IO4I/OMultiplexed I/O & Peripheral Pin IO4 (General)
J3-14IO0I/OMultiplexed I/O & Peripheral Pin IO0 (General)
J3-15IO2I/OMultiplexed I/O & Peripheral Pin IO2 (General)
J3-16IO15I/OMultiplexed I/O & Peripheral Pin IO15 (General)
J3-17D1I/OMultiplexed I/O & Peripheral Pin D1 (General)
J3-18D0I/OMultiplexed I/O & Peripheral Pin D0 (General)
J3-19CLKI/OMultiplexed I/O & Peripheral Pin CLK (General)
J3-2IO23I/OMultiplexed I/O & Peripheral Pin IO23 (General)
J3-3IO22I/OMultiplexed I/O & Peripheral Pin IO22 (General)
J3-4TXI/OMultiplexed I/O & Peripheral Pin TX (General)
J3-5RXI/OMultiplexed I/O & Peripheral Pin RX (General)
J3-6IO21I/OMultiplexed I/O & Peripheral Pin IO21 (General)
J3-7GNDGNDGround Reference Pin (GND)
J3-8IO19I/OMultiplexed I/O & Peripheral Pin IO19 (General)
J3-9IO18I/OMultiplexed I/O & Peripheral Pin IO18 (General)
PIN J2-1 3V3
Power
Power Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))
Design note: Primary positive power supply input (3V3) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 4 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: ESP32-DevKitC-32D (ESPRESSIF · COMM-SMD_ESP32-DEVKITC-32D)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) - 2. Standard Pinout (Top View)
True package pinout (38 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) - 4. Package Dimensions (D×E×A)
COMM-SMD_ESP32-DEVKITC-32D · 27.90×54.40mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) - 5. Recommended Land Pattern
IPC-7351B Footprint (38 Pads)Expand ›
6. Application SchematicSCHEMATIC
ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (4 figures · Page 1/1)
Showing 1–4 of 4 uncropped original figures for ESP32-DEVKITC
P1 · p01_fig01642×314px
ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) — www.espressif.com
www.espressif.com
P13 · p13_fig011312×1180px
ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) — 图2: ESP32 管脚布局（封装为QFN 6*6，顶视图）
图2: ESP32 管脚布局（封装为QFN 6*6，顶视图）
P14 · p14_fig011336×1178px
ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) — 图3: ESP32 管脚布局（封装为QFN 5*5，顶视图）
图3: ESP32 管脚布局（封装为QFN 5*5，顶视图）
P14 · p14_fig01P14
ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) — Datasheet Page 14 (p14_fig01)
Datasheet Page 14 (p14_fig01)

Technical Specifications & Part Details (ESP32-DevKitC-32D)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Wireless Wi-Fi / Bluetooth LE SoC Module
Detailed Overview:ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) is a 49-pin wireless wi-fi / bluetooth le soc module featuring a 54.40 × 27.90 × 3.85 mm mechanical envelope (lead pitch e = 0.00 mm). Rated for 65 V ~ 2.0 V supply operation across 40 °C ~ 105 °C with integrated Wi-Fi, UART, SPI, I2C, ADC, DAC, PWM, SDIO, RTC/CLK, SWD/JTAG, TOUCH interfaces.
Operating Supply VoltageV_CC / V_DD
65 V ~ 2.0 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
40 °C ~ 105 °C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
2.4 GHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
500 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
54.40 × 27.90 × 3.85 mm (A1=0.51 mm)
Package family: DIP (COMM-SMD_ESP32-DEVKITC-32D)
Pin Count & Lead PitchN / e
49 Pins
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Wi-Fi, UART, SPI, I2C, ADC, DAC, PWM, SDIO, RTC/CLK, SWD/JTAG, TOUCH
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol38 auto-grouped pins
OK
IPC-7351B Land Pattern38 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (COMM-SMD_ESP32-DEVKITC-32D)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
54.40 × 27.90 mm
Height (A) & Pitch (e)IPC-7351B
A=3.85mm · e=0.50mm
Pad Size (W × L)Level B
0.40 × 0.90 mm
Pins / Total PadsTopology
38P / 38Pad (THT_DIP)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
C1, C2
BOM
22µF (or 10µF) X5R + 100nF X7R
0805 + 0402
3V3 supply decoupling for ~500mA Wi-Fi TX bursts — place closest to 3V3 pin; supply must deliver >= 600mA.
R_en + C_en
BOM
R = 10kΩ to 3V3 + C = 1µF to GND
0402 / 0603
Power-On Reset RC delay at EN (CHIP_PU) — 1µF capacitor at EN is REQUIRED for reliable cold boot.
R_boot + SW1
BOM
10kΩ Pull-up + BOOT button
0402 + SMD
Firmware boot-mode strap (IO0 on ESP32/S2/S3, IO9 on ESP32-C3) — on C3 pull IO8 high via 10kΩ for UART/USB download.
D_esd
BOM
USBLC6-2SC6 / LESD5D5.0CT1G
SOT-23-6 / SOD-523
ESD surge protection on USB D+/D- — place right next to USB Type-C connector before IO18/IO19/IO20.
ESP32-S3-MINI-1-N8 / 1U-N4R2
Espressif
100% Drop-inSame 15.4×15.4mm 65-pad footprint as ESP32-S2-MINI-2 — verify USB GPIO 19/20 pin mapping.

Technical Frequently Asked Questions (FAQ) — ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D)?

Manufactured by ESPRESSIF, the ESP32-DevKitC-32D is housed in a COMM-SMD_ESP32-DEVKITC-32D package with 38 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 65 V ~ 2.0 V. Key pins include: J2-1 (3V3: Power Supply Input (3V3 — 3.3V VDD3P3 (3.0V ~ 3.6V))), J2-10 (IO26: Multiplexed I/O & Peripheral Pin IO26 (General)), J2-11 (IO27: Multiplexed I/O & Peripheral Pin IO27 (General)), J2-12 (IO14: Multiplexed I/O & Peripheral Pin IO14 (General)), J2-13 (IO12: Multiplexed I/O & Peripheral Pin IO12 (General)), J2-14 (GND: Ground Reference Pin (GND)).

What are the IPC-7351B PCB Footprint dimensions for ESP32-DevKitC-32D?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ESP32-DevKitC-32D (COMM-SMD_ESP32-DEVKITC-32D) has a nominal body envelope of 27.90 × 54.40 mm, pitch e = 0.50 mm, and 38 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ESP32-DevKitC-32D?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ESP32-DevKitC-32D (ESPRESSIF, COMM-SMD_ESP32-DEVKITC-32D) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (38 pins) & ESP32-DEVKITC Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
J2-13V3Power_InPrimary positive power supply input (3V3) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
J2-10IO26Digital_IOSignal terminal IO26 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO26. Supported peripheral buses: General.
J2-11IO27Digital_IOSignal terminal IO27 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO27. Supported peripheral buses: General.
J2-12IO14Digital_IOSignal terminal IO14 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO14. Supported peripheral buses: General.
J2-13IO12Digital_IOSignal terminal IO12 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO12. Supported peripheral buses: General.
J2-14GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
J2-15IO13Digital_IOSignal terminal IO13 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO13. Supported peripheral buses: General.
J2-16D2Digital_IOSignal terminal D2 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: D2. Supported peripheral buses: General.
J2-17D3Digital_IOSignal terminal D3 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: D3. Supported peripheral buses: General.
J2-18CMDDigital_IOSignal terminal CMD (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: CMD. Supported peripheral buses: General.
J2-195VPower_InPrimary positive power supply input (5V) operating in the 3.3V VDD3P3 (3.0V ~ 3.6V) domain (Max rating: 3.6V).
J2-2ENDigital_IOChip enable and power-on reset control input (EN): High enables the SoC; Low powers down the chip into reset.
J2-3VPDigital_IOSignal terminal VP (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: VP. Supported peripheral buses: General.
J2-4VNDigital_IOSignal terminal VN (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: VN. Supported peripheral buses: General.
J2-5IO34Digital_IOSignal terminal IO34 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO34. Supported peripheral buses: General.
J2-6IO35Digital_IOSignal terminal IO35 (I, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO35. Supported peripheral buses: General.
J2-7IO32Digital_IOSignal terminal IO32 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO32. Supported peripheral buses: General.
J2-8IO33Digital_IOSignal terminal IO33 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO33. Supported peripheral buses: General.
J2-9IO25Digital_IOSignal terminal IO25 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO25. Supported peripheral buses: General.
J3-1GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
J3-10IO5Digital_IOSignal terminal IO5 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO5. Supported peripheral buses: General.
J3-11IO17Digital_IOSignal terminal IO17 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO17. Supported peripheral buses: General.
J3-12IO16Digital_IOSignal terminal IO16 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO16. Supported peripheral buses: General.
J3-13IO4Digital_IOSignal terminal IO4 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO4. Supported peripheral buses: General.
J3-14IO0Digital_IOSignal terminal IO0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO0. Supported peripheral buses: General.
J3-15IO2Digital_IOSignal terminal IO2 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO2. Supported peripheral buses: General.
J3-16IO15Digital_IOSignal terminal IO15 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO15. Supported peripheral buses: General.
J3-17D1Digital_IOSignal terminal D1 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: D1. Supported peripheral buses: General.
J3-18D0Digital_IOSignal terminal D0 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: D0. Supported peripheral buses: General.
J3-19CLKDigital_IOSignal terminal CLK (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: CLK. Supported peripheral buses: General.
J3-2IO23Digital_IOSignal terminal IO23 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO23. Supported peripheral buses: General.
J3-3IO22Digital_IOSignal terminal IO22 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO22. Supported peripheral buses: General.
J3-4TXDigital_IOSignal terminal TX (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: TX. Supported peripheral buses: General.
J3-5RXDigital_IOSignal terminal RX (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: RX. Supported peripheral buses: General.
J3-6IO21Digital_IOSignal terminal IO21 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO21. Supported peripheral buses: General.
J3-7GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
J3-8IO19Digital_IOSignal terminal IO19 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO19. Supported peripheral buses: General.
J3-9IO18Digital_IOSignal terminal IO18 (I/O, 3.3V VDD3P3 (3.0V ~ 3.6V) domain). Multiplexed alternate functions: IO18. Supported peripheral buses: General.
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