TCM809LENB713 (SOT-23-3) — Schematic Symbol, IPC-7351B Footprint & 3D STEP Model

Q: What is the Pinout and operating voltage specification of TCM809LENB713 (SOT-23-3)?

Manufactured by MICROCHIP, the TCM809LENB713 is housed in a SOT-23-3 package with 3 pins and a 1.90 mm lead pitch. Key pins include: 1 (GND: Ground Reference Pin (GND)), 2 (RESET#: System Enable & Hardware Reset (RESET#)), 3 (VDD: Power Supply Input (VDD — 3.3V / 5.0V Standard Logic)).

Q: What are the IPC-7351B PCB Footprint dimensions for TCM809LENB713?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), TCM809LENB713 (SOT-23-3) has a nominal body envelope of 1.30 × 2.90 mm, pitch e = 1.90 mm, and 3 copper pads.

Q: Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for TCM809LENB713?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for TCM809LENB713 (MICROCHIP, SOT-23-3) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

1. SYMBOL

2. 2D FOOTPRINT

3. 3D CAD MODEL

Package Body: 2.90mm × 1.30mm · Pitch: 1.90mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (3/3)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D

Pin	Symbol	Type	Function (EN)
1	GND	GND	Ground Reference Pin (GND)
2	RESET#	I	System Enable & Hardware Reset (RESET#)
3	VDD	Power	Power Supply Input (VDD — 3.3V / 5.0V Standard Logic)

PIN 1 GND

GND

Ground Reference Pin (GND)

Design note: 0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.

IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 6 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen

1. Realistic 3D PackageREPRESENTATIVE

TCM809LENB713 (SOT-23-3) - 1. Realistic 3D Package

Detailed solid 3D bodyExpand ›

2. Standard Pinout (Top View)CLEANROOM PINOUT

TCM809LENB713 (SOT-23-3) - 2. Standard Pinout (Top View)

True package pinout (3 pins)Expand ›

3. Original Datasheet PinoutPDF PINOUT

TCM809LENB713 (SOT-23-3) - 3. Original Datasheet Pinout

Uncropped datasheet pin diagramExpand ›

4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS

TCM809LENB713 (SOT-23-3) - 4. Package Dimensions (D×E×A)

SOT-23-3 · 2.90×1.30mm · Pitch 1.90mmExpand ›

5. Recommended Land PatternLAND PATTERN

TCM809LENB713 (SOT-23-3) - 5. Recommended Land Pattern

IPC-7351B Footprint (3 Pads)Expand ›

6. Application SchematicSCHEMATIC

TCM809LENB713 (SOT-23-3) - 6. Application Schematic

Typical Application SchematicExpand ›

Original Datasheet Pinouts & Technical Drawings (6 figures · Page 1/1)

Showing 1–6 of 6 uncropped original figures for TCM809

P7 · p07_fig01EXACT PACKAGE

TCM809LENB713 (SOT-23-3) —  2001-2012 Microchip Technology Inc. DS21661E-page 7 | TCM809/TCM810 | 5.0 PACKAGING INFORMATION | 5.1 Package Marking Information | 3-Pin SOT-23B | XXNN | Note: In the event the full Microchip part number cannot be marked on one line, it

P1 · p01_fig011777×755px

TCM809LENB713 (SOT-23-3) — • Computers • Embedded Systems • Battery-powered Equipment • Critical Microcontroller Power Supply Monitoring • Automotive | Typical Application Circuit | The TCM809/TCM810 are optimized to reject fast transient glitches on the VDD line. A

• Computers • Embedded Systems • Battery-powered Equipment • Critical Microcontroller Power Supply Monitoring • Automotive | Typical Application Circuit | The TCM809/TCM810 are optimized to reject fast transient glitches on the VDD line. A

P1 · p01_fig01P1

Datasheet Page 1 (p01_fig01)

P7 · p07_fig01P7

Datasheet Page 7 (p07_fig01)

P8 · p08_fig011441×1779px

TCM809LENB713 (SOT-23-3) — 10 5 0 10 5 0  Mold Draft Angle Bottom | 10 5 0 10 5 0  Mold Draft Angle Top | 0.51 0.44 0.37 .020 .017 .015 B Lead Width | 0.18 0.14 0.09 .007 .006 .004 c Lead Thickness | 10 5 0 10 5 0  Foot Angle | 0.55 0.45 0.35 .022 .018 .014 L Foot

P9 · p09_fig011777×2480px

TCM809LENB713 (SOT-23-3) —  2001-2012 Microchip Technology Inc. DS21661E-page 9 | 3-Lead Plastic Small Outline Transistor (LB) (SC-70) | 12° 8° 12° 8° b Mold Draft Angle Bottom | 12° 8° 12° 8° a Mold Draft Angle Top | 0.40 0.15 .016 .006 B Lead Width | 0.25 0.08 .01

Technical Specifications & Part Details (TCM809LENB713)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)

Standard Electronic & Interconnect Component

Detailed Overview:TCM809LENB713 (SOT-23-3) is a 3-pin standard electronic & interconnect component featuring a 2.90 × 1.30 × 1.10 mm mechanical envelope (lead pitch e = 1.90 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C to +125°C with integrated Standard I/O / Passive interfaces.

Operating Supply VoltageV_CC / V_DD

1.8V ~ 5.5V (Theo Datasheet)

Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins

Ambient Operating TemperatureT_A

-40°C to +125°C

Industrial temperature grade; T_J(max) = +125°C

Clock / RF Operating Frequencyf_CLK / f_RF

DC / Broadband Passive

Extracted from authoritative PDF specification tables

Current & Power RatingI_OUT / I_CC

9 µA

Observe per-pin absolute maximum current limits

Package Envelope (D × E × A)D × E × A

2.90 × 1.30 × 1.10 mm (A1=0.07 mm)

Package family: SOT23 (SOT-23-3)

Pin Count & Lead PitchN / e

3 Pins | Pitch e = 1.90 mm (74.8 mil)

Normalized to Center-to-Center Span C per IPC-7351B

Integrated Peripheral InterfacesBuses

Standard I/O / Passive

Cross-linked with 4D Pinout & Schematic Symbol

Reflow & Moisture SensitivityIPC / MSL

IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3

60% windowed solder paste stencil on thermal EPAD

Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.

Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export

5/5 PASS

IEEE-315 Symbol3 auto-grouped pins

IPC-7351B Land Pattern3 pads · Pitch 1.90mm

IPC-7525 60% Solder PasteReflow 1:1 Standard

DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm

3D STEP AP214 & GLBAligned coordinate origin (0,0,0)

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet

5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOT-23-3)

Extracted from Datasheet & IPC-7351B Normalized

Package Body (D × E)Nominal

2.90 × 1.30 mm

Height (A) & Pitch (e)IPC-7351B

A=1.10mm · e=1.90mm

Pad Size (W × L)Level B

0.65 × 1.00 mm

Pins / Total PadsTopology

3P / 3Pad (SOT_SMALL)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives

DFM READY

Designator / Replacement MPN	Value / Package	Function & PCB Layout Rule
N/A BOM	Per application circuit SOT-23-3	Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — TCM809LENB713 (SOT-23-3)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats

IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of TCM809LENB713 (SOT-23-3)?

Manufactured by MICROCHIP, the TCM809LENB713 is housed in a SOT-23-3 package with 3 pins and a 1.90 mm lead pitch. Key pins include: 1 (GND: Ground Reference Pin (GND)), 2 (RESET#: System Enable & Hardware Reset (RESET#)), 3 (VDD: Power Supply Input (VDD — 3.3V / 5.0V Standard Logic)).

What are the IPC-7351B PCB Footprint dimensions for TCM809LENB713?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), TCM809LENB713 (SOT-23-3) has a nominal body envelope of 1.30 × 2.90 mm, pitch e = 1.90 mm, and 3 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for TCM809LENB713?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for TCM809LENB713 (MICROCHIP, SOT-23-3) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (3 pins) & TCM809 Family VariantsExpand static table

Pin #	Signal Name	Electrical Type	Functional Description & Design Notes
1	GND	GND	0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
2	RESET#	Digital_IO	Active-low hardware reset terminal (RESET#): pulling this pin Low resets the processor core and peripherals.
3	VDD	Power_In	Primary positive power supply input (VDD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).

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