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CH379Y (QFN-28(4x4)) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH379Y

WCHID: C55510054QFN-28(4x4) · 29 Pins · Pitch 0.50mmIPC TOLERANCE VARIATION5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH379Y (QFN-28(4x4))1SS_TXB2SS_TXA3AVDDK4SS_RXB5SS_RXA6XI7XO8LED/EX12_EN9TEST -1011_SPIMISO1113_SPIMOSI1212_EX12EN1314_CDROMEN14LED -15SD_D029GND28NC27HS_DM26HS_DP25VDD3324RESET#23VOUT_SD22VDD3321VSD_IO20SD_D219SD_D318SD_CMD17GND16SD_SCKGrid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.225.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4mm
2. 2D FOOTPRINT
1234567891011121314151617181920212223242526272829E=4.00mm · Pitch e=0.50mmD=4.00mm-4-3-2-10123443210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 4.00mm × 4.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (29/29)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1SS_TXBI/OMultiplexed I/O & Peripheral Pin SS_TXB (General)
2SS_TXAI/OMultiplexed I/O & Peripheral Pin SS_TXA (General)
3AVDDKPowerPower Supply Input (AVDDK — 3.3V / 5.0V Standard Logic)
4SS_RXBI/OMultiplexed I/O & Peripheral Pin SS_RXB (General)
5SS_RXAI/OMultiplexed I/O & Peripheral Pin SS_RXA (General)
6XII/OMultiplexed I/O & Peripheral Pin XI (RTC/CLK)
7XOI/OMultiplexed I/O & Peripheral Pin XO (RTC/CLK)
8LED/EX12_ENI/OMultiplexed I/O & Peripheral Pin LED/EX12_EN (General)
9TEST -I/OMultiplexed I/O & Peripheral Pin TEST - (General)
1011_SPIMISOI/OMultiplexed I/O & Peripheral Pin 11_SPIMISO (SPI)
1113_SPIMOSII/OMultiplexed I/O & Peripheral Pin 13_SPIMOSI (SPI)
1212_EX12ENI/OMultiplexed I/O & Peripheral Pin 12_EX12EN (General)
1314_CDROMENI/OMultiplexed I/O & Peripheral Pin 14_CDROMEN (General)
14LED -I/OMultiplexed I/O & Peripheral Pin LED - (General)
15SD_D0I/OMultiplexed I/O & Peripheral Pin SD_D0 (General)
16SD_SCKI/OMultiplexed I/O & Peripheral Pin SD_SCK (SPI)
17GNDGNDGround Reference Pin (GND)
18SD_CMDI/OMultiplexed I/O & Peripheral Pin SD_CMD (General)
19SD_D3I/OMultiplexed I/O & Peripheral Pin SD_D3 (General)
20SD_D2I/OMultiplexed I/O & Peripheral Pin SD_D2 (General)
21VSD_IOI/OMultiplexed I/O & Peripheral Pin VSD_IO (General)
22VDD33PowerPower Supply Input (VDD33 — 3.3V / 5.0V Standard Logic)
23VOUT_SDPowerPower Supply Input (VOUT_SD — 3.3V / 5.0V Standard Logic)
24RESET#ISystem Enable & Hardware Reset (RESET#)
25VDD33PowerPower Supply Input (VDD33 — 3.3V / 5.0V Standard Logic)
26HS_DPI/OMultiplexed I/O & Peripheral Pin HS_DP (General)
27HS_DMI/OMultiplexed I/O & Peripheral Pin HS_DM (General)
28NCI/OMultiplexed I/O & Peripheral Pin NC (General)
29GNDGNDGround Reference Pin (GND)
PIN 1 SS_TXB
I/O
Multiplexed I/O & Peripheral Pin SS_TXB (General)
Design note: Signal terminal SS_TXB (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SS_TXB. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 7 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH379Y (WCH · QFN-28(4x4))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH379Y (QFN-28(4x4)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH379Y (QFN-28(4x4)) - 2. Standard Pinout (Top View)
True package pinout (29 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH379Y (QFN-28(4x4)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH379Y (QFN-28(4x4)) - 4. Package Dimensions (D×E×A)
QFN-28(4x4) · 4.00×4.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH379Y (QFN-28(4x4)) - 5. Recommended Land Pattern
IPC-7351B Footprint (29 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH379Y (QFN-28(4x4)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (7 figures · Page 1/1)
Showing 1–7 of 7 uncropped original figures for CH379
P1 · p01_fig011422×584px
CH379Y (QFN-28(4x4)) — 图1-1 芯片应用框图 2、特点
图1-1 芯片应用框图 2、特点
P2 · p02_fig011720×2504px
CH379Y (QFN-28(4x4)) — CH379 手册 https://wch.cn
CH379 手册 https://wch.cn
P2 · p02_fig01P2
CH379Y (QFN-28(4x4)) — Datasheet Page 2 (p02_fig01)
Datasheet Page 2 (p02_fig01)
P5 · p05_fig011763×581px
CH379Y (QFN-28(4x4)) — 引脚号 引脚 名称 类型
引脚号 引脚 名称 类型
P17 · p17_fig011357×2436px
CH379Y (QFN-28(4x4)) — 图8-1 CH379M 双盘应用参考电路图
图8-1 CH379M 双盘应用参考电路图
P17 · p17_fig01P17
CH379Y (QFN-28(4x4)) — Datasheet Page 17 (p17_fig01)
Datasheet Page 17 (p17_fig01)
P19 · p19_fig011582×2264px
CH379Y (QFN-28(4x4)) — 图8-2 CH379Y 单盘应用参考电路图
图8-2 CH379Y 单盘应用参考电路图

Technical Specifications & Part Details (CH379Y)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CH379Y (QFN-28(4x4)) is a 28-pin standard electronic & interconnect component featuring a 4.00 × 4.00 × 0.85 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
4.00 × 4.00 × 0.85 mm (A1=0.03 mm)
Package family: QFN (QFN-28(4x4))
Pin Count & Lead PitchN / e
28 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol29 auto-grouped pins
OK
IPC-7351B Land Pattern29 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteEPAD 2.70×2.70mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (QFN-28(4x4))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
4.00 × 4.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.85mm · e=0.50mm
Pad Size (W × L)Level B
0.28 × 0.80 mm
Pins / Total PadsTopology
29P / 29Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
QFN-28(4x4)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CH379Y (QFN-28(4x4))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH379Y (QFN-28(4x4))?

Manufactured by WCH, the CH379Y is housed in a QFN-28(4x4) package with 29 pins and a 0.50 mm lead pitch. Key pins include: 1 (SS_TXB: Multiplexed I/O & Peripheral Pin SS_TXB (General)), 2 (SS_TXA: Multiplexed I/O & Peripheral Pin SS_TXA (General)), 3 (AVDDK: Power Supply Input (AVDDK — 3.3V / 5.0V Standard Logic)), 4 (SS_RXB: Multiplexed I/O & Peripheral Pin SS_RXB (General)), 5 (SS_RXA: Multiplexed I/O & Peripheral Pin SS_RXA (General)), 6 (XI: Multiplexed I/O & Peripheral Pin XI (RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for CH379Y?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH379Y (QFN-28(4x4)) has a nominal body envelope of 4.00 × 4.00 mm, pitch e = 0.50 mm, and 29 copper pads plus a central exposed thermal pad (EPAD) of 2.70 × 2.70 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH379Y?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH379Y (WCH, QFN-28(4x4)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (29 pins) & CH379 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1SS_TXBDigital_IOSignal terminal SS_TXB (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SS_TXB. Supported peripheral buses: General.
2SS_TXADigital_IOSignal terminal SS_TXA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SS_TXA. Supported peripheral buses: General.
3AVDDKPower_InPrimary positive power supply input (AVDDK) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
4SS_RXBDigital_IOSignal terminal SS_RXB (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SS_RXB. Supported peripheral buses: General.
5SS_RXADigital_IOSignal terminal SS_RXA (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SS_RXA. Supported peripheral buses: General.
6XIDigital_IOSignal terminal XI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XI. Supported peripheral buses: RTC/CLK.
7XODigital_IOSignal terminal XO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XO. Supported peripheral buses: RTC/CLK.
8LED/EX12_ENDigital_IOSignal terminal LED/EX12_EN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: LED/EX12_EN. Supported peripheral buses: General.
9TEST -Digital_IOSignal terminal TEST - (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: TEST -. Supported peripheral buses: General.
1011_SPIMISODigital_IOSignal terminal 11_SPIMISO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: 11_SPIMISO. Supported peripheral buses: SPI.
1113_SPIMOSIDigital_IOSignal terminal 13_SPIMOSI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: 13_SPIMOSI. Supported peripheral buses: SPI.
1212_EX12ENDigital_IOSignal terminal 12_EX12EN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: 12_EX12EN. Supported peripheral buses: General.
1314_CDROMENDigital_IOSignal terminal 14_CDROMEN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: 14_CDROMEN. Supported peripheral buses: General.
14LED -Digital_IOSignal terminal LED - (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: LED -. Supported peripheral buses: General.
15SD_D0Digital_IOSignal terminal SD_D0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SD_D0. Supported peripheral buses: General.
16SD_SCKDigital_IOSignal terminal SD_SCK (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SD_SCK. Supported peripheral buses: SPI.
17GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
18SD_CMDDigital_IOSignal terminal SD_CMD (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SD_CMD. Supported peripheral buses: General.
19SD_D3Digital_IOSignal terminal SD_D3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SD_D3. Supported peripheral buses: General.
20SD_D2Digital_IOSignal terminal SD_D2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: SD_D2. Supported peripheral buses: General.
21VSD_IODigital_IOSignal terminal VSD_IO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VSD_IO. Supported peripheral buses: General.
22VDD33Power_InPrimary positive power supply input (VDD33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
23VOUT_SDPower_InPrimary positive power supply input (VOUT_SD) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
24RESET#Digital_IOActive-low hardware reset terminal (RESET#): pulling this pin Low resets the processor core and peripherals.
25VDD33Power_InPrimary positive power supply input (VDD33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
26HS_DPDigital_IOSignal terminal HS_DP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: HS_DP. Supported peripheral buses: General.
27HS_DMDigital_IOSignal terminal HS_DM (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: HS_DM. Supported peripheral buses: General.
28NCNCSignal terminal NC (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: NC. Supported peripheral buses: General.
29GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
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