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CH32H417MEU6 (QFN-88(10x10)) — Symbol, Footprint IPC-7351B & 3D STEP Model

CH32H417MEU6

WCHID: C54973456QFN-88(10x10) · 89 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · CH32H417MEU6 (QFN-88(10x10))1V DD332PE33PE44PE55PE66V DDK7MDIRN8MDIRP9MDITN10MDITP11V DD3312XI13XO14NRST15PC0/ADC10/HS16PC1/ADC11/HS17IO818IO1919VDDIO20VDD33A21PA0/ADC0/OP322PA4/ADC4/DAC23PA5/ADC5/OP124PB0/ADC8/OP125PB1/ADC9/CMP26PE1027PE1128PE1229PE1330PE1431PE1532PB1033PB1134VIO1835VDDIO36PB1237PB1338PB1439PD1040PD1141PD1242PD1343PD1444PD1545PF089EP88SSRXA87SSRXB86VDD12A85SSTXA84SSTXB83PB9/USB2DM/S82PB8/USB2DP/S81PB4/CC280PB3/CC179VIO1878PF1477PE176PE075PF574PF473PF372PD771PD670PD569PD468PD367PD266PD165PD064PC1263PC1162PC1061PA1560PA1459VDD3358PA1357PA12/OTG_DP56PA11/OTG_DM55PA10/OTG_ID54PA9/OTG_VBUS53PC952PC851PC750PC649VIO1848VDDK47PF246PF1Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.863.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5mm
2. 2D FOOTPRINT
1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889E=10.00mm · Pitch e=0.40mmD=10.00mm-8-6-4-20246886420-2-4-6-8mm
3. 3D CAD MODEL
Package Body: 10.00mm × 10.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (89/89)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1V DD33I/OMultiplexed I/O & Peripheral Pin V DD33 (General)
2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
3PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
4PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
5PE6I/OMultiplexed I/O & Peripheral Pin PE6 (General)
6V DDKI/OMultiplexed I/O & Peripheral Pin V DDK (General)
7MDIRNI/OMultiplexed I/O & Peripheral Pin MDIRN (General)
8MDIRPI/OMultiplexed I/O & Peripheral Pin MDIRP (General)
9MDITNI/OMultiplexed I/O & Peripheral Pin MDITN (General)
10MDITPI/OMultiplexed I/O & Peripheral Pin MDITP (General)
11V DD33I/OMultiplexed I/O & Peripheral Pin V DD33 (General)
12XII/OMultiplexed I/O & Peripheral Pin XI (RTC/CLK)
13XOI/OMultiplexed I/O & Peripheral Pin XO (RTC/CLK)
14NRSTISystem Enable & Hardware Reset (NRST)
15PC0/ADC10/HSADC0I/OMultiplexed I/O & Peripheral Pin PC0/ADC10/HSADC0 (ADC)
16PC1/ADC11/HSADC1I/OMultiplexed I/O & Peripheral Pin PC1/ADC11/HSADC1 (ADC)
17IO8I/OGPIO8 / RTC_GPIO8 / TOUCH8 / ADC1_CH7 / SUBSPICS1
18IO19I/OGPIO19 / RTC_GPIO19 / USB_D- / U1RTS / ADC2_CH8
19VDDIOPowerPower Supply Input (VDDIO — 3.3V / 5.0V Standard Logic)
20VDD33APowerPower Supply Input (VDD33A — 3.3V / 5.0V Standard Logic)
21PA0/ADC0/OP3_O0I/OMultiplexed I/O & Peripheral Pin PA0/ADC0/OP3_O0 (ADC)
22PA4/ADC4/DAC1I/OMultiplexed I/O & Peripheral Pin PA4/ADC4/DAC1 (ADC, DAC)
23PA5/ADC5/OP1_O1/DAC2I/OMultiplexed I/O & Peripheral Pin PA5/ADC5/OP1_O1/DAC2 (ADC, DAC)
24PB0/ADC8/OP1_P0/CMP_P0I/OMultiplexed I/O & Peripheral Pin PB0/ADC8/OP1_P0/CMP_P0 (ADC)
25PB1/ADC9/CMP_N0/OP1_N0I/OMultiplexed I/O & Peripheral Pin PB1/ADC9/CMP_N0/OP1_N0 (ADC)
26PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
27PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
28PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
29PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
30PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
31PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
32PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
33PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
34VIO18I/OMultiplexed I/O & Peripheral Pin VIO18 (General)
35VDDIOPowerPower Supply Input (VDDIO — 3.3V / 5.0V Standard Logic)
36PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
37PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
38PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
39PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
40PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
41PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
42PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
43PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
44PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
45PF0I/OMultiplexed I/O & Peripheral Pin PF0 (General)
46PF1I/OMultiplexed I/O & Peripheral Pin PF1 (General)
47PF2I/OMultiplexed I/O & Peripheral Pin PF2 (General)
48VDDKPowerPower Supply Input (VDDK — 3.3V / 5.0V Standard Logic)
49VIO18I/OMultiplexed I/O & Peripheral Pin VIO18 (General)
50PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
51PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
52PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
53PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
54PA9/OTG_VBUSPowerPower Supply Input (PA9/OTG_VBUS — 3.3V / 5.0V Standard Logic)
55PA10/OTG_IDI/OMultiplexed I/O & Peripheral Pin PA10/OTG_ID (General)
56PA11/OTG_DMI/OMultiplexed I/O & Peripheral Pin PA11/OTG_DM (General)
57PA12/OTG_DPI/OMultiplexed I/O & Peripheral Pin PA12/OTG_DP (General)
58PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
59VDD33PowerPower Supply Input (VDD33 — 3.3V / 5.0V Standard Logic)
60PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
61PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
62PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
63PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
64PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
65PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
66PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
67PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
68PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
69PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
70PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
71PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
72PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
73PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
74PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
75PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
76PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
77PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
78PF14I/OMultiplexed I/O & Peripheral Pin PF14 (General)
79VIO18I/OMultiplexed I/O & Peripheral Pin VIO18 (General)
80PB3/CC1I/OMultiplexed I/O & Peripheral Pin PB3/CC1 (General)
81PB4/CC2I/OMultiplexed I/O & Peripheral Pin PB4/CC2 (General)
82PB8/USB2DP/SWCLKI/OMultiplexed I/O & Peripheral Pin PB8/USB2DP/SWCLK (USB, SWD/JTAG)
83PB9/USB2DM/SWDIOI/OMultiplexed I/O & Peripheral Pin PB9/USB2DM/SWDIO (USB, SWD/JTAG)
84SSTXBI/OMultiplexed I/O & Peripheral Pin SSTXB (General)
85SSTXAI/OMultiplexed I/O & Peripheral Pin SSTXA (General)
86VDD12APowerPower Supply Input (VDD12A — 3.3V / 5.0V Standard Logic)
87SSRXBI/OMultiplexed I/O & Peripheral Pin SSRXB (General)
88SSRXAI/OMultiplexed I/O & Peripheral Pin SSRXA (General)
89EPGNDExposed Thermal & Ground Pad (EP)
PIN 1 V DD33
I/O
Multiplexed I/O & Peripheral Pin V DD33 (General)
Design note: V - DD33
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 5 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: CH32H417MEU6 (WCH · QFN-88(10x10))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
CH32H417MEU6 (QFN-88(10x10)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
CH32H417MEU6 (QFN-88(10x10)) - 2. Standard Pinout (Top View)
True package pinout (89 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
CH32H417MEU6 (QFN-88(10x10)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
CH32H417MEU6 (QFN-88(10x10)) - 4. Package Dimensions (D×E×A)
QFN-88(10x10) · 10.00×10.00mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
CH32H417MEU6 (QFN-88(10x10)) - 5. Recommended Land Pattern
IPC-7351B Footprint (89 Pads)Expand ›
6. Application SchematicSCHEMATIC
CH32H417MEU6 (QFN-88(10x10)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (5 figures · Page 1/1)
Showing 1–5 of 5 uncropped original figures for CH32H417
P127 · p127_fig01EXACT PACKAGE
CH32H417MEU6 (QFN-88(10x10)) — CH32H417、H416、H415 数据手册 https://wch.cn
CH32H417、H416、H415 数据手册 https://wch.cn
P24 · p24_fig011643×1622px
CH32H417MEU6 (QFN-88(10x10)) — 2.1 引脚排列 2.1.1 CH32H417 引脚排列 | 49 | 42 | 40 39 | 41 | 37 | 54 | 38 | 45 | 48 | 34 | 47 | 43 | 46 | 50 51 52 | 44 | 53 | 36 | 33 | 35 | 58 57 56 55 | 59 60 61 62 63 64 | 65 | 71 | 68 69 | 79 | 70 | 83 | 72 73 74 75 76 77 78 | 67 66 | 80 81 |
2.1 引脚排列 2.1.1 CH32H417 引脚排列 | 49 | 42 | 40 39 | 41 | 37 | 54 | 38 | 45 | 48 | 34 | 47 | 43 | 46 | 50 51 52 | 44 | 53 | 36 | 33 | 35 | 58 57 56 55 | 59 60 61 62 63 64 | 65 | 71 | 68 69 | 79 | 70 | 83 | 72 73 74 75 76 77 78 | 67 66 | 80 81 |
P24 · p24_fig01P24
CH32H417MEU6 (QFN-88(10x10)) — Datasheet Page 24 (p24_fig01)
Datasheet Page 24 (p24_fig01)
P26 · p26_fig011114×1115px
CH32H417MEU6 (QFN-88(10x10)) — 31
31
P26 · p26_fig021069×1070px
CH32H417MEU6 (QFN-88(10x10)) — 示例：ADC_:(ADC0:ADC_IN0)
示例：ADC_:(ADC0:ADC_IN0)

Technical Specifications & Part Details (CH32H417MEU6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:CH32H417MEU6 (QFN-88(10x10)) is a 88-pin standard electronic & interconnect component featuring a 10.00 × 10.00 × 0.90 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, SDIO, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
150MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
10.00 × 10.00 × 0.90 mm (A1=0.03 mm)
Package family: QFN (QFN-88(10x10))
Pin Count & Lead PitchN / e
88 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, SDIO, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol89 auto-grouped pins
OK
IPC-7351B Land Pattern89 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteEPAD 7.70×7.70mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — CH32H417 (2)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (QFN-88(10x10))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
10.00 × 10.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.90mm · e=0.40mm
Pad Size (W × L)Level B
0.28 × 0.80 mm
Pins / Total PadsTopology
89P / 89Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
QFN-88(10x10)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — CH32H417MEU6 (QFN-88(10x10))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of CH32H417MEU6 (QFN-88(10x10))?

Manufactured by WCH, the CH32H417MEU6 is housed in a QFN-88(10x10) package with 89 pins and a 0.40 mm lead pitch. Key pins include: 1 (V DD33: Multiplexed I/O & Peripheral Pin V DD33 (General)), 2 (PE3: Multiplexed I/O & Peripheral Pin PE3 (General)), 3 (PE4: Multiplexed I/O & Peripheral Pin PE4 (General)), 4 (PE5: Multiplexed I/O & Peripheral Pin PE5 (General)), 5 (PE6: Multiplexed I/O & Peripheral Pin PE6 (General)), 6 (V DDK: Multiplexed I/O & Peripheral Pin V DDK (General)).

What are the IPC-7351B PCB Footprint dimensions for CH32H417MEU6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), CH32H417MEU6 (QFN-88(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.40 mm, and 89 copper pads plus a central exposed thermal pad (EPAD) of 7.70 × 7.70 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for CH32H417MEU6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for CH32H417MEU6 (WCH, QFN-88(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (89 pins) & CH32H417 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1V DD33Digital_IOSignal terminal V DD33 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: V DD33. Supported peripheral buses: General.
2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
3PE4Digital_IOSignal terminal PE4 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
4PE5Digital_IOSignal terminal PE5 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
5PE6Digital_IOSignal terminal PE6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General.
6V DDKDigital_IOSignal terminal V DDK (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: V DDK. Supported peripheral buses: General.
7MDIRNDigital_IOSignal terminal MDIRN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: MDIRN. Supported peripheral buses: General.
8MDIRPDigital_IOSignal terminal MDIRP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: MDIRP. Supported peripheral buses: General.
9MDITNDigital_IOSignal terminal MDITN (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: MDITN. Supported peripheral buses: General.
10MDITPDigital_IOSignal terminal MDITP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: MDITP. Supported peripheral buses: General.
11V DD33Digital_IOSignal terminal V DD33 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: V DD33. Supported peripheral buses: General.
12XIDigital_IOSignal terminal XI (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XI. Supported peripheral buses: RTC/CLK.
13XODigital_IOSignal terminal XO (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: XO. Supported peripheral buses: RTC/CLK.
14NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
15PC0/ADC10/HSADC0AnalogSignal terminal PC0/ADC10/HSADC0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC0/ADC10/HSADC0. Supported peripheral buses: ADC.
16PC1/ADC11/HSADC1AnalogSignal terminal PC1/ADC11/HSADC1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC1/ADC11/HSADC1. Supported peripheral buses: ADC.
17IO8Digital_IOGPIO8 / RTC_GPIO8 / TOUCH8 / ADC1_CH7 / SUBSPICS1
18IO19Digital_IOGPIO19 / RTC_GPIO19 / USB_D- / U1RTS / ADC2_CH8
19VDDIOPower_InPrimary positive power supply input (VDDIO) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
20VDD33APower_InPrimary positive power supply input (VDD33A) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
21PA0/ADC0/OP3_O0AnalogSignal terminal PA0/ADC0/OP3_O0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA0/ADC0/OP3_O0. Supported peripheral buses: ADC.
22PA4/ADC4/DAC1AnalogSignal terminal PA4/ADC4/DAC1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA4/ADC4/DAC1. Supported peripheral buses: ADC, DAC.
23PA5/ADC5/OP1_O1/DAC2AnalogSignal terminal PA5/ADC5/OP1_O1/DAC2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA5/ADC5/OP1_O1/DAC2. Supported peripheral buses: ADC, DAC.
24PB0/ADC8/OP1_P0/CMP_P0AnalogSignal terminal PB0/ADC8/OP1_P0/CMP_P0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB0/ADC8/OP1_P0/CMP_P0. Supported peripheral buses: ADC.
25PB1/ADC9/CMP_N0/OP1_N0AnalogSignal terminal PB1/ADC9/CMP_N0/OP1_N0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB1/ADC9/CMP_N0/OP1_N0. Supported peripheral buses: ADC.
26PE10Digital_IOSignal terminal PE10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE10. Supported peripheral buses: General.
27PE11Digital_IOSignal terminal PE11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE11. Supported peripheral buses: General.
28PE12Digital_IOSignal terminal PE12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE12. Supported peripheral buses: General.
29PE13Digital_IOSignal terminal PE13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE13. Supported peripheral buses: General.
30PE14Digital_IOSignal terminal PE14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE14. Supported peripheral buses: General.
31PE15Digital_IOSignal terminal PE15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PE15. Supported peripheral buses: General.
32PB10Digital_IOSignal terminal PB10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
33PB11Digital_IOSignal terminal PB11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
34VIO18Digital_IOSignal terminal VIO18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VIO18. Supported peripheral buses: General.
35VDDIOPower_InPrimary positive power supply input (VDDIO) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
36PB12Digital_IOSignal terminal PB12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
37PB13Digital_IOSignal terminal PB13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
38PB14Digital_IOSignal terminal PB14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
39PD10Digital_IOSignal terminal PD10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD10. Supported peripheral buses: General.
40PD11Digital_IOSignal terminal PD11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD11. Supported peripheral buses: General.
41PD12Digital_IOSignal terminal PD12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD12. Supported peripheral buses: General.
42PD13Digital_IOSignal terminal PD13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD13. Supported peripheral buses: General.
43PD14Digital_IOSignal terminal PD14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD14. Supported peripheral buses: General.
44PD15Digital_IOSignal terminal PD15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PD15. Supported peripheral buses: General.
45PF0Digital_IOSignal terminal PF0 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF0. Supported peripheral buses: General.
46PF1Digital_IOSignal terminal PF1 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.
47PF2Digital_IOSignal terminal PF2 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PF2. Supported peripheral buses: General.
48VDDKPower_InPrimary positive power supply input (VDDK) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
49VIO18Digital_IOSignal terminal VIO18 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: VIO18. Supported peripheral buses: General.
50PC6Digital_IOSignal terminal PC6 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
51PC7Digital_IOSignal terminal PC7 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
52PC8Digital_IOSignal terminal PC8 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
53PC9Digital_IOSignal terminal PC9 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC9. Supported peripheral buses: General.
54PA9/OTG_VBUSPower_InPrimary positive power supply input (PA9/OTG_VBUS) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
55PA10/OTG_IDDigital_IOSignal terminal PA10/OTG_ID (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA10/OTG_ID. Supported peripheral buses: General.
56PA11/OTG_DMDigital_IOSignal terminal PA11/OTG_DM (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA11/OTG_DM. Supported peripheral buses: General.
57PA12/OTG_DPDigital_IOSignal terminal PA12/OTG_DP (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA12/OTG_DP. Supported peripheral buses: General.
58PA13Digital_IOSignal terminal PA13 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
59VDD33Power_InPrimary positive power supply input (VDD33) operating in the 3.3V / 5.0V Standard Logic domain (Max rating: 5.5V).
60PA14Digital_IOSignal terminal PA14 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
61PA15Digital_IOSignal terminal PA15 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
62PC10Digital_IOSignal terminal PC10 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
63PC11Digital_IOSignal terminal PC11 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
64PC12Digital_IOSignal terminal PC12 (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
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