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2N2907A (TO-18) — Symbol, Footprint IPC-7351B & 3D STEP Model

2N2907A

MICROCHIPTO-18 · 3 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · 2N2907A (TO-18)1E2B3CHGrid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.210.25.10-5.1-10.2mm
2. 2D FOOTPRINT
123E=5.49mm · Pitch e=0.50mmD=5.49mm-4-3-2-10123443210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 5.49mm × 5.49mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (3/3)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1EI/OMultiplexed I/O & Peripheral Pin E (General)
2BI/OMultiplexed I/O & Peripheral Pin B (General)
3CHI/OMultiplexed I/O & Peripheral Pin CH (General)
PIN 1 E
I/O
Multiplexed I/O & Peripheral Pin E (General)
Design note: Signal terminal E (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: E. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Extracted Drawings Gallery (6 Standard Drawings + 6 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
1. Realistic 3D PackageREPRESENTATIVE
2N2907A (TO-18) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
2N2907A (TO-18) - 2. Standard Pinout (Top View)
True package pinout (3 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
2N2907A (TO-18) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
2N2907A (TO-18) - 4. Package Dimensions (D×E×A)
TO-18 · 5.49×5.49mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
2N2907A (TO-18) - 5. Recommended Land Pattern
IPC-7351B Footprint (3 Pads)Expand ›
6. Application SchematicSCHEMATIC
2N2907A (TO-18) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (6 figures · Page 1/1)
Showing 1–6 of 6 uncropped original figures for 2N2907A
P1 · p01_fig012022×2296px
2N2907A (TO-18) — T4-LDS-0059 Rev. 2 (100247) Page 1 of 6
T4-LDS-0059 Rev. 2 (100247) Page 1 of 6
P2 · p02_fig012030×2074px
2N2907A (TO-18) — ELECTRICAL CHARACTERISTICS (TA = +25°C, unless otherwise noted)
ELECTRICAL CHARACTERISTICS (TA = +25°C, unless otherwise noted)
P3 · p03_fig01653×1067px
2N2907A (TO-18) — PACKAGE DIMENSIONS
PACKAGE DIMENSIONS
P4 · p04_fig011561×816px
2N2907A (TO-18) — 6 Lake Street, Lawrence, MA 01841 1-800-446-1158 / (978) 620-2600 / Fax: (978) 689-0803 Website: http: //www.microsemi.com BL “| = CH | y “J a > . BK Ab? COLLECTORO— —C) EMITTER UA . : 1— SEATING PLANE = a2 ——| LH BASE PIN 1 IDENTIFIER 5 Li
6 Lake Street, Lawrence, MA 01841 1-800-446-1158 / (978) 620-2600 / Fax: (978) 689-0803 Website: http: //www.microsemi.com BL “| = CH | y “J a > . BK Ab? COLLECTORO— —C) EMITTER UA . : 1— SEATING PLANE = a2 ——| LH BASE PIN 1 IDENTIFIER 5 Li
P4 · p04_fig01P4
2N2907A (TO-18) — Datasheet Page 4 (p04_fig01)
Datasheet Page 4 (p04_fig01)
P5 · p05_fig012042×1768px
2N2907A (TO-18) — FIGURE 3. Physical dimensions, surface mount (UB version) T4-LDS-0059 Rev. 2 (100247) Page 5 of 6
FIGURE 3. Physical dimensions, surface mount (UB version) T4-LDS-0059 Rev. 2 (100247) Page 5 of 6

Technical Specifications & Part Details (2N2907A)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:2N2907A (TO-18) is a 3-pin standard electronic & interconnect component featuring a 5.49 × 5.49 × 1.00 mm mechanical envelope (lead pitch e = 0.00 mm). Rated for 1.8V ~ 5.5V (Theo Datasheet) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated Standard I/O / Passive interfaces.
Operating Supply VoltageV_CC / V_DD
1.8V ~ 5.5V (Theo Datasheet)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
1.0kHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
5.49 × 5.49 × 1.00 mm (A1=0.02 mm)
Package family: OTHER (TO-18)
Pin Count & Lead PitchN / e
3 Pins
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Standard I/O / Passive
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol3 auto-grouped pins
OK
IPC-7351B Land Pattern3 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (TO-18)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
5.49 × 5.49 mm
Height (A) & Pitch (e)IPC-7351B
A=1.00mm · e=0.50mm
Pad Size (W × L)Level B
0.40 × 0.90 mm
Pins / Total PadsTopology
3P / 3Pad (CUSTOM_ARRAY)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
TO-18
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — 2N2907A (TO-18)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of 2N2907A (TO-18)?

Manufactured by MICROCHIP, the 2N2907A is housed in a TO-18 package with 3 pins and a 0.50 mm lead pitch. Key pins include: 1 (E: Multiplexed I/O & Peripheral Pin E (General)), 2 (B: Multiplexed I/O & Peripheral Pin B (General)), 3 (CH: Multiplexed I/O & Peripheral Pin CH (General)).

What are the IPC-7351B PCB Footprint dimensions for 2N2907A?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), 2N2907A (TO-18) has a nominal body envelope of 5.49 × 5.49 mm, pitch e = 0.50 mm, and 3 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for 2N2907A?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for 2N2907A (MICROCHIP, TO-18) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (3 pins) & 2N2907A Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1EDigital_IOSignal terminal E (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: E. Supported peripheral buses: General.
2BDigital_IOSignal terminal B (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: B. Supported peripheral buses: General.
3CHDigital_IOSignal terminal CH (I/O, 3.3V / 5.0V Standard Logic domain). Multiplexed alternate functions: CH. Supported peripheral buses: General.
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