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STM32U585QII6 (UFBGA-132(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32U585QII6

STID: C5271048UFBGA-132(7x7) · 132 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32U585QII6 (UFBGA-132(7x7))A1PE5A2PE3A3PE1A4PB9A5PB6A6PG12A7PD6A8PD5A9PD2A10PC11A11PA15A12VDDUSBB1VBATB2PE4B3PE2B4PG15B5PH3-BOOT0B6PB4B7PG9B8PD4B9PD1B10PC12B11PC10B12PA12C1PC14-OSC32_IC2PE6C3PC13C4PE0C5PB8C6PB3C7PG10C8PD3C9PD0C10PA13C11PA14C12PA11D1PC15-OSC32_OD2PF0D3PF3D4VDDD5PB7D6PB5D7PD7D8VDDIO2D9VDDD10PA9D11PA10D12PA8E1PF2E2PF1E3PF4E4VSSE9VSSE10PC7E11PC9E12PC8F1PH0-OSC_INF2PF5F3PC2F4PC3F6VSSF7VDDF9PG6F10PG7F11PC6F12PG8M12PD10M11PG11M10PG13M9PG14M8PE13M7PE9M6PG0M5PF13M4PB0M3PC4M2OPAMP2_VINMM1PA5L12PD8L11PB12L10VCAPL9PB11L8PE15L7PE11L6PF15L5PF12L4PB1L3PA4L2PA6L1PA3K12PB15K11PB14K10PB13K9PB10K8PE14K7PE7K6PG1K5PF11K4PB2K3PA7K2PA2K1VDDAJ12PD12J11PD11J10PD9J9VDDJ8PE12J7PE10J6PE8J5PF14J4VDDJ3PC5J2PA0J1VREF+H12PD15H11PD13H10PD14H9VSSH4VSSH3OPAMP1_VINMH2PC0H1VSSAG12PG5G11PG3G10PG2G9PG4G7VSSG6VDDG4PA1G3PC1G2NRSTG1PH1-OSC_OUTGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.888.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9mm
2. 2D FOOTPRINT
A1A2A3A4A5A6A7A8A9A10A11A12B1B2B3B4B5B6B7B8B9B10B11B12C1C2C3C4C5C6C7C8C9C10C11C12D1D2D3D4D5D6D7D8D9D10D11D12E1E2E3E4E9E10E11E12F1F2F3F4F6F7F9F10F11F12G1G2G3G4G6G7G9G10G11G12H1H2H3H4H9H10H11H12J1J2J3J4J5J6J7J8J9J10J11J12K1K2K3K4K5K6K7K8K9K10K11K12L1L2L3L4L5L6L7L8L9L10L11L12M1M2M3M4M5M6M7M8M9M10M11M12E=7.00mm · Pitch e=0.50mmD=7.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (132/132)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
A2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
A3PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
A4PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
A5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
A6PG12I/OMultiplexed I/O & Peripheral Pin PG12 (General)
A7PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
A8PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
A9PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
A10PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
A11PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
A12VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
B1VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
B2PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
B3PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
B4PG15I/OMultiplexed I/O & Peripheral Pin PG15 (General)
B5PH3-BOOT0I/OMultiplexed I/O & Peripheral Pin PH3-BOOT0 (General)
B6PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
B7PG9I/OMultiplexed I/O & Peripheral Pin PG9 (General)
B8PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
B9PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
B10PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
B11PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
B12PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
C1PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
C2PE6I/OMultiplexed I/O & Peripheral Pin PE6 (General)
C3PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
C4PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
C5PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
C6PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
C7PG10I/OMultiplexed I/O & Peripheral Pin PG10 (General)
C8PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
C9PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
C10PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
C11PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
C12PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
D1PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
D2PF0I/OMultiplexed I/O & Peripheral Pin PF0 (General)
D3PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
D4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D5PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
D6PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
D7PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
D8VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
D9VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D10PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
D11PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
D12PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
E1PF2I/OMultiplexed I/O & Peripheral Pin PF2 (General)
E2PF1I/OMultiplexed I/O & Peripheral Pin PF1 (General)
E3PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
E4VSSGNDGround Reference Pin (VSS)
E9VSSGNDGround Reference Pin (VSS)
E10PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
E11PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
E12PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
F1PH0-OSC_INI/OMultiplexed I/O & Peripheral Pin PH0-OSC_IN (RTC/CLK)
F2PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
F3PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
F4PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
F6VSSGNDGround Reference Pin (VSS)
F7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
F9PG6I/OMultiplexed I/O & Peripheral Pin PG6 (General)
F10PG7I/OMultiplexed I/O & Peripheral Pin PG7 (General)
F11PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
F12PG8I/OMultiplexed I/O & Peripheral Pin PG8 (General)
G1PH1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PH1-OSC_OUT (RTC/CLK)
G2NRSTISystem Enable & Hardware Reset (NRST)
G3PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
G4PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
G6VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G7VSSGNDGround Reference Pin (VSS)
G9PG4I/OMultiplexed I/O & Peripheral Pin PG4 (General)
G10PG2I/OMultiplexed I/O & Peripheral Pin PG2 (General)
G11PG3I/OMultiplexed I/O & Peripheral Pin PG3 (General)
G12PG5I/OMultiplexed I/O & Peripheral Pin PG5 (General)
H1VSSAGNDGround Reference Pin (VSSA)
H2PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
H3OPAMP1_VINMPowerPower Supply Input (OPAMP1_VINM — 3.3V VDD (Max 4.0V))
H4VSSGNDGround Reference Pin (VSS)
H9VSSGNDGround Reference Pin (VSS)
H10PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
H11PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
H12PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
J1VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (General)
J2PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
J3PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
J4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J5PF14I/OMultiplexed I/O & Peripheral Pin PF14 (General)
J6PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
J7PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
J8PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
J9VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J10PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
J11PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
J12PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
K1VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
K2PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
K3PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
K4PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
K5PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
K6PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
K7PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
K8PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
K9PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
K10PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
K11PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
K12PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
L1PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
L2PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
L3PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
L4PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
L5PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
L6PF15I/OMultiplexed I/O & Peripheral Pin PF15 (General)
L7PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
L8PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
L9PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
L10VCAPI/OMultiplexed I/O & Peripheral Pin VCAP (General)
L11PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
L12PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
M1PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
M2OPAMP2_VINMPowerPower Supply Input (OPAMP2_VINM — 3.3V VDD (Max 4.0V))
M3PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
M4PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
M5PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
M6PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
M7PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
M8PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
M9PG14I/OMultiplexed I/O & Peripheral Pin PG14 (General)
M10PG13I/OMultiplexed I/O & Peripheral Pin PG13 (General)
M11PG11I/OMultiplexed I/O & Peripheral Pin PG11 (General)
M12PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
PIN A1 PE5
I/O
Multiplexed I/O & Peripheral Pin PE5 (General)
Design note: Signal terminal PE5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32U585QII6 (ST · UFBGA-132(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32U585QII6 (UFBGA-132(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32U585QII6 (UFBGA-132(7x7)) - 2. Standard Pinout (Top View)
True package pinout (132 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32U585QII6 (UFBGA-132(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32U585QII6 (UFBGA-132(7x7)) - 4. Package Dimensions (D×E×A)
UFBGA-132(7x7) · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32U585QII6 (UFBGA-132(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (132 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32U585QII6 (UFBGA-132(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (STM32U585QII6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32U585QII6 (UFBGA-132(7x7)) is a 132-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 0.58 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 0.58 mm (A1=0.20 mm)
Package family: BGA (UFBGA-132(7x7))
Pin Count & Lead PitchN / e
132 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol132 auto-grouped pins
OK
IPC-7351B Land Pattern132 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFBGA-132(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.58mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 0.30 mm
Pins / Total PadsTopology
132P / 132Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-132(7x7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32U585QII6 (UFBGA-132(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32U585QII6 (UFBGA-132(7x7))?

Manufactured by ST, the STM32U585QII6 is housed in a UFBGA-132(7x7) package with 132 pins and a 0.50 mm lead pitch. Key pins include: A1 (PE5: Multiplexed I/O & Peripheral Pin PE5 (General)), A2 (PE3: Multiplexed I/O & Peripheral Pin PE3 (General)), A3 (PE1: Multiplexed I/O & Peripheral Pin PE1 (General)), A4 (PB9: Multiplexed I/O & Peripheral Pin PB9 (General)), A5 (PB6: Multiplexed I/O & Peripheral Pin PB6 (General)), A6 (PG12: Multiplexed I/O & Peripheral Pin PG12 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32U585QII6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32U585QII6 (UFBGA-132(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 132 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32U585QII6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32U585QII6 (ST, UFBGA-132(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (132 pins) & STM32U585 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
A2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
A3PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
A4PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
A5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
A6PG12Digital_IOSignal terminal PG12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG12. Supported peripheral buses: General.
A7PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General.
A8PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
A9PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
A10PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
A11PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
A12VDDUSBPower_InPrimary positive power supply input (VDDUSB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B1VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B2PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
B3PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
B4PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: General.
B5PH3-BOOT0Digital_IOSignal terminal PH3-BOOT0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH3-BOOT0. Supported peripheral buses: General.
B6PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
B7PG9Digital_IOSignal terminal PG9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG9. Supported peripheral buses: General.
B8PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
B9PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
B10PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
B11PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
B12PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
C1PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
C2PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General.
C3PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
C4PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
C5PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
C6PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
C7PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General.
C8PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
C9PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
C10PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
C11PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
C12PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
D1PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
D2PF0Digital_IOSignal terminal PF0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF0. Supported peripheral buses: General.
D3PF3Digital_IOSignal terminal PF3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: General.
D4VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D5PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
D6PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
D7PD7Digital_IOSignal terminal PD7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General.
D8VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D9VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D10PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
D11PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
D12PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
E1PF2Digital_IOSignal terminal PF2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF2. Supported peripheral buses: General.
E2PF1Digital_IOSignal terminal PF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1. Supported peripheral buses: General.
E3PF4Digital_IOSignal terminal PF4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: General.
E4VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E9VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E10PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
E11PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: General.
E12PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
F1PH0-OSC_INDigital_IOSignal terminal PH0-OSC_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH0-OSC_IN. Supported peripheral buses: RTC/CLK.
F2PF5Digital_IOSignal terminal PF5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF5. Supported peripheral buses: General.
F3PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: General.
F4PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: General.
F6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F7VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
F9PG6Digital_IOSignal terminal PG6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG6. Supported peripheral buses: General.
F10PG7Digital_IOSignal terminal PG7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG7. Supported peripheral buses: General.
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