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STM32U575OIY6QTR (WLCSP-90) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32U575OIY6QTR

STID: C5271033WLCSP-90 · 90 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32U575OIY6QTR (WLCSP-90)A1VDDA3PC11A5PD2A7PG10A9PG14A11VDDIO2A13PB6A15PB9A17VDD11B2VSSB4PC12B6PD5B8PG12B10VSSB12PB7B14PB8B16VSSB18VDDC1VDDUSBC3PA14(JTCK/ SC5PD0C7PG9C9PG13C11PB4(NJTRST)C13PH3BOOT0 -C15PE3C17VBATD2PA12D4PA13(JTMS/ SD6PD1D8PD4D10PB3 (JTDO/TRD12PB5D14PE4D16PE6D18PC14 - OSC32E1PA10E3PA11E5PA15(JTDI)E7PC10E9PG11E11PA9E13PE5E15PC13E17IOE17K18VSSK16VDDK14PA7K12PB0K10PB2K8PE9K6VLXSMPSK4VDDSMPSK2VDD11J17VDDAJ15PA2J13PA1J11PB1J9PE8J7PE10J5VSSSMPSJ3VSSJ1VDDH18VSSAH16VREF+H14PA4H12PA5H10PA3H8PE7H6PB10H4PB14H2PB13G17NRSTG15PC1G13PC3G11PA0G9PC5G7PC6G5PB15G3PD15G1PD14F18PH0OSC IN -_F16PH1OSC OUT -F14PC0F12PC2F10PA6F8PA8F6PC9F4PC7F2PC8Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.863.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5mm
2. 2D FOOTPRINT
A1A3A5A7A9A11A13A15A17B2B4B6B8B10B12B14B16B18C1C3C5C7C9C11C13C15C17D2D4D6D8D10D12D14D16D18E1E3E5E7E9E11E13E15E17F2F4F6F8F10F12F14F16F18G1G3G5G7G9G11G13G15G17H2H4H6H8H10H12H14H16H18J1J3J5J7J9J11J13J15J17K2K4K6K8K10K12K14K16K18E=4.20mm · Pitch e=0.40mmD=4.00mm-4-3-2-10123443210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 4.20mm × 4.00mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (90/90)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A3PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART)
A5PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
A7PG10I/OMultiplexed I/O & Peripheral Pin PG10 (UART, SPI)
A9PG14I/OMultiplexed I/O & Peripheral Pin PG14 (General)
A11VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
A13PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, I2C)
A15PB9I/OMultiplexed I/O & Peripheral Pin PB9 (I2C, PWM)
A17VDD11PowerPower Supply Input (VDD11 — 3.3V VDD (Max 4.0V))
B2VSSGNDGround Reference Pin (VSS)
B4PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
B6PD5I/OMultiplexed I/O & Peripheral Pin PD5 (SPI)
B8PG12I/OMultiplexed I/O & Peripheral Pin PG12 (UART, SPI, I2C)
B10VSSGNDGround Reference Pin (VSS)
B12PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C)
B14PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
B16VSSGNDGround Reference Pin (VSS)
B18VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
C1VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
C3PA14(JTCK/ SWCLK)I/OMultiplexed I/O & Peripheral Pin PA14(JTCK/ SWCLK) (I2C, SWD/JTAG)
C5PD0I/OMultiplexed I/O & Peripheral Pin PD0 (PWM)
C7PG9I/OMultiplexed I/O & Peripheral Pin PG9 (UART, SPI)
C9PG13I/OMultiplexed I/O & Peripheral Pin PG13 (UART, I2C)
C11PB4(NJTRST)I/OMultiplexed I/O & Peripheral Pin PB4(NJTRST) (UART, SPI, SWD/JTAG)
C13PH3BOOT0 -I/OMultiplexed I/O & Peripheral Pin PH3BOOT0 - (General)
C15PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
C17VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
D2PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART)
D4PA13(JTMS/ SWDIO)I/OMultiplexed I/O & Peripheral Pin PA13(JTMS/ SWDIO) (SWD/JTAG)
D6PD1I/OMultiplexed I/O & Peripheral Pin PD1 (SPI)
D8PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART, SPI)
D10PB3 (JTDO/TRACES WO)I/OMultiplexed I/O & Peripheral Pin PB3 (JTDO/TRACES WO) (UART, SPI, I2C, SWD/JTAG)
D12PB5I/OMultiplexed I/O & Peripheral Pin PB5 (UART, SPI, I2C)
D14PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
D16PE6I/OMultiplexed I/O & Peripheral Pin PE6 (I2C)
D18PC14 - OSC32_IN (PC14)I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)
E1PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART)
E3PA11I/OMultiplexed I/O & Peripheral Pin PA11 (SPI, PWM)
E5PA15(JTDI)I/OMultiplexed I/O & Peripheral Pin PA15(JTDI) (UART, SPI, SWD/JTAG)
E7PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
E9PG11I/OMultiplexed I/O & Peripheral Pin PG11 (SPI)
E11PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, PWM)
E13PE5I/OMultiplexed I/O & Peripheral Pin PE5 (SPI)
E15PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
E17IOE17I/OGeneral Purpose Digital I/O Pin IOE17
F2PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
F4PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
F6PC9I/OMultiplexed I/O & Peripheral Pin PC9 (PWM)
F8PA8I/OMultiplexed I/O & Peripheral Pin PA8 (SPI, RTC/CLK)
F10PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC)
F12PC2I/OMultiplexed I/O & Peripheral Pin PC2 (ADC)
F14PC0I/OMultiplexed I/O & Peripheral Pin PC0 (SPI, I2C, ADC)
F16PH1OSC OUT -_ (PH1)I/OMultiplexed I/O & Peripheral Pin PH1OSC OUT -_ (PH1) (RTC/CLK)
F18PH0OSC IN -_ (PH0)I/OMultiplexed I/O & Peripheral Pin PH0OSC IN -_ (PH0) (RTC/CLK)
G1PD14I/OMultiplexed I/O & Peripheral Pin PD14 (PWM)
G3PD15I/OMultiplexed I/O & Peripheral Pin PD15 (PWM)
G5PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, RTC/CLK)
G7PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
G9PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
G11PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, SPI, ADC, PWM)
G13PC3I/OMultiplexed I/O & Peripheral Pin PC3 (ADC)
G15PC1I/OMultiplexed I/O & Peripheral Pin PC1 (SPI, I2C, ADC)
G17NRSTISystem Enable & Hardware Reset (NRST)
H2PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, I2C, PWM)
H4PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, PWM)
H6PB10I/OMultiplexed I/O & Peripheral Pin PB10 (SPI, I2C, PWM)
H8PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
H10PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
H12PA5I/OMultiplexed I/O & Peripheral Pin PA5 (UART, SPI, ADC, DAC, PWM)
H14PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
H16VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
H18VSSAGNDGround Reference Pin (VSSA)
J1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J3VSSGNDGround Reference Pin (VSS)
J5VSSSMPSGNDGround Reference Pin (VSSSMPS)
J7PE10I/OMultiplexed I/O & Peripheral Pin PE10 (PWM)
J9PE8I/OMultiplexed I/O & Peripheral Pin PE8 (PWM)
J11PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
J13PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, ADC, PWM)
J15PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
J17VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
K2VDD11PowerPower Supply Input (VDD11 — 3.3V VDD (Max 4.0V))
K4VDDSMPSPowerPower Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
K6VLXSMPSI/OMultiplexed I/O & Peripheral Pin VLXSMPS (General)
K8PE9I/OMultiplexed I/O & Peripheral Pin PE9 (PWM)
K10PB2I/OMultiplexed I/O & Peripheral Pin PB2 (I2C, ADC, RTC/CLK)
K12PB0I/OMultiplexed I/O & Peripheral Pin PB0 (SPI, ADC, PWM)
K14PA7I/OMultiplexed I/O & Peripheral Pin PA7 (UART, SPI, I2C, ADC, PWM)
K16VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
K18VSSGNDGround Reference Pin (VSS)
PIN A1 VDD
Power
Power Supply Input (VDD — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 14 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32U575OIY6QTR (ST · WLCSP-90)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32U575OIY6QTR (WLCSP-90) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32U575OIY6QTR (WLCSP-90) - 2. Standard Pinout (Top View)
True package pinout (90 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32U575OIY6QTR (WLCSP-90) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32U575OIY6QTR (WLCSP-90) - 4. Package Dimensions (D×E×A)
WLCSP-90 · 4.20×4.00mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32U575OIY6QTR (WLCSP-90) - 5. Recommended Land Pattern
IPC-7351B Footprint (90 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32U575OIY6QTR (WLCSP-90) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (14 figures · Page 1/2)
Showing 1–12 of 14 uncropped original figures for STM32U575
P94 · p94_fig01EXACT PACKAGE
STM32U575OIY6QTR (WLCSP-90) — Figure 13. WLCSP90_SMPS ballout
Figure 13. WLCSP90_SMPS ballout
P312 · p312_fig01EXACT PACKAGE
STM32U575OIY6QTR (WLCSP-90) — Figure 91. WLCSP90 - Outline A1 BALL LOCATION
Figure 91. WLCSP90 - Outline A1 BALL LOCATION
P313 · p313_fig01EXACT PACKAGE
STM32U575OIY6QTR (WLCSP-90) — Figure 92. WLCSP90 - Recommended footprint
Figure 92. WLCSP90 - Recommended footprint
P91 · p91_fig011546×971px
STM32U575OIY6QTR (WLCSP-90) — Figure 7. LQFP48_SMPS pinout
Figure 7. LQFP48_SMPS pinout
P91 · p91_fig021546×1304px
STM32U575OIY6QTR (WLCSP-90) — 10
10
P91 · p91_fig02P91
STM32U575OIY6QTR (WLCSP-90) — Datasheet Page 91 (p91_fig02)
Datasheet Page 91 (p91_fig02)
P146 · p146_fig011546×1780px
STM32U575OIY6QTR (WLCSP-90) — Figure 24. STM32U575xx power supply scheme (without SMPS)
Figure 24. STM32U575xx power supply scheme (without SMPS)
P146 · p146_fig01P146
STM32U575OIY6QTR (WLCSP-90) — Datasheet Page 146 (p146_fig01)
Datasheet Page 146 (p146_fig01)
P147 · p147_fig011546×1981px
STM32U575OIY6QTR (WLCSP-90) — Figure 25. STM32U575xQ power supply scheme (with SMPS)
Figure 25. STM32U575xQ power supply scheme (with SMPS)
P209 · p209_fig011545×701px
STM32U575OIY6QTR (WLCSP-90) — Figure 32. Typical application with a 8 MHz crystal
Figure 32. Typical application with a 8 MHz crystal
P240 · p240_fig011751×981px
STM32U575OIY6QTR (WLCSP-90) — Figure 38. ADC accuracy characteristics
Figure 38. ADC accuracy characteristics
P240 · p240_fig021546×738px
STM32U575OIY6QTR (WLCSP-90) — Figure 39. Typical connection diagram when using the ADC
Figure 39. Typical connection diagram when using the ADC
Page 1 / 2 (14 extracted figures)

Technical Specifications & Part Details (STM32U575OIY6QTR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32U575OIY6QTR (WLCSP-90) is a 90-pin embedded microcontroller unit (mcu) featuring a 4.00 × 4.20 × 0.56 mm mechanical envelope (lead pitch e = 0.39 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, I2C, ADC, DAC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG, UART interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
160 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
65 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
4.00 × 4.20 × 0.56 mm (A1=0.18 mm)
Package family: WLCSP (WLCSP-90)
Pin Count & Lead PitchN / e
90 Pins | Pitch e = 0.39 mm (15.4 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, I2C, ADC, DAC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PH3BOOT0 -): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol90 auto-grouped pins
OK
IPC-7351B Land Pattern90 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-90)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
4.00 × 4.20 mm
Height (A) & Pitch (e)IPC-7351B
A=0.56mm · e=0.40mm
Pad Size (W × L)Level B
0.20 × 0.20 mm
Pins / Total PadsTopology
90P / 90Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-90
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32U575OIY6QTR (WLCSP-90)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32U575OIY6QTR (WLCSP-90)?

Manufactured by ST, the STM32U575OIY6QTR is housed in a WLCSP-90 package with 90 pins and a 0.40 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A3 (PC11: Multiplexed I/O & Peripheral Pin PC11 (UART)), A5 (PD2: Multiplexed I/O & Peripheral Pin PD2 (UART)), A7 (PG10: Multiplexed I/O & Peripheral Pin PG10 (UART, SPI)), A9 (PG14: Multiplexed I/O & Peripheral Pin PG14 (General)), A11 (VDDIO2: Power Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))).

What are the IPC-7351B PCB Footprint dimensions for STM32U575OIY6QTR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32U575OIY6QTR (WLCSP-90) has a nominal body envelope of 4.20 × 4.00 mm, pitch e = 0.40 mm, and 90 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32U575OIY6QTR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32U575OIY6QTR (ST, WLCSP-90) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (90 pins) & STM32U575 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A3PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: UART.
A5PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
A7PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI.
A9PG14Digital_IOSignal terminal PG14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG14. Supported peripheral buses: General.
A11VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A13PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCL. Supported peripheral buses: UART, I2C.
A15PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: I2C, PWM.
A17VDD11Power_InPrimary positive power supply input (VDD11) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B4PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI.
B6PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_RDYUSART2TX. Supported peripheral buses: SPI.
B8PG12Digital_IOSignal terminal PG12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_NSS. Supported peripheral buses: UART, SPI, I2C.
B10VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B12PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA. Supported peripheral buses: UART, I2C.
B14PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
B16VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B18VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C1VDDUSBPower_InPrimary positive power supply input (VDDUSB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C3PA14(JTCK/ SWCLK)Digital_IOSignal terminal PA14(JTCK/ SWCLK) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14(JTCK/ SWCLK). Supported peripheral buses: I2C, SWD/JTAG.
C5PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: PWM.
C7PG9Digital_IOSignal terminal PG9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
C9PG13Digital_IOSignal terminal PG13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PG13. Supported peripheral buses: UART, I2C.
C11PB4(NJTRST)Digital_IOSignal terminal PB4(NJTRST) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISOSPI3MISO. Supported peripheral buses: UART, SPI, SWD/JTAG.
C13PH3BOOT0 -Digital_IOSignal terminal PH3BOOT0 - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH3BOOT0 -. Supported peripheral buses: General.
C15PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General.
C17VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D2PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: UART.
D4PA13(JTMS/ SWDIO)Digital_IOSignal terminal PA13(JTMS/ SWDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13(JTMS/ SWDIO). Supported peripheral buses: SWD/JTAG.
D6PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI.
D8PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSIMDF1CKI0. Supported peripheral buses: UART, SPI.
D10PB3 (JTDO/TRACES WO)Digital_IOSignal terminal PB3 (JTDO/TRACES WO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDA, SPI1_SCKSPI3SCK. Supported peripheral buses: UART, SPI, I2C, SWD/JTAG.
D12PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI, I2C.
D14PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
D16PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: I2C.
D18PC14 - OSC32_IN (PC14)Digital_IOSignal terminal PC14 - OSC32_IN (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN (PC14). Supported peripheral buses: RTC/CLK.
E1PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: UART.
E3PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISOUSART1CTS. Supported peripheral buses: SPI, PWM.
E5PA15(JTDI)Digital_IOSignal terminal PA15(JTDI) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_NSS_USART3RTSDE. Supported peripheral buses: UART, SPI, SWD/JTAG.
E7PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: UART, SPI.
E9PG11Digital_IOSignal terminal PG11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSIUSART1CTS. Supported peripheral buses: SPI.
E11PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: UART, PWM.
E13PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: SPI.
E15PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
E17IOE17Digital_IOGeneral Purpose Digital I/O Pin IOE17
F2PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
F4PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
F6PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: PWM.
F8PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_RDYUSART1CK. Supported peripheral buses: SPI, RTC/CLK.
F10PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, ADC.
F12PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: ADC.
F14PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL, SPI2_RDY. Supported peripheral buses: SPI, I2C, ADC.
F16PH1OSC OUT -_ (PH1)Digital_IOSignal terminal PH1OSC OUT -_ (PH1) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH1OSC OUT -_ (PH1). Supported peripheral buses: RTC/CLK.
F18PH0OSC IN -_ (PH0)Digital_IOSignal terminal PH0OSC IN -_ (PH0) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH0OSC IN -_ (PH0). Supported peripheral buses: RTC/CLK.
G1PD14Digital_IOSignal terminal PD14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD14. Supported peripheral buses: PWM.
G3PD15Digital_IOSignal terminal PD15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD15. Supported peripheral buses: PWM.
G5PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, RTC/CLK.
G7PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
G9PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART, ADC.
G11PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_RDYUSART2CTS. Supported peripheral buses: UART, SPI, ADC, PWM.
G13PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: ADC.
G15PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI, I2C3_SDA. Supported peripheral buses: SPI, I2C, ADC.
G17NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
H2PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SCL, SPI2_SCK. Supported peripheral buses: UART, SPI, I2C, PWM.
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