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STM32G474MBT3 (LQFP-80(12x12)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32G474MBT3

STID: C5270377LQFP-80(12x12) · 80 Pins · Pitch 0.50mmIPC TOLERANCE VARIATION5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32G474MBT3 (LQFP-80(12x12))1VBAT2PC133PC14-OSC32_I4PC15-OSC32_O5PF0-OSC_IN6PF1-OSC_OUT7PG10-NRST8PC09PC110PC211PC312PA013PA114PA215VSS16VDD17PA318PA419PA520PA621PA722PC423PC524PB025PB126PB227VSSA28VREF+29VDDA30PE731PE832PE933PE1034PE1135PE1236PE1337PE1438PE1539PB1040VSS80VDD79VSS78PB977PB8-BOOT076PB775PB674PB573PB472PB371PD270PD169PD068PC1267PC1166PC1065PA1564PA1463PA1362VDD61VSS60PA1259PA1158PA1057PA956PA855PC954PC853PC752PC651VDD50VSS49PD1048PD947PD846PB1545PB1444PB1343PB1242PB1141VDDGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.855.950.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7-50.8-55.9mm
2. 2D FOOTPRINT
1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980E=12.00mm · Pitch e=0.50mmD=12.00mm-11-9-7-5-3-113579111197531-1-3-5-7-9-11mm
3. 3D CAD MODEL
Package Body: 12.00mm × 12.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (80/80)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
2PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
3PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
4PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
5PF0-OSC_INI/OMultiplexed I/O & Peripheral Pin PF0-OSC_IN (RTC/CLK)
6PF1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PF1-OSC_OUT (RTC/CLK)
7PG10-NRSTI/OMultiplexed I/O & Peripheral Pin PG10-NRST (General)
8PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
9PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
10PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
11PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
12PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
13PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
14PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
15VSSGNDGround Reference Pin (VSS)
16VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
17PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
18PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
19PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
20PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
21PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
22PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
23PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
24PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
25PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
26PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
27VSSAGNDGround Reference Pin (VSSA)
28VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (General)
29VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
30PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
31PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
32PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
33PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
34PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
35PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
36PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
37PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
38PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
39PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
40VSSGNDGround Reference Pin (VSS)
41VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
42PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
43PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
44PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
45PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
46PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
47PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
48PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
49PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
50VSSGNDGround Reference Pin (VSS)
51VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
52PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
53PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
54PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
55PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
56PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
57PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
58PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
59PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
60PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
61VSSGNDGround Reference Pin (VSS)
62VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
63PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
64PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
65PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
66PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
67PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
68PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
69PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
70PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
71PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
72PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
73PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
74PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
75PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
76PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
77PB8-BOOT0I/OMultiplexed I/O & Peripheral Pin PB8-BOOT0 (General)
78PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
79VSSGNDGround Reference Pin (VSS)
80VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
PIN 1 VBAT
Power
Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32G474MBT3 (ST · LQFP-80(12x12))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32G474MBT3 (LQFP-80(12x12)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32G474MBT3 (LQFP-80(12x12)) - 2. Standard Pinout (Top View)
True package pinout (80 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32G474MBT3 (LQFP-80(12x12)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32G474MBT3 (LQFP-80(12x12)) - 4. Package Dimensions (D×E×A)
LQFP-80(12x12) · 12.00×12.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32G474MBT3 (LQFP-80(12x12)) - 5. Recommended Land Pattern
IPC-7351B Footprint (80 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32G474MBT3 (LQFP-80(12x12)) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (STM32G474MBT3)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32G474MBT3 (LQFP-80(12x12)) is a 80-pin embedded microcontroller unit (mcu) featuring a 12.00 × 12.00 × 1.40 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
12.00 × 12.00 × 1.40 mm (A1=0.10 mm)
Package family: LQFP (LQFP-80(12x12))
Pin Count & Lead PitchN / e
80 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol80 auto-grouped pins
OK
IPC-7351B Land Pattern80 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-80(12x12))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
12.00 × 12.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.40mm · e=0.50mm
Pad Size (W × L)Level B
0.28 × 1.25 mm
Pins / Total PadsTopology
80P / 80Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-80(12x12)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32G474MBT3 (LQFP-80(12x12))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32G474MBT3 (LQFP-80(12x12))?

Manufactured by ST, the STM32G474MBT3 is housed in a LQFP-80(12x12) package with 80 pins and a 0.50 mm lead pitch. Key pins include: 1 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))), 2 (PC13: Multiplexed I/O & Peripheral Pin PC13 (General)), 3 (PC14-OSC32_IN: Multiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)), 4 (PC15-OSC32_OUT: Multiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)), 5 (PF0-OSC_IN: Multiplexed I/O & Peripheral Pin PF0-OSC_IN (RTC/CLK)), 6 (PF1-OSC_OUT: Multiplexed I/O & Peripheral Pin PF1-OSC_OUT (RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for STM32G474MBT3?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G474MBT3 (LQFP-80(12x12)) has a nominal body envelope of 12.00 × 12.00 mm, pitch e = 0.50 mm, and 80 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G474MBT3?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G474MBT3 (ST, LQFP-80(12x12)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (80 pins) & STM32G474 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
2PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
3PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
4PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
5PF0-OSC_INDigital_IOSignal terminal PF0-OSC_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF0-OSC_IN. Supported peripheral buses: RTC/CLK.
6PF1-OSC_OUTDigital_IOSignal terminal PF1-OSC_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1-OSC_OUT. Supported peripheral buses: RTC/CLK.
7PG10-NRSTDigital_IOSignal terminal PG10-NRST (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG10-NRST. Supported peripheral buses: General.
8PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: General.
9PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: General.
10PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: General.
11PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: General.
12PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: General.
13PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
14PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
15VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
16VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
17PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General.
18PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General.
19PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
20PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
21PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General.
22PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: General.
23PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: General.
24PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: General.
25PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General.
26PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General.
27VSSAGND0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
28VREF+Digital_IOSignal terminal VREF+ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
29VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
30PE7Digital_IOSignal terminal PE7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General.
31PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: General.
32PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: General.
33PE10Digital_IOSignal terminal PE10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: General.
34PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: General.
35PE12Digital_IOSignal terminal PE12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE12. Supported peripheral buses: General.
36PE13Digital_IOSignal terminal PE13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE13. Supported peripheral buses: General.
37PE14Digital_IOSignal terminal PE14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE14. Supported peripheral buses: General.
38PE15Digital_IOSignal terminal PE15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE15. Supported peripheral buses: General.
39PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
40VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
41VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
42PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
43PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
44PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
45PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
46PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
47PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD8. Supported peripheral buses: General.
48PD9Digital_IOSignal terminal PD9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD9. Supported peripheral buses: General.
49PD10Digital_IOSignal terminal PD10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD10. Supported peripheral buses: General.
50VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
51VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
52PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
53PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
54PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
55PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: General.
56PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
57PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
58PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
59PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
60PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
61VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
62VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
63PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
64PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
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