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STM32G0B1RCI6N (UFBGA-64(5x5)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32G0B1RCI6N

STID: C5270248UFBGA-64(5x5) · 64 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32G0B1RCI6N (UFBGA-64(5x5))A1PC11A2PC10A3PB7A4PB6A5PD6A6PD2A7PD0A8PC8B1PC15-OSC32_OB2PC12B3PB8B4PB3B5PD5B6PD1B7PC9B8PA12[PA10]C1PC14-OSC32_IC2PC13C3PB9C4PB4C5PD4C6PA15C7PA14-BOOT0C8PA11[PA9]D1VDD/VDDAD2VREF+D3VBATD4PB5D5PD3D6PA10D7PA13D8VDDIO2H8PB11H7PB2H6PC5H5PC4H4PA4H3PA1H2PA0H1PC3G8PB13G7PB12G6PB10G5PB1G4PA5G3PA2G2PC2G1PF1-OSC_OUTF8PA8F7PB15F6PB14F5PB0F4PA6F3PA3F2PC1F1PF0-OSC_INE8VSSE7PC6E6PA9E5PC7E4PA7E3PC0E2PF2-NRSTE1VSS/VSSAGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1A2B2C2D2E2F2G2H2A3B3C3D3E3F3G3H3A4B4C4D4E4F4G4H4A5B5C5D5E5F5G5H5A6B6C6D6E6F6G6H6A7B7C7D7E7F7G7H7A8B8C8D8E8F8G8H8E=5.00mm · Pitch e=0.50mmD=5.00mm-4-3-2-10123443210-1-2-3-4mm
3. 3D CAD MODEL
Package Body: 5.00mm × 5.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
A2PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
A3PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
A4PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
A5PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
A6PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
A7PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
A8PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
B1PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
B2PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
B3PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
B4PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
B5PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
B6PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
B7PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
B8PA12[PA10]I/OMultiplexed I/O & Peripheral Pin PA12[PA10] (General)
C1PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
C2PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
C3PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
C4PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
C5PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
C6PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
C7PA14-BOOT0I/OMultiplexed I/O & Peripheral Pin PA14-BOOT0 (General)
C8PA11[PA9]I/OMultiplexed I/O & Peripheral Pin PA11[PA9] (General)
D1VDD/VDDAPowerPower Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))
D2VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (General)
D3VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
D4PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
D5PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
D6PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
D7PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
D8VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
E1VSS/VSSAGNDGround Reference Pin (VSS/VSSA)
E2PF2-NRSTI/OMultiplexed I/O & Peripheral Pin PF2-NRST (General)
E3PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
E4PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
E5PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
E6PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
E7PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
E8VSSGNDGround Reference Pin (VSS)
F1PF0-OSC_INI/OMultiplexed I/O & Peripheral Pin PF0-OSC_IN (RTC/CLK)
F2PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
F3PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
F4PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
F5PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
F6PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
F7PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
F8PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
G1PF1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PF1-OSC_OUT (RTC/CLK)
G2PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
G3PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
G4PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
G5PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
G6PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
G7PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
G8PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
H1PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
H2PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
H3PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
H4PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
H5PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
H6PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
H7PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
H8PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
PIN A1 PC11
I/O
Multiplexed I/O & Peripheral Pin PC11 (General)
Design note: Signal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32G0B1RCI6N (ST · UFBGA-64(5x5))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32G0B1RCI6N (UFBGA-64(5x5)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32G0B1RCI6N (UFBGA-64(5x5)) - 2. Standard Pinout (Top View)
True package pinout (64 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32G0B1RCI6N (UFBGA-64(5x5)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32G0B1RCI6N (UFBGA-64(5x5)) - 4. Package Dimensions (D×E×A)
UFBGA-64(5x5) · 5.00×5.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32G0B1RCI6N (UFBGA-64(5x5)) - 5. Recommended Land Pattern
IPC-7351B Footprint (64 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32G0B1RCI6N (UFBGA-64(5x5)) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (STM32G0B1RCI6N)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32G0B1RCI6N (UFBGA-64(5x5)) is a 64-pin embedded microcontroller unit (mcu) featuring a 5.00 × 5.00 × 0.50 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
5.00 × 5.00 × 0.50 mm (A1=0.20 mm)
Package family: BGA (UFBGA-64(5x5))
Pin Count & Lead PitchN / e
64 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol64 auto-grouped pins
OK
IPC-7351B Land Pattern64 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFBGA-64(5x5))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
5.00 × 5.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.50mm · e=0.50mm
Pad Size (W × L)Level B
0.22 × 0.22 mm
Pins / Total PadsTopology
64P / 64Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-64(5x5)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32G0B1RCI6N (UFBGA-64(5x5))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32G0B1RCI6N (UFBGA-64(5x5))?

Manufactured by ST, the STM32G0B1RCI6N is housed in a UFBGA-64(5x5) package with 64 pins and a 0.50 mm lead pitch. Key pins include: A1 (PC11: Multiplexed I/O & Peripheral Pin PC11 (General)), A2 (PC10: Multiplexed I/O & Peripheral Pin PC10 (General)), A3 (PB7: Multiplexed I/O & Peripheral Pin PB7 (General)), A4 (PB6: Multiplexed I/O & Peripheral Pin PB6 (General)), A5 (PD6: Multiplexed I/O & Peripheral Pin PD6 (General)), A6 (PD2: Multiplexed I/O & Peripheral Pin PD2 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32G0B1RCI6N?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G0B1RCI6N (UFBGA-64(5x5)) has a nominal body envelope of 5.00 × 5.00 mm, pitch e = 0.50 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G0B1RCI6N?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G0B1RCI6N (ST, UFBGA-64(5x5)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & STM32G0B1RCI Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
A2PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
A3PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
A4PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
A5PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General.
A6PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
A7PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
A8PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: General.
B1PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
B2PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
B3PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
B4PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
B5PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General.
B6PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
B7PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: General.
B8PA12[PA10]Digital_IOSignal terminal PA12[PA10] (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12[PA10]. Supported peripheral buses: General.
C1PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
C2PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
C3PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
C4PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
C5PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
C6PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
C7PA14-BOOT0Digital_IOSignal terminal PA14-BOOT0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14-BOOT0. Supported peripheral buses: General.
C8PA11[PA9]Digital_IOSignal terminal PA11[PA9] (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11[PA9]. Supported peripheral buses: General.
D1VDD/VDDAPower_InPrimary positive power supply input (VDD/VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D2VREF+Digital_IOSignal terminal VREF+ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
D3VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D4PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
D5PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
D6PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
D7PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
D8VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E1VSS/VSSAGND0V electrical ground return terminal (VSS/VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
E2PF2-NRSTDigital_IOSignal terminal PF2-NRST (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF2-NRST. Supported peripheral buses: General.
E3PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: General.
E4PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General.
E5PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
E6PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
E7PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
E8VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F1PF0-OSC_INDigital_IOSignal terminal PF0-OSC_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF0-OSC_IN. Supported peripheral buses: RTC/CLK.
F2PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: General.
F3PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General.
F4PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
F5PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: General.
F6PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
F7PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
F8PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
G1PF1-OSC_OUTDigital_IOSignal terminal PF1-OSC_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1-OSC_OUT. Supported peripheral buses: RTC/CLK.
G2PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: General.
G3PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
G4PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
G5PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General.
G6PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
G7PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
G8PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
H1PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: General.
H2PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: General.
H3PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
H4PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General.
H5PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: General.
H6PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: General.
H7PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General.
H8PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
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