ChipDocs.org
⌘K
2284 PARTSUpload PDF
STM32G0B1NEY6TR (WLCSP-52) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32G0B1NEY6TR

STID: C5270231WLCSP-52 · 52 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32G0B1NEY6TR (WLCSP-52)A2PA15A4PD0A6PD3A8PB3A10PB5A12PB8B1PA12[PA10]B3PA13B5PA14-BOOT0B7PD2B9PB4B11PC13B13PC14-OSC32_IC2PA11[PA9]C4PA10C6PD1C8PB6C10VBATC12PC15-OSC32_OD1VDDIO2D3PC7D5PC6D7PB7D9PB9D11VREF+D13VDD/VDDAH13PA0H11PA3H9PA7H7PB0H5PB1H3PB10H1PB13G12PF1-OSC_OUTG10PA4G8PC4G6PC5G4PB2G2PB14F13PF0-OSC_INF11PF2-NRSTF9PA5F7PA6F5PB11F3PB15F1PA8E12VSS/VSSAE10PA1E8PA2E6PB12E4PA9E2VSSGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.838.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1mm
2. 2D FOOTPRINT
B1D1F1H1A2C2E2G2B3D3F3H3A4C4E4G4B5D5F5H5A6C6E6G6B7D7F7H7A8C8E8G8B9D9F9H9A10C10E10G10B11D11F11H11A12C12E12G12B13D13F13H13E=3.10mm · Pitch e=0.40mmD=3.20mm-3-2-101233210-1-2-3mm
3. 3D CAD MODEL
Package Body: 3.10mm × 3.20mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (52/52)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A2PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
A4PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
A6PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
A8PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
A10PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
A12PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
B1PA12[PA10]I/OMultiplexed I/O & Peripheral Pin PA12[PA10] (General)
B3PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
B5PA14-BOOT0I/OMultiplexed I/O & Peripheral Pin PA14-BOOT0 (General)
B7PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
B9PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
B11PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
B13PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
C2PA11[PA9]I/OMultiplexed I/O & Peripheral Pin PA11[PA9] (General)
C4PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
C6PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
C8PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
C10VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
C12PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
D1VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
D3PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
D5PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
D7PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
D9PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
D11VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (General)
D13VDD/VDDAPowerPower Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))
E2VSSGNDGround Reference Pin (VSS)
E4PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
E6PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
E8PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
E10PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
E12VSS/VSSAGNDGround Reference Pin (VSS/VSSA)
F1PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
F3PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
F5PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
F7PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
F9PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
F11PF2-NRSTI/OMultiplexed I/O & Peripheral Pin PF2-NRST (General)
F13PF0-OSC_INI/OMultiplexed I/O & Peripheral Pin PF0-OSC_IN (RTC/CLK)
G2PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
G4PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
G6PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
G8PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
G10PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
G12PF1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PF1-OSC_OUT (RTC/CLK)
H1PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
H3PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
H5PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
H7PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
H9PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
H11PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
H13PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
PIN A2 PA15
I/O
Multiplexed I/O & Peripheral Pin PA15 (General)
Design note: Signal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32G0B1NEY6TR (ST · WLCSP-52)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32G0B1NEY6TR (WLCSP-52) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32G0B1NEY6TR (WLCSP-52) - 2. Standard Pinout (Top View)
True package pinout (52 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32G0B1NEY6TR (WLCSP-52) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32G0B1NEY6TR (WLCSP-52) - 4. Package Dimensions (D×E×A)
WLCSP-52 · 3.10×3.20mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32G0B1NEY6TR (WLCSP-52) - 5. Recommended Land Pattern
IPC-7351B Footprint (52 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32G0B1NEY6TR (WLCSP-52) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (STM32G0B1NEY6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32G0B1NEY6TR (WLCSP-52) is a 52-pin embedded microcontroller unit (mcu) featuring a 3.20 × 3.10 × 0.55 mm mechanical envelope (lead pitch e = 0.39 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
3.20 × 3.10 × 0.55 mm (A1=0.18 mm)
Package family: WLCSP (WLCSP-52)
Pin Count & Lead PitchN / e
52 Pins | Pitch e = 0.39 mm (15.4 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol52 auto-grouped pins
OK
IPC-7351B Land Pattern52 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-52)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
3.20 × 3.10 mm
Height (A) & Pitch (e)IPC-7351B
A=0.55mm · e=0.40mm
Pad Size (W × L)Level B
0.23 × 0.23 mm
Pins / Total PadsTopology
52P / 52Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-52
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32G0B1NEY6TR (WLCSP-52)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32G0B1NEY6TR (WLCSP-52)?

Manufactured by ST, the STM32G0B1NEY6TR is housed in a WLCSP-52 package with 52 pins and a 0.40 mm lead pitch. Key pins include: A2 (PA15: Multiplexed I/O & Peripheral Pin PA15 (General)), A4 (PD0: Multiplexed I/O & Peripheral Pin PD0 (General)), A6 (PD3: Multiplexed I/O & Peripheral Pin PD3 (General)), A8 (PB3: Multiplexed I/O & Peripheral Pin PB3 (General)), A10 (PB5: Multiplexed I/O & Peripheral Pin PB5 (General)), A12 (PB8: Multiplexed I/O & Peripheral Pin PB8 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32G0B1NEY6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G0B1NEY6TR (WLCSP-52) has a nominal body envelope of 3.10 × 3.20 mm, pitch e = 0.40 mm, and 52 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G0B1NEY6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G0B1NEY6TR (ST, WLCSP-52) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (52 pins) & STM32G0B1NEY Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A2PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
A4PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General.
A6PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
A8PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
A10PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
A12PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
B1PA12[PA10]Digital_IOSignal terminal PA12[PA10] (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12[PA10]. Supported peripheral buses: General.
B3PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
B5PA14-BOOT0Digital_IOSignal terminal PA14-BOOT0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14-BOOT0. Supported peripheral buses: General.
B7PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
B9PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
B11PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
B13PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
C2PA11[PA9]Digital_IOSignal terminal PA11[PA9] (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11[PA9]. Supported peripheral buses: General.
C4PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
C6PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD1. Supported peripheral buses: General.
C8PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
C10VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C12PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
D1VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D3PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
D5PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
D7PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
D9PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
D11VREF+Digital_IOSignal terminal VREF+ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
D13VDD/VDDAPower_InPrimary positive power supply input (VDD/VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
E4PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
E6PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
E8PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
E10PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
E12VSS/VSSAGND0V electrical ground return terminal (VSS/VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
F1PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
F3PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
F5PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
F7PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
F9PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
F11PF2-NRSTDigital_IOSignal terminal PF2-NRST (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF2-NRST. Supported peripheral buses: General.
F13PF0-OSC_INDigital_IOSignal terminal PF0-OSC_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF0-OSC_IN. Supported peripheral buses: RTC/CLK.
G2PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
G4PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General.
G6PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: General.
G8PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: General.
G10PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General.
G12PF1-OSC_OUTDigital_IOSignal terminal PF1-OSC_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1-OSC_OUT. Supported peripheral buses: RTC/CLK.
H1PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
H3PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
H5PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General.
H7PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: General.
H9PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General.
H11PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General.
H13PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: General.
ExplorePartsPackagesMFRsUpload