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STM32G0C1VET6 (LQFP-100(14x14)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32G0C1VET6

STID: C5270174LQFP-100(14x14) · 100 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32G0C1VET6 (LQFP-100(14x14))1PB92PC103PC114PE45PE56PE67PC128PC139PC14-OSC32_I10PC15-OSC32_O11VBAT12VREF+13VDD/VDDA14VSS/VSSA15PF0-OSC_IN16PF1-OSC_OUT17PF2-NRST18PF319PF420PF521PC022PC123PC224PC325PA026PA127PA228PA329PA430PA531PA632PA733PC434PC535PB036PB137PB238PF639PF740PE741PE842PE943PE1044PE1145PE1246PE1347PE1448PE1549PB1050PB11100PB899PB798PB697PE396PE295PE194PE093PB592PB491PB390PF1389PF1288PF1187PF1086PF985PD784PD683PD582PD481PD380PD279PD178PD077PC976PC875PA1574PA14-BOOT073PA1372PF871PA12[PA10]70PA11[PA9]69PA1068PD1567PD1466PD1365PD1264VDDIO263VSS62PD1161PD1060PD959PD858PC757PC656PA955PA854PB1553PB1452PB1351PB12Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.868.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100E=14.00mm · Pitch e=0.50mmD=14.00mm-12-10-8-6-4-2024681012121086420-2-4-6-8-10-12mm
3. 3D CAD MODEL
Package Body: 14.00mm × 14.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (100/100)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
2PC10I/OMultiplexed I/O & Peripheral Pin PC10 (General)
3PC11I/OMultiplexed I/O & Peripheral Pin PC11 (General)
4PE4I/OMultiplexed I/O & Peripheral Pin PE4 (General)
5PE5I/OMultiplexed I/O & Peripheral Pin PE5 (General)
6PE6I/OMultiplexed I/O & Peripheral Pin PE6 (General)
7PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
8PC13I/OMultiplexed I/O & Peripheral Pin PC13 (General)
9PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
10PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
11VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
12VREF+I/OMultiplexed I/O & Peripheral Pin VREF+ (General)
13VDD/VDDAPowerPower Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))
14VSS/VSSAGNDGround Reference Pin (VSS/VSSA)
15PF0-OSC_INI/OMultiplexed I/O & Peripheral Pin PF0-OSC_IN (RTC/CLK)
16PF1-OSC_OUTI/OMultiplexed I/O & Peripheral Pin PF1-OSC_OUT (RTC/CLK)
17PF2-NRSTI/OMultiplexed I/O & Peripheral Pin PF2-NRST (General)
18PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
19PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
20PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
21PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
22PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
23PC2I/OMultiplexed I/O & Peripheral Pin PC2 (General)
24PC3I/OMultiplexed I/O & Peripheral Pin PC3 (General)
25PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
26PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
27PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
28PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
29PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
30PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
31PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
32PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
33PC4I/OMultiplexed I/O & Peripheral Pin PC4 (General)
34PC5I/OMultiplexed I/O & Peripheral Pin PC5 (General)
35PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
36PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
37PB2I/OMultiplexed I/O & Peripheral Pin PB2 (General)
38PF6I/OMultiplexed I/O & Peripheral Pin PF6 (General)
39PF7I/OMultiplexed I/O & Peripheral Pin PF7 (General)
40PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
41PE8I/OMultiplexed I/O & Peripheral Pin PE8 (General)
42PE9I/OMultiplexed I/O & Peripheral Pin PE9 (General)
43PE10I/OMultiplexed I/O & Peripheral Pin PE10 (General)
44PE11I/OMultiplexed I/O & Peripheral Pin PE11 (General)
45PE12I/OMultiplexed I/O & Peripheral Pin PE12 (General)
46PE13I/OMultiplexed I/O & Peripheral Pin PE13 (General)
47PE14I/OMultiplexed I/O & Peripheral Pin PE14 (General)
48PE15I/OMultiplexed I/O & Peripheral Pin PE15 (General)
49PB10I/OMultiplexed I/O & Peripheral Pin PB10 (General)
50PB11I/OMultiplexed I/O & Peripheral Pin PB11 (General)
51PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
52PB13I/OMultiplexed I/O & Peripheral Pin PB13 (General)
53PB14I/OMultiplexed I/O & Peripheral Pin PB14 (General)
54PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
55PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
56PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
57PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
58PC7I/OMultiplexed I/O & Peripheral Pin PC7 (General)
59PD8I/OMultiplexed I/O & Peripheral Pin PD8 (General)
60PD9I/OMultiplexed I/O & Peripheral Pin PD9 (General)
61PD10I/OMultiplexed I/O & Peripheral Pin PD10 (General)
62PD11I/OMultiplexed I/O & Peripheral Pin PD11 (General)
63VSSGNDGround Reference Pin (VSS)
64VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
65PD12I/OMultiplexed I/O & Peripheral Pin PD12 (General)
66PD13I/OMultiplexed I/O & Peripheral Pin PD13 (General)
67PD14I/OMultiplexed I/O & Peripheral Pin PD14 (General)
68PD15I/OMultiplexed I/O & Peripheral Pin PD15 (General)
69PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
70PA11[PA9]I/OMultiplexed I/O & Peripheral Pin PA11[PA9] (General)
71PA12[PA10]I/OMultiplexed I/O & Peripheral Pin PA12[PA10] (General)
72PF8I/OMultiplexed I/O & Peripheral Pin PF8 (General)
73PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
74PA14-BOOT0I/OMultiplexed I/O & Peripheral Pin PA14-BOOT0 (General)
75PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
76PC8I/OMultiplexed I/O & Peripheral Pin PC8 (General)
77PC9I/OMultiplexed I/O & Peripheral Pin PC9 (General)
78PD0I/OMultiplexed I/O & Peripheral Pin PD0 (General)
79PD1I/OMultiplexed I/O & Peripheral Pin PD1 (General)
80PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
81PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
82PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
83PD5I/OMultiplexed I/O & Peripheral Pin PD5 (General)
84PD6I/OMultiplexed I/O & Peripheral Pin PD6 (General)
85PD7I/OMultiplexed I/O & Peripheral Pin PD7 (General)
86PF9I/OMultiplexed I/O & Peripheral Pin PF9 (General)
87PF10I/OMultiplexed I/O & Peripheral Pin PF10 (General)
88PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
89PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
90PF13I/OMultiplexed I/O & Peripheral Pin PF13 (General)
91PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
92PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
93PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
94PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
95PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
96PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
97PE3I/OMultiplexed I/O & Peripheral Pin PE3 (General)
98PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
99PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
100PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
PIN 1 PB9
I/O
Multiplexed I/O & Peripheral Pin PB9 (General)
Design note: Signal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32G0C1VET6 (ST · LQFP-100(14x14))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32G0C1VET6 (LQFP-100(14x14)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32G0C1VET6 (LQFP-100(14x14)) - 2. Standard Pinout (Top View)
True package pinout (100 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32G0C1VET6 (LQFP-100(14x14)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32G0C1VET6 (LQFP-100(14x14)) - 4. Package Dimensions (D×E×A)
LQFP-100(14x14) · 14.00×14.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32G0C1VET6 (LQFP-100(14x14)) - 5. Recommended Land Pattern
IPC-7351B Footprint (100 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32G0C1VET6 (LQFP-100(14x14)) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (STM32G0C1VET6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32G0C1VET6 (LQFP-100(14x14)) is a 100-pin embedded microcontroller unit (mcu) featuring a 14.00 × 14.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
14.00 × 14.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-100(14x14))
Pin Count & Lead PitchN / e
100 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol100 auto-grouped pins
OK
IPC-7351B Land Pattern100 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-100(14x14))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
14.00 × 14.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 1.25 mm
Pins / Total PadsTopology
100P / 100Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-100(14x14)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32G0C1VET6 (LQFP-100(14x14))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32G0C1VET6 (LQFP-100(14x14))?

Manufactured by ST, the STM32G0C1VET6 is housed in a LQFP-100(14x14) package with 100 pins and a 0.50 mm lead pitch. Key pins include: 1 (PB9: Multiplexed I/O & Peripheral Pin PB9 (General)), 2 (PC10: Multiplexed I/O & Peripheral Pin PC10 (General)), 3 (PC11: Multiplexed I/O & Peripheral Pin PC11 (General)), 4 (PE4: Multiplexed I/O & Peripheral Pin PE4 (General)), 5 (PE5: Multiplexed I/O & Peripheral Pin PE5 (General)), 6 (PE6: Multiplexed I/O & Peripheral Pin PE6 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32G0C1VET6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G0C1VET6 (LQFP-100(14x14)) has a nominal body envelope of 14.00 × 14.00 mm, pitch e = 0.50 mm, and 100 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G0C1VET6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G0C1VET6 (ST, LQFP-100(14x14)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (100 pins) & STM32G0C1VET Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
2PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General.
3PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General.
4PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General.
5PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General.
6PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: General.
7PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
8PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: General.
9PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
10PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
11VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
12VREF+Digital_IOSignal terminal VREF+ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
13VDD/VDDAPower_InPrimary positive power supply input (VDD/VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
14VSS/VSSAGND0V electrical ground return terminal (VSS/VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
15PF0-OSC_INDigital_IOSignal terminal PF0-OSC_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF0-OSC_IN. Supported peripheral buses: RTC/CLK.
16PF1-OSC_OUTDigital_IOSignal terminal PF1-OSC_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF1-OSC_OUT. Supported peripheral buses: RTC/CLK.
17PF2-NRSTDigital_IOSignal terminal PF2-NRST (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF2-NRST. Supported peripheral buses: General.
18PF3Digital_IOSignal terminal PF3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF3. Supported peripheral buses: General.
19PF4Digital_IOSignal terminal PF4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF4. Supported peripheral buses: General.
20PF5Digital_IOSignal terminal PF5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF5. Supported peripheral buses: General.
21PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: General.
22PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: General.
23PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC2. Supported peripheral buses: General.
24PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC3. Supported peripheral buses: General.
25PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: General.
26PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
27PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
28PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General.
29PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General.
30PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
31PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
32PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General.
33PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: General.
34PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: General.
35PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: General.
36PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General.
37PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: General.
38PF6Digital_IOSignal terminal PF6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF6. Supported peripheral buses: General.
39PF7Digital_IOSignal terminal PF7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PF7. Supported peripheral buses: General.
40PE7Digital_IOSignal terminal PE7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE7. Supported peripheral buses: General.
41PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: General.
42PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: General.
43PE10Digital_IOSignal terminal PE10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE10. Supported peripheral buses: General.
44PE11Digital_IOSignal terminal PE11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE11. Supported peripheral buses: General.
45PE12Digital_IOSignal terminal PE12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE12. Supported peripheral buses: General.
46PE13Digital_IOSignal terminal PE13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE13. Supported peripheral buses: General.
47PE14Digital_IOSignal terminal PE14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE14. Supported peripheral buses: General.
48PE15Digital_IOSignal terminal PE15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE15. Supported peripheral buses: General.
49PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB10. Supported peripheral buses: General.
50PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB11. Supported peripheral buses: General.
51PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
52PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB13. Supported peripheral buses: General.
53PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB14. Supported peripheral buses: General.
54PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
55PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
56PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
57PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
58PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: General.
59PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD8. Supported peripheral buses: General.
60PD9Digital_IOSignal terminal PD9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD9. Supported peripheral buses: General.
61PD10Digital_IOSignal terminal PD10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD10. Supported peripheral buses: General.
62PD11Digital_IOSignal terminal PD11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD11. Supported peripheral buses: General.
63VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
64VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
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