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STM32G070RBT6TR (LQFP-64(10x10)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32G070RBT6TR

STID: C5270121LQFP-64(10x10) · 64 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32G070RBT6TR (LQFP-64(10x10))1PC112PC123PC134PC14 - OSC325IO26VBAT7VREF+8VDD/VDDA9VSS/VSSA10PF0 OSC IN -11PF1 - OSC_OU12NRST13PC014PC115PC216PC317PA018PA119PA220PA321PA422PA523PA624PA725PC426PC527PB028PB129PB230PB1031PB1132PB1264PC1063PB962PB861PB760PB659PB558PB457PB356PD655PD554PD453PD352PD251PD150PD049PC948PC847PA1546PA14BOOT0 -45PA1344PA12 [PA10]43PA11 [PA9]42PA1041PD940PD839PC738PC637PA936PA835PB1534PB1433PB13Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.845.740.635.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6-40.6-45.7mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364E=10.00mm · Pitch e=0.50mmD=10.00mm-9-7-5-3-11357997531-1-3-5-7-9mm
3. 3D CAD MODEL
Package Body: 10.00mm × 10.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (64/64)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, PWM)
2PC12I/OMultiplexed I/O & Peripheral Pin PC12 (General)
3PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
4PC14 - OSC32_IN (PC14)I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)
5IO2I/OGPIO2 / RTC_GPIO2 / TOUCH2 / ADC1_CH1
6VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
7VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
8VDD/VDDAPowerPower Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))
9VSS/VSSAGNDGround Reference Pin (VSS/VSSA)
10PF0 OSC IN -_ (PF0)I/OMultiplexed I/O & Peripheral Pin PF0 OSC IN -_ (PF0) (RTC/CLK)
11PF1 - OSC_OUT (PF1)I/OMultiplexed I/O & Peripheral Pin PF1 - OSC_OUT (PF1) (RTC/CLK)
12NRSTISystem Enable & Hardware Reset (NRST)
13PC0I/OMultiplexed I/O & Peripheral Pin PC0 (General)
14PC1I/OMultiplexed I/O & Peripheral Pin PC1 (General)
15PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI)
16PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI)
17PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, SPI, ADC)
18PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, I2C, ADC)
19PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, SPI, ADC)
20PA3I/OMultiplexed I/O & Peripheral Pin PA3 (SPI, ADC)
21PA4I/OMultiplexed I/O & Peripheral Pin PA4 (SPI, ADC)
22PA5I/OMultiplexed I/O & Peripheral Pin PA5 (UART, SPI, ADC)
23PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC, PWM)
24PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, ADC, PWM)
25PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
26PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
27PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, SPI, ADC, PWM)
28PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
29PB2I/OMultiplexed I/O & Peripheral Pin PB2 (SPI, ADC)
30PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, I2C, ADC)
31PB11I/OMultiplexed I/O & Peripheral Pin PB11 (SPI, I2C, ADC)
32PB12I/OMultiplexed I/O & Peripheral Pin PB12 (SPI, ADC)
33PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, I2C)
34PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI)
35PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, RTC/CLK)
36PA8I/OMultiplexed I/O & Peripheral Pin PA8 (SPI, RTC/CLK)
37PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, SPI, I2C, RTC/CLK)
38PC6I/OMultiplexed I/O & Peripheral Pin PC6 (PWM)
39PC7I/OMultiplexed I/O & Peripheral Pin PC7 (PWM)
40PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART, SPI)
41PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART, SPI)
42PA10I/OMultiplexed I/O & Peripheral Pin PA10 (SPI, I2C, PWM)
43PA11 [PA9]I/OMultiplexed I/O & Peripheral Pin PA11 [PA9] (UART, SPI)
44PA12 [PA10]I/OMultiplexed I/O & Peripheral Pin PA12 [PA10] (UART, SPI, I2C)
45PA13I/OMultiplexed I/O & Peripheral Pin PA13 (SWD/JTAG)
46PA14BOOT0 -I/OMultiplexed I/O & Peripheral Pin PA14BOOT0 - (UART, SWD/JTAG)
47PA15I/OMultiplexed I/O & Peripheral Pin PA15 (UART, SPI)
48PC8I/OMultiplexed I/O & Peripheral Pin PC8 (PWM)
49PC9I/OMultiplexed I/O & Peripheral Pin PC9 (PWM)
50PD0I/OMultiplexed I/O & Peripheral Pin PD0 (SPI)
51PD1I/OMultiplexed I/O & Peripheral Pin PD1 (SPI)
52PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
53PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, PWM)
54PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART, SPI)
55PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART, SPI)
56PD6I/OMultiplexed I/O & Peripheral Pin PD6 (UART, SPI)
57PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI)
58PB4I/OMultiplexed I/O & Peripheral Pin PB4 (SPI, PWM)
59PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, I2C, PWM)
60PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, I2C)
61PB7I/OMultiplexed I/O & Peripheral Pin PB7 (UART, I2C)
62PB8I/OMultiplexed I/O & Peripheral Pin PB8 (UART, SPI, I2C)
63PB9I/OMultiplexed I/O & Peripheral Pin PB9 (UART, I2C)
64PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, PWM)
PIN 1 PC11
I/O
Multiplexed I/O & Peripheral Pin PC11 (UART, PWM)
Design note: Alt: USART3_RXUSART4RX ,_ , TIM1_CH4
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 18 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32G070RBT6TR (ST · LQFP-64(10x10))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32G070RBT6TR (LQFP-64(10x10)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32G070RBT6TR (LQFP-64(10x10)) - 2. Standard Pinout (Top View)
True package pinout (64 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32G070RBT6TR (LQFP-64(10x10)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32G070RBT6TR (LQFP-64(10x10)) - 4. Package Dimensions (D×E×A)
LQFP-64(10x10) · 10.00×10.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32G070RBT6TR (LQFP-64(10x10)) - 5. Recommended Land Pattern
IPC-7351B Footprint (64 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32G070RBT6TR (LQFP-64(10x10)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (18 figures · Page 1/2)
Showing 1–12 of 18 uncropped original figures for STM32G070
P29 · p29_fig01EXACT PACKAGE
STM32G070RBT6TR (LQFP-64(10x10)) — Figure 3. STM32G070RxT LQFP64 pinout PC10 64 PC11 PC12 PC13
Figure 3. STM32G070RxT LQFP64 pinout PC10 64 PC11 PC12 PC13
P81 · p81_fig01EXACT PACKAGE
STM32G070RBT6TR (LQFP-64(10x10)) — Figure 25. LQFP64 package outline
Figure 25. LQFP64 package outline
P82 · p82_fig01EXACT PACKAGE
STM32G070RBT6TR (LQFP-64(10x10)) — Figure 26. Recommended footprint for LQFP64 package
Figure 26. Recommended footprint for LQFP64 package
P1 · p01_fig011241×492px
STM32G070RBT6TR (LQFP-64(10x10)) — Arm® Cortex®-M0+ 32-bit MCU, 128 KB Flash, 36 KB RAM, | 4x USART, timers, ADC, comm. I/Fs, 2.0-3.6V | Datasheet - production data |  Core: Arm® 32-bit Cortex®-M0+ CPU, frequency up to 64 MHz  -40°C to 85°C operating temperature  Memories
Arm® Cortex®-M0+ 32-bit MCU, 128 KB Flash, 36 KB RAM, | 4x USART, timers, ADC, comm. I/Fs, 2.0-3.6V | Datasheet - production data |  Core: Arm® 32-bit Cortex®-M0+ CPU, frequency up to 64 MHz  -40°C to 85°C operating temperature  Memories
P29 · p29_fig01P29
STM32G070RBT6TR (LQFP-64(10x10)) — Datasheet Page 29 (p29_fig01)
Datasheet Page 29 (p29_fig01)
P41 · p41_fig011546×1316px
STM32G070RBT6TR (LQFP-64(10x10)) — Figure 8. Power supply scheme
Figure 8. Power supply scheme
P41 · p41_fig021861×781px
STM32G070RBT6TR (LQFP-64(10x10)) — Figure 9. Current consumption measurement scheme
Figure 9. Current consumption measurement scheme
P41 · p41_fig01P41
STM32G070RBT6TR (LQFP-64(10x10)) — Datasheet Page 41 (p41_fig01)
Datasheet Page 41 (p41_fig01)
P55 · p55_fig011546×702px
STM32G070RBT6TR (LQFP-64(10x10)) — Figure 13. Typical application with an 8 MHz crystal
Figure 13. Typical application with an 8 MHz crystal
P56 · p56_fig011546×701px
STM32G070RBT6TR (LQFP-64(10x10)) — Figure 14. Typical application with a 32.768 kHz crystal
Figure 14. Typical application with a 32.768 kHz crystal
P71 · p71_fig011751×907px
STM32G070RBT6TR (LQFP-64(10x10)) — Figure 18. ADC accuracy characteristics
Figure 18. ADC accuracy characteristics
P71 · p71_fig021546×640px
STM32G070RBT6TR (LQFP-64(10x10)) — Figure 19. Typical connection diagram using the ADC
Figure 19. Typical connection diagram using the ADC
Page 1 / 2 (18 extracted figures)

Technical Specifications & Part Details (STM32G070RBT6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32G070RBT6TR (LQFP-64(10x10)) is a 64-pin embedded microcontroller unit (mcu) featuring a 10.00 × 10.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 2.0 V to 3.6 V supply operation across -40°C to 85°C with integrated UART, SPI, I2C, I2S, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
2.0 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to 85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
64 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
58 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
10.00 × 10.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-64(10x10))
Pin Count & Lead PitchN / e
64 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, I2S, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PA14BOOT0 -): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol64 auto-grouped pins
OK
IPC-7351B Land Pattern64 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — STM32G070 (2)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (LQFP-64(10x10))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
10.00 × 10.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.30 × 1.20 mm
Pins / Total PadsTopology
64P / 64Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-64(10x10)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32G070RBT6TR (LQFP-64(10x10))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32G070RBT6TR (LQFP-64(10x10))?

Manufactured by ST, the STM32G070RBT6TR is housed in a LQFP-64(10x10) package with 64 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 2.0 V to 3.6 V. Key pins include: 1 (PC11: Multiplexed I/O & Peripheral Pin PC11 (UART, PWM)), 2 (PC12: Multiplexed I/O & Peripheral Pin PC12 (General)), 3 (PC13: Multiplexed I/O & Peripheral Pin PC13 (RTC/CLK)), 4 (PC14 - OSC32_IN (PC14): Multiplexed I/O & Peripheral Pin PC14 - OSC32_IN (PC14) (RTC/CLK)), 5 (IO2: GPIO2 / RTC_GPIO2 / TOUCH2 / ADC1_CH1), 6 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))).

What are the IPC-7351B PCB Footprint dimensions for STM32G070RBT6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32G070RBT6TR (LQFP-64(10x10)) has a nominal body envelope of 10.00 × 10.00 mm, pitch e = 0.50 mm, and 64 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32G070RBT6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32G070RBT6TR (ST, LQFP-64(10x10)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (64 pins) & STM32G070 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: UART, PWM.
2PC12Digital_IOSignal terminal PC12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General.
3PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
4PC14 - OSC32_IN (PC14)Digital_IOSignal terminal PC14 - OSC32_IN (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC14 - OSC32_IN (PC14). Supported peripheral buses: RTC/CLK.
5IO2Digital_IOGPIO2 / RTC_GPIO2 / TOUCH2 / ADC1_CH1
6VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
7VREF+AnalogSignal terminal VREF+ (Analog, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREF+. Supported peripheral buses: General.
8VDD/VDDAPower_InPrimary positive power supply input (VDD/VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
9VSS/VSSAGND0V electrical ground return terminal (VSS/VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
10PF0 OSC IN -_ (PF0)Digital_IOSignal terminal PF0 OSC IN -_ (PF0) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF0 OSC IN -_ (PF0). Supported peripheral buses: RTC/CLK.
11PF1 - OSC_OUT (PF1)Digital_IOSignal terminal PF1 - OSC_OUT (PF1) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF1 - OSC_OUT (PF1). Supported peripheral buses: RTC/CLK.
12NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
13PC0Digital_IOSignal terminal PC0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC0. Supported peripheral buses: General.
14PC1Digital_IOSignal terminal PC1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC1. Supported peripheral buses: General.
15PC2Digital_IOSignal terminal PC2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISOTIM15CH2. Supported peripheral buses: SPI.
16PC3Digital_IOSignal terminal PC3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI.
17PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKUSART2CTS. Supported peripheral buses: UART, SPI, ADC.
18PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, I2C1_SMBAEVENTOUT. Supported peripheral buses: UART, SPI, I2C, ADC.
19PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI, ADC.
20PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISOUSART2RX. Supported peripheral buses: SPI, ADC.
21PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI2_MOSITIM14CH1. Supported peripheral buses: SPI, ADC.
22PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI, ADC.
23PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, ADC, PWM.
24PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
25PC4Digital_IOSignal terminal PC4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC4. Supported peripheral buses: UART, ADC.
26PC5Digital_IOSignal terminal PC5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC5. Supported peripheral buses: UART, ADC.
27PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, ADC, PWM.
28PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: UART, ADC, PWM.
29PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISOUSART3TX. Supported peripheral buses: SPI, ADC.
30PB10Digital_IOSignal terminal PB10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SCL. Supported peripheral buses: UART, I2C, ADC.
31PB11Digital_IOSignal terminal PB11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSIUSART3RX, I2C2_SDA. Supported peripheral buses: SPI, I2C, ADC.
32PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSSTIM1BKIN. Supported peripheral buses: SPI, ADC.
33PB13Digital_IOSignal terminal PB13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKTIM1CH1N, I2C2_SCLEVENTOUT. Supported peripheral buses: UART, SPI, I2C.
34PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISOTIM1CH2N. Supported peripheral buses: UART, SPI.
35PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSITIM1CH3N. Supported peripheral buses: SPI, RTC/CLK.
36PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, RTC/CLK.
37PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISOTIM15BKIN, I2C1_SCLEVENTOUT. Supported peripheral buses: UART, SPI, I2C, RTC/CLK.
38PC6Digital_IOSignal terminal PC6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC6. Supported peripheral buses: PWM.
39PC7Digital_IOSignal terminal PC7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC7. Supported peripheral buses: PWM.
40PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI.
41PD9Digital_IOSignal terminal PD9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI.
42PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSIUSART1RX, I2C1_SDAEVENTOUT. Supported peripheral buses: SPI, I2C, PWM.
43PA11 [PA9]Digital_IOSignal terminal PA11 [PA9] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI.
44PA12 [PA10]Digital_IOSignal terminal PA12 [PA10] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, I2C2_SDA. Supported peripheral buses: UART, SPI, I2C.
45PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: SWD/JTAG.
46PA14BOOT0 -Digital_IOSignal terminal PA14BOOT0 - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14BOOT0 -. Supported peripheral buses: UART, SWD/JTAG.
47PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI.
48PC8Digital_IOSignal terminal PC8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC8. Supported peripheral buses: PWM.
49PC9Digital_IOSignal terminal PC9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC9. Supported peripheral buses: PWM.
50PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI.
51PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI.
52PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
53PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: UART, PWM.
54PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSITIM1CH3N. Supported peripheral buses: UART, SPI.
55PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI.
56PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI.
57PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: UART, SPI.
58PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI, PWM.
59PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, I2C1_SMBA. Supported peripheral buses: SPI, I2C, PWM.
60PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SCLEVENTOUT. Supported peripheral buses: UART, I2C.
61PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDAEVENTOUT. Supported peripheral buses: UART, I2C.
62PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKTIM16CH1, I2C1_SCLEVENTOUT. Supported peripheral buses: UART, SPI, I2C.
63PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SDAEVENTOUT. Supported peripheral buses: UART, I2C.
64PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: UART, PWM.
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