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STM32WB15CCY6TR (WLCSP-49) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32WB15CCY6TR

STID: C5270043WLCSP-49 · 49 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32WB15CCY6TR (WLCSP-49)A1VDDSMPSA2PA11A3PA12A4VDDA5PB5A6PB7A7PC14-OSC32_IB1VLXSMPSB2PA13B3PA14B4PB4B5PB6B6PH3-BOOT0B7PC15-OSC32_OC1VSSSMPSC2PA10C3VSSC4PA0C5VBATC6PB8C7PB11/NRSTD1VDDD2VFBSMPSD3PA9D4PA5G7PA4G6PA8G5VDDG4RF1G3VSSRFG2VDDRFG1VSSRFF7PA1F6PA6F5VSSF4VSSF3AT1F2OSC_OUTF1OSC_INE7VDDAE6PA2E5PA7E4PB4E3AT0E2PB0E1PB1D7VDDD6VSSD5PA3Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.838.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1A2B2C2D2E2F2G2A3B3C3D3E3F3G3A4B4C4D4E4F4G4A5B5C5D5E5F5G5A6B6C6D6E6F6G6A7B7C7D7E7F7G7E=3.30mm · Pitch e=0.40mmD=3.30mm-3-2-101233210-1-2-3mm
3. 3D CAD MODEL
Package Body: 3.30mm × 3.30mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (49/49)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1VDDSMPSPowerPower Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
A2PA11I/OMultiplexed I/O & Peripheral Pin PA11 (General)
A3PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
A4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A5PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
A6PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
A7PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
B1VLXSMPSI/OMultiplexed I/O & Peripheral Pin VLXSMPS (General)
B2PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
B3PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
B4PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
B5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
B6PH3-BOOT0I/OMultiplexed I/O & Peripheral Pin PH3-BOOT0 (General)
B7PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
C1VSSSMPSGNDGround Reference Pin (VSSSMPS)
C2PA10I/OMultiplexed I/O & Peripheral Pin PA10 (General)
C3VSSGNDGround Reference Pin (VSS)
C4PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
C5VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
C6PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
C7PB11/NRSTI/OMultiplexed I/O & Peripheral Pin PB11/NRST (General)
D1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D2VFBSMPSI/OMultiplexed I/O & Peripheral Pin VFBSMPS (General)
D3PA9I/OMultiplexed I/O & Peripheral Pin PA9 (General)
D4PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
D5PA3I/OMultiplexed I/O & Peripheral Pin PA3 (General)
D6VSSGNDGround Reference Pin (VSS)
D7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
E1PB1I/OMultiplexed I/O & Peripheral Pin PB1 (General)
E2PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
E3AT0I/OMultiplexed I/O & Peripheral Pin AT0 (General)
E4PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
E5PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
E6PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
E7VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
F1OSC_INI/OMultiplexed I/O & Peripheral Pin OSC_IN (RTC/CLK)
F2OSC_OUTI/OMultiplexed I/O & Peripheral Pin OSC_OUT (RTC/CLK)
F3AT1I/OMultiplexed I/O & Peripheral Pin AT1 (General)
F4VSSGNDGround Reference Pin (VSS)
F5VSSGNDGround Reference Pin (VSS)
F6PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
F7PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
G1VSSRFGNDGround Reference Pin (VSSRF)
G2VDDRFPowerPower Supply Input (VDDRF — 3.3V VDD (Max 4.0V))
G3VSSRFGNDGround Reference Pin (VSSRF)
G4RF1I/OMultiplexed I/O & Peripheral Pin RF1 (General)
G5VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G6PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
G7PA4I/OMultiplexed I/O & Peripheral Pin PA4 (General)
PIN A1 VDDSMPS
Power
Power Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VDDSMPS) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32WB15CCY6TR (ST · WLCSP-49)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32WB15CCY6TR (WLCSP-49) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32WB15CCY6TR (WLCSP-49) - 2. Standard Pinout (Top View)
True package pinout (49 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32WB15CCY6TR (WLCSP-49) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32WB15CCY6TR (WLCSP-49) - 4. Package Dimensions (D×E×A)
WLCSP-49 · 3.30×3.30mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32WB15CCY6TR (WLCSP-49) - 5. Recommended Land Pattern
IPC-7351B Footprint (49 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32WB15CCY6TR (WLCSP-49) - 6. Application Schematic
Typical Application SchematicExpand ›

Technical Specifications & Part Details (STM32WB15CCY6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32WB15CCY6TR (WLCSP-49) is a 49-pin embedded microcontroller unit (mcu) featuring a 3.30 × 3.30 × 0.55 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
DC / Broadband Passive
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
3.30 × 3.30 × 0.55 mm (A1=0.18 mm)
Package family: WLCSP (WLCSP-49)
Pin Count & Lead PitchN / e
49 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol49 auto-grouped pins
OK
IPC-7351B Land Pattern49 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (WLCSP-49)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
3.30 × 3.30 mm
Height (A) & Pitch (e)IPC-7351B
A=0.55mm · e=0.40mm
Pad Size (W × L)Level B
0.21 × 0.21 mm
Pins / Total PadsTopology
49P / 49Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-49
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32WB15CCY6TR (WLCSP-49)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32WB15CCY6TR (WLCSP-49)?

Manufactured by ST, the STM32WB15CCY6TR is housed in a WLCSP-49 package with 49 pins and a 0.40 mm lead pitch. Key pins include: A1 (VDDSMPS: Power Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))), A2 (PA11: Multiplexed I/O & Peripheral Pin PA11 (General)), A3 (PA12: Multiplexed I/O & Peripheral Pin PA12 (General)), A4 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A5 (PB5: Multiplexed I/O & Peripheral Pin PB5 (General)), A6 (PB7: Multiplexed I/O & Peripheral Pin PB7 (General)).

What are the IPC-7351B PCB Footprint dimensions for STM32WB15CCY6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32WB15CCY6TR (WLCSP-49) has a nominal body envelope of 3.30 × 3.30 mm, pitch e = 0.40 mm, and 49 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32WB15CCY6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32WB15CCY6TR (ST, WLCSP-49) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (49 pins) & STM32WB15 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1VDDSMPSPower_InPrimary positive power supply input (VDDSMPS) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A2PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA11. Supported peripheral buses: General.
A3PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
A4VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A5PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
A6PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
A7PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
B1VLXSMPSDigital_IOSignal terminal VLXSMPS (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VLXSMPS. Supported peripheral buses: General.
B2PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
B3PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
B4PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
B5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
B6PH3-BOOT0Digital_IOSignal terminal PH3-BOOT0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH3-BOOT0. Supported peripheral buses: General.
B7PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
C1VSSSMPSGND0V electrical ground return terminal (VSSSMPS) for internal core logic, I/O drivers, and analog sub-blocks.
C2PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA10. Supported peripheral buses: General.
C3VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C4PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: General.
C5VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C6PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
C7PB11/NRSTDigital_IOSignal terminal PB11/NRST (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB11/NRST. Supported peripheral buses: General.
D1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D2VFBSMPSDigital_IOSignal terminal VFBSMPS (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VFBSMPS. Supported peripheral buses: General.
D3PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA9. Supported peripheral buses: General.
D4PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
D5PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA3. Supported peripheral buses: General.
D6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
D7VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E1PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: General.
E2PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB0. Supported peripheral buses: General.
E3AT0Digital_IOSignal terminal AT0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: AT0. Supported peripheral buses: General.
E4PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
E5PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General.
E6PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
E7VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
F1OSC_INDigital_IOSignal terminal OSC_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: OSC_IN. Supported peripheral buses: RTC/CLK.
F2OSC_OUTDigital_IOSignal terminal OSC_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: OSC_OUT. Supported peripheral buses: RTC/CLK.
F3AT1Digital_IOSignal terminal AT1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: AT1. Supported peripheral buses: General.
F4VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F5VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
F6PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
F7PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
G1VSSRFGND0V electrical ground return terminal (VSSRF) for internal core logic, I/O drivers, and analog sub-blocks.
G2VDDRFPower_InPrimary positive power supply input (VDDRF) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
G3VSSRFGND0V electrical ground return terminal (VSSRF) for internal core logic, I/O drivers, and analog sub-blocks.
G4RF1Digital_IOSignal terminal RF1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: RF1. Supported peripheral buses: General.
G5VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
G6PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
G7PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA4. Supported peripheral buses: General.
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