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ATA6613C-PLQW-1 (VQFN-48(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

ATA6613C-PLQW-1

MICROCHIPID: C5225747VQFN-48(7x7) · 49 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · ATA6613C-PLQW-1 (VQFN-48(7x7))1PB52MCUAVCC3ADC64AREF5GND46ADC77PC08PC19PC210PC311PC412PC513PC614PD015PD116PD217RXD18INH19TXD20NRES21WD_OSC22TM23MODE24KL_1525PVCC49PAD48PB447PB346PB245PB144PB043PD742PD641PD540PB739PB638MCUVCC37GND236MCUVCC35GND134PD433PD332LIN31GND30WAKE29NTRIG28EN27VS26VCCGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.838.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1mm
2. 2D FOOTPRINT
12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849E=7.00mm · Pitch e=0.50mmD=7.00mm-6-5-4-3-2-101234566543210-1-2-3-4-5-6mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (49/49)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI)
2MCUAVCCPowerPower Supply Input (MCUAVCC — 5V to 27V)
3ADC6IInput-Only Pin ADC6 (ADC)
4AREFI/OMultiplexed I/O & Peripheral Pin AREF (ADC)
5GND4GNDGround Reference Pin (GND4)
6ADC7IInput-Only Pin ADC7 (ADC)
7PC0I/OMultiplexed I/O & Peripheral Pin PC0 (ADC)
8PC1I/OMultiplexed I/O & Peripheral Pin PC1 (ADC)
9PC2I/OMultiplexed I/O & Peripheral Pin PC2 (ADC)
10PC3I/OMultiplexed I/O & Peripheral Pin PC3 (ADC)
11PC4I/OMultiplexed I/O & Peripheral Pin PC4 (I2C, ADC)
12PC5I/OMultiplexed I/O & Peripheral Pin PC5 (I2C, ADC)
13PC6I/OMultiplexed I/O & Peripheral Pin PC6 (General)
14PD0I/OMultiplexed I/O & Peripheral Pin PD0 (UART)
15PD1I/OMultiplexed I/O & Peripheral Pin PD1 (UART)
16PD2I/OMultiplexed I/O & Peripheral Pin PD2 (General)
17RXDI/OMultiplexed I/O & Peripheral Pin RXD (UART)
18INHI/OMultiplexed I/O & Peripheral Pin INH (General)
19TXDI/OMultiplexed I/O & Peripheral Pin TXD (UART)
20NRESI/OMultiplexed I/O & Peripheral Pin NRES (General)
21WD_OSCI/OMultiplexed I/O & Peripheral Pin WD_OSC (RTC/CLK)
22TMI/OMultiplexed I/O & Peripheral Pin TM (General)
23MODEI/OMultiplexed I/O & Peripheral Pin MODE (General)
24KL_15I/OMultiplexed I/O & Peripheral Pin KL_15 (General)
25PVCCPowerPower Supply Input (PVCC — 5V to 27V)
26VCCPowerRegulated Power Output (VCC — 5V to 27V)
27VSI/OMultiplexed I/O & Peripheral Pin VS (General)
28ENISystem Enable & Hardware Reset (EN)
29NTRIGAnalogMultiplexed I/O & Peripheral Pin NTRIG (General)
30WAKEI/OMultiplexed I/O & Peripheral Pin WAKE (General)
31GNDGNDGround Reference Pin (GND)
32LINI/OMultiplexed I/O & Peripheral Pin LIN (General)
33PD3I/OMultiplexed I/O & Peripheral Pin PD3 (General)
34PD4I/OMultiplexed I/O & Peripheral Pin PD4 (General)
35GND1GNDGround Reference Pin (GND1)
36MCUVCCPowerPower Supply Input (MCUVCC — 5V to 27V)
37GND2GNDGround Reference Pin (GND2)
38MCUVCCPowerPower Supply Input (MCUVCC — 5V to 27V)
39PB6I/OMultiplexed I/O & Peripheral Pin PB6 (RTC/CLK)
40PB7I/OMultiplexed I/O & Peripheral Pin PB7 (RTC/CLK)
41PD5I/OMultiplexed I/O & Peripheral Pin PD5 (PWM)
42PD6I/OMultiplexed I/O & Peripheral Pin PD6 (ADC, PWM)
43PD7I/OMultiplexed I/O & Peripheral Pin PD7 (ADC)
44PB0I/OMultiplexed I/O & Peripheral Pin PB0 (General)
45PB1I/OMultiplexed I/O & Peripheral Pin PB1 (PWM)
46PB2I/OMultiplexed I/O & Peripheral Pin PB2 (PWM)
47PB3I/OMultiplexed I/O & Peripheral Pin PB3 (SPI, PWM)
48PB4I/OMultiplexed I/O & Peripheral Pin PB4 (SPI)
49PADI/OMultiplexed I/O & Peripheral Pin PAD (General)
PIN 1 PB5
I/O
Multiplexed I/O & Peripheral Pin PB5 (SPI)
Design note: PortB5I/Oline(SCK/PCINT5)
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 5 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: ATA6613C-PLQW-1 (MICROCHIP · VQFN-48(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
ATA6613C-PLQW-1 (VQFN-48(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
ATA6613C-PLQW-1 (VQFN-48(7x7)) - 2. Standard Pinout (Top View)
True package pinout (49 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
ATA6613C-PLQW-1 (VQFN-48(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
ATA6613C-PLQW-1 (VQFN-48(7x7)) - 4. Package Dimensions (D×E×A)
VQFN-48(7x7) · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
ATA6613C-PLQW-1 (VQFN-48(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (49 Pads)Expand ›
6. Application SchematicSCHEMATIC
ATA6613C-PLQW-1 (VQFN-48(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (5 figures · Page 1/1)
Showing 1–5 of 5 uncropped original figures for ATA6613
P3 · p03_fig01EXACT PACKAGE
ATA6613C-PLQW-1 (VQFN-48(7x7)) — Figure 1-1. Pinning QFN48, 7mm × 7mm
Figure 1-1. Pinning QFN48, 7mm × 7mm
P306 · p306_fig01EXACT PACKAGE
ATA6613C-PLQW-1 (VQFN-48(7x7)) — ATA6612C/ATA6613C [DATASHEET] | 9111L-AUTO-11/14 306 | 9. Package Information | 8. Ordering Information | Extended Type Number Program Memory Package MOQ | ATA6612C-PLQW-1 8kB flash QFN48, 7×7 4,000 pieces | ATA6613C-PLQW-1 16kB flash QFN48
ATA6612C/ATA6613C [DATASHEET] | 9111L-AUTO-11/14 306 | 9. Package Information | 8. Ordering Information | Extended Type Number Program Memory Package MOQ | ATA6612C-PLQW-1 8kB flash QFN48, 7×7 4,000 pieces | ATA6613C-PLQW-1 16kB flash QFN48
P2 · p02_fig01898×425px
ATA6613C-PLQW-1 (VQFN-48(7x7)) — Figure 1. Application Diagram
Figure 1. Application Diagram
P306 · p306_fig01P306
ATA6613C-PLQW-1 (VQFN-48(7x7)) — Datasheet Page 306 (p306_fig01)
Datasheet Page 306 (p306_fig01)
P308 · p308_fig011994×2426px
ATA6613C-PLQW-1 (VQFN-48(7x7)) — ATA6612C/ATA6613C [DATASHEET] | 9111L-AUTO-11/14 308 | Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. | Revision No. History | 9111L-AUTO-11/14 | • Put
ATA6612C/ATA6613C [DATASHEET] | 9111L-AUTO-11/14 308 | Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. | Revision No. History | 9111L-AUTO-11/14 | • Put

Technical Specifications & Part Details (ATA6613C-PLQW-1)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:ATA6613C-PLQW-1 (VQFN-48(7x7)) is a 48-pin standard electronic & interconnect component featuring a 7.00 × 7.00 × 0.85 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 5V to 27V supply operation across 40°C to +125°C with integrated UART, SPI, I2C, ADC, PWM, RTC/CLK interfaces.
Operating Supply VoltageV_CC / V_DD
5V to 27V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
40°C to +125°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
200kHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 0.85 mm (A1=0.03 mm)
Package family: QFN (VQFN-48(7x7))
Pin Count & Lead PitchN / e
48 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, ADC, PWM, RTC/CLK
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol49 auto-grouped pins
OK
IPC-7351B Land Pattern49 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteEPAD 5.30×5.30mm windowed grid
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (VQFN-48(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.85mm · e=0.50mm
Pad Size (W × L)Level B
0.28 × 0.80 mm
Pins / Total PadsTopology
49P / 49Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
VQFN-48(7x7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — ATA6613C-PLQW-1 (VQFN-48(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of ATA6613C-PLQW-1 (VQFN-48(7x7))?

Manufactured by MICROCHIP, the ATA6613C-PLQW-1 is housed in a VQFN-48(7x7) package with 49 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 5V to 27V. Key pins include: 1 (PB5: Multiplexed I/O & Peripheral Pin PB5 (SPI)), 2 (MCUAVCC: Power Supply Input (MCUAVCC — 5V to 27V)), 3 (ADC6: Input-Only Pin ADC6 (ADC)), 4 (AREF: Multiplexed I/O & Peripheral Pin AREF (ADC)), 5 (GND4: Ground Reference Pin (GND4)), 6 (ADC7: Input-Only Pin ADC7 (ADC)).

What are the IPC-7351B PCB Footprint dimensions for ATA6613C-PLQW-1?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), ATA6613C-PLQW-1 (VQFN-48(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 49 copper pads plus a central exposed thermal pad (EPAD) of 5.30 × 5.30 mm with a 60% IPC-7525 windowed solder paste grid.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for ATA6613C-PLQW-1?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for ATA6613C-PLQW-1 (MICROCHIP, VQFN-48(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (49 pins) & ATA6613 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PB5Digital_IOSignal terminal PB5 (I/O, 5V to 27V domain). Multiplexed alternate functions: PB5. Supported peripheral buses: SPI.
2MCUAVCCPower_InPrimary positive power supply input (MCUAVCC) operating in the 5V to 27V domain (Max rating: 27.0V).
3ADC6AnalogSignal terminal ADC6 (I, 5V to 27V domain). Multiplexed alternate functions: ADC6. Supported peripheral buses: ADC.
4AREFDigital_IOSignal terminal AREF (I/O, 5V to 27V domain). Multiplexed alternate functions: AREF. Supported peripheral buses: ADC.
5GND4GND0V electrical ground return terminal (GND4) for internal core logic, I/O drivers, and analog sub-blocks.
6ADC7AnalogSignal terminal ADC7 (I, 5V to 27V domain). Multiplexed alternate functions: ADC7. Supported peripheral buses: ADC.
7PC0Digital_IOSignal terminal PC0 (I/O, 5V to 27V domain). Multiplexed alternate functions: PC0. Supported peripheral buses: ADC.
8PC1Digital_IOSignal terminal PC1 (I/O, 5V to 27V domain). Multiplexed alternate functions: PC1. Supported peripheral buses: ADC.
9PC2Digital_IOSignal terminal PC2 (I/O, 5V to 27V domain). Multiplexed alternate functions: PC2. Supported peripheral buses: ADC.
10PC3Digital_IOSignal terminal PC3 (I/O, 5V to 27V domain). Multiplexed alternate functions: PC3. Supported peripheral buses: ADC.
11PC4Digital_IOSignal terminal PC4 (I/O, 5V to 27V domain). Multiplexed alternate functions: PC4. Supported peripheral buses: I2C, ADC.
12PC5Digital_IOSignal terminal PC5 (I/O, 5V to 27V domain). Multiplexed alternate functions: PC5. Supported peripheral buses: I2C, ADC.
13PC6Digital_IOSignal terminal PC6 (I/O, 5V to 27V domain). Multiplexed alternate functions: PC6. Supported peripheral buses: General.
14PD0Digital_IOSignal terminal PD0 (I/O, 5V to 27V domain). Multiplexed alternate functions: PD0. Supported peripheral buses: UART.
15PD1Digital_IOSignal terminal PD1 (I/O, 5V to 27V domain). Multiplexed alternate functions: PD1. Supported peripheral buses: UART.
16PD2Digital_IOSignal terminal PD2 (I/O, 5V to 27V domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General.
17RXDDigital_IOSignal terminal RXD (I/O, 5V to 27V domain). Multiplexed alternate functions: RXD. Supported peripheral buses: UART.
18INHDigital_IOSignal terminal INH (I/O, 5V to 27V domain). Multiplexed alternate functions: INH. Supported peripheral buses: General.
19TXDDigital_IOSignal terminal TXD (I/O, 5V to 27V domain). Multiplexed alternate functions: TXD. Supported peripheral buses: UART.
20NRESDigital_IOSignal terminal NRES (I/O, 5V to 27V domain). Multiplexed alternate functions: NRES. Supported peripheral buses: General.
21WD_OSCDigital_IOSignal terminal WD_OSC (I/O, 5V to 27V domain). Multiplexed alternate functions: WD_OSC. Supported peripheral buses: RTC/CLK.
22TMDigital_IOSignal terminal TM (I/O, 5V to 27V domain). Multiplexed alternate functions: TM. Supported peripheral buses: General.
23MODEDigital_IOSignal terminal MODE (I/O, 5V to 27V domain). Multiplexed alternate functions: MODE. Supported peripheral buses: General.
24KL_15Digital_IOSignal terminal KL_15 (I/O, 5V to 27V domain). Multiplexed alternate functions: KL_15. Supported peripheral buses: General.
25PVCCPower_InPrimary positive power supply input (PVCC) operating in the 5V to 27V domain (Max rating: 27.0V).
26VCCPower_OutRegulated power output rail (VCC) operating in the 5V to 27V domain (Max rating: 27.0V).
27VSDigital_IOSignal terminal VS (I/O, 5V to 27V domain). Multiplexed alternate functions: VS. Supported peripheral buses: General.
28ENDigital_IOChip enable and power-on reset control input (EN): High enables the SoC; Low powers down the chip into reset.
29NTRIGAnalogSignal terminal NTRIG (Analog, 5V to 27V domain). Multiplexed alternate functions: NTRIG. Supported peripheral buses: General.
30WAKEDigital_IOSignal terminal WAKE (I/O, 5V to 27V domain). Multiplexed alternate functions: WAKE. Supported peripheral buses: General.
31GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
32LINDigital_IOSignal terminal LIN (I/O, 5V to 27V domain). Multiplexed alternate functions: LIN. Supported peripheral buses: General.
33PD3Digital_IOSignal terminal PD3 (I/O, 5V to 27V domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General.
34PD4Digital_IOSignal terminal PD4 (I/O, 5V to 27V domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General.
35GND1GND0V electrical ground return terminal (GND1) for internal core logic, I/O drivers, and analog sub-blocks.
36MCUVCCPower_InPrimary positive power supply input (MCUVCC) operating in the 5V to 27V domain (Max rating: 27.0V).
37GND2GND0V electrical ground return terminal (GND2) for internal core logic, I/O drivers, and analog sub-blocks.
38MCUVCCPower_InPrimary positive power supply input (MCUVCC) operating in the 5V to 27V domain (Max rating: 27.0V).
39PB6Digital_IOSignal terminal PB6 (I/O, 5V to 27V domain). Multiplexed alternate functions: PB6. Supported peripheral buses: RTC/CLK.
40PB7Digital_IOSignal terminal PB7 (I/O, 5V to 27V domain). Multiplexed alternate functions: PB7. Supported peripheral buses: RTC/CLK.
41PD5Digital_IOSignal terminal PD5 (I/O, 5V to 27V domain). Multiplexed alternate functions: PD5. Supported peripheral buses: PWM.
42PD6Digital_IOSignal terminal PD6 (I/O, 5V to 27V domain). Multiplexed alternate functions: PD6. Supported peripheral buses: ADC, PWM.
43PD7Digital_IOSignal terminal PD7 (I/O, 5V to 27V domain). Multiplexed alternate functions: PD7. Supported peripheral buses: ADC.
44PB0Digital_IOSignal terminal PB0 (I/O, 5V to 27V domain). Multiplexed alternate functions: PB0. Supported peripheral buses: General.
45PB1Digital_IOSignal terminal PB1 (I/O, 5V to 27V domain). Multiplexed alternate functions: PB1. Supported peripheral buses: PWM.
46PB2Digital_IOSignal terminal PB2 (I/O, 5V to 27V domain). Multiplexed alternate functions: PB2. Supported peripheral buses: PWM.
47PB3Digital_IOSignal terminal PB3 (I/O, 5V to 27V domain). Multiplexed alternate functions: PB3. Supported peripheral buses: SPI, PWM.
48PB4Digital_IOSignal terminal PB4 (I/O, 5V to 27V domain). Multiplexed alternate functions: PB4. Supported peripheral buses: SPI.
49PADDigital_IOSignal terminal PAD (I/O, 5V to 27V domain). Multiplexed alternate functions: PAD. Supported peripheral buses: General.
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