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STM32C051F6P6 (TSSOP-20) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32C051F6P6

STID: C45066857TSSOP-20 · 20 Pins · Pitch 0.65mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32C051F6P6 (TSSOP-20)1PB82PC14 - OSCX_3PC15 - OSCX_4VDD/VDDA5VSS/VSSA6PF2 NRST -7PA08PA19PA210PA320PB619PA1518PA1317PA12[PA10]16PA11[PA9]15PA814PA713PA612PA511PA4Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.817.812.77.62.5-2.5-7.6-12.7-17.8mm
2. 2D FOOTPRINT
1234567891011121314151617181920E=4.40mm · Pitch e=0.65mmD=6.50mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 4.40mm × 6.50mm · Pitch: 0.65mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (20/20)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1PB8I/OMultiplexed I/O & Peripheral Pin PB8 (UART, SPI)
2PC14 - OSCX_IN (PC14)I/OMultiplexed I/O & Peripheral Pin PC14 - OSCX_IN (PC14) (UART, SPI, RTC/CLK)
3PC15 - OSCX_OUT (PC15)I/OMultiplexed I/O & Peripheral Pin PC15 - OSCX_OUT (PC15) (PWM, RTC/CLK)
4VDD/VDDAPowerPower Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))
5VSS/VSSAGNDGround Reference Pin (VSS/VSSA)
6PF2 NRST -I/OMultiplexed I/O & Peripheral Pin PF2 NRST - (RTC/CLK)
7PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, SPI, ADC, PWM)
8PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, I2C, ADC)
9PA2I/OMultiplexed I/O & Peripheral Pin PA2 (SPI, ADC, PWM)
10PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, SPI, ADC)
11PA4I/OMultiplexed I/O & Peripheral Pin PA4 (SPI, ADC, RTC/CLK)
12PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC)
13PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, I2C, ADC)
14PA7I/OMultiplexed I/O & Peripheral Pin PA7 (UART, SPI, ADC)
15PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, SPI, ADC, PWM, RTC/CLK)
16PA11[PA9]I/OMultiplexed I/O & Peripheral Pin PA11[PA9] (UART, SPI, I2C, ADC, PWM)
17PA12[PA10]I/OMultiplexed I/O & Peripheral Pin PA12[PA10] (UART, SPI, ADC)
18PA13I/OMultiplexed I/O & Peripheral Pin PA13 (UART, ADC, SWD/JTAG)
19PA15I/OMultiplexed I/O & Peripheral Pin PA15 (UART, SPI, PWM, RTC/CLK)
20PB6I/OMultiplexed I/O & Peripheral Pin PB6 (UART, SPI, I2C, PWM)
PIN 1 PB8
I/O
Multiplexed I/O & Peripheral Pin PB8 (UART, SPI)
Design note: Alt: USART2 CTS/USART2_NSSTIM16CH1_ ,_ , TIM3 CH1 SPI2_SCKI2C1SCL ,_ ,_ , EVENTOUT
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 18 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32C051F6P6 (ST · TSSOP-20)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32C051F6P6 (TSSOP-20) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32C051F6P6 (TSSOP-20) - 2. Standard Pinout (Top View)
True package pinout (20 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32C051F6P6 (TSSOP-20) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32C051F6P6 (TSSOP-20) - 4. Package Dimensions (D×E×A)
TSSOP-20 · 4.40×6.50mm · Pitch 0.65mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32C051F6P6 (TSSOP-20) - 5. Recommended Land Pattern
IPC-7351B Footprint (20 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32C051F6P6 (TSSOP-20) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (18 figures · Page 1/2)
Showing 1–12 of 18 uncropped original figures for STM32C051
P1 · p01_fig01EXACT PACKAGE
STM32C051F6P6 (TSSOP-20) — Arm®Cortex®-M0+ 32-bit MCU, 64 KB flash, 12 KB RAM, | 2 x USART, timers, ADC, comm. I/Fs, 2-3.6V | Datasheet - production data | LQFP48 | LQFP32 | (7 × 7 mm) | (7 × 7 mm) TSSOP20 (6.5 × 4.4 mm) | UFQFPN28 (4 × 4 mm) | UFQFPN32 (5 × 5 mm) |
Arm®Cortex®-M0+ 32-bit MCU, 64 KB flash, 12 KB RAM, | 2 x USART, timers, ADC, comm. I/Fs, 2-3.6V | Datasheet - production data | LQFP48 | LQFP32 | (7 × 7 mm) | (7 × 7 mm) TSSOP20 (6.5 × 4.4 mm) | UFQFPN28 (4 × 4 mm) | UFQFPN32 (5 × 5 mm) |
P27 · p27_fig01EXACT PACKAGE
STM32C051F6P6 (TSSOP-20) — Figure 3. STM32C051DxY WLCSP15 ballout
Figure 3. STM32C051DxY WLCSP15 ballout
P27 · p27_fig02EXACT PACKAGE
STM32C051F6P6 (TSSOP-20) — Figure 4. STM32C051FxP TSSOP20 pinout
Figure 4. STM32C051FxP TSSOP20 pinout
P89 · p89_fig01EXACT PACKAGE
STM32C051F6P6 (TSSOP-20) — Figure 35. TSSOP20 - Outline
Figure 35. TSSOP20 - Outline
P28 · p28_fig011546×707px
STM32C051F6P6 (TSSOP-20) — Figure 5. STM32C051GxU UFQFPN28 pinout Top view
Figure 5. STM32C051GxU UFQFPN28 pinout Top view
P28 · p28_fig021546×761px
STM32C051F6P6 (TSSOP-20) — Figure 6. STM32C051KxT LQFP32 pinout
Figure 6. STM32C051KxT LQFP32 pinout
P28 · p28_fig031546×796px
STM32C051F6P6 (TSSOP-20) — Figure 7. STM32C051KxU UFQFPN32 pinout
Figure 7. STM32C051KxU UFQFPN32 pinout
P29 · p29_fig011546×930px
STM32C051F6P6 (TSSOP-20) — Figure 8. STM32C051CxT LQFP48 pinout
Figure 8. STM32C051CxT LQFP48 pinout
P29 · p29_fig021546×918px
STM32C051F6P6 (TSSOP-20) — Figure 9. STM32C051CxU UFQFPN48 pinout
Figure 9. STM32C051CxU UFQFPN48 pinout
P40 · p40_fig011546×1119px
STM32C051F6P6 (TSSOP-20) — Figure 12. Power supply scheme
Figure 12. Power supply scheme
P40 · p40_fig021551×614px
STM32C051F6P6 (TSSOP-20) — Figure 13. Current consumption measurement scheme
Figure 13. Current consumption measurement scheme
P40 · p40_fig01P40
STM32C051F6P6 (TSSOP-20) — Datasheet Page 40 (p40_fig01)
Datasheet Page 40 (p40_fig01)
Page 1 / 2 (18 extracted figures)

Technical Specifications & Part Details (STM32C051F6P6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32C051F6P6 (TSSOP-20) is a 20-pin embedded microcontroller unit (mcu) featuring a 6.50 × 4.40 × 1.20 mm mechanical envelope (lead pitch e = 0.65 mm). Rated for 2.0 V to 3.6 V supply operation across -40°C to 85°C with integrated UART, SPI, I2C, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
2.0 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C to 85°C
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
48 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
18 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
6.50 × 4.40 × 1.20 mm (A1=0.10 mm)
Package family: TSSOP (TSSOP-20)
Pin Count & Lead PitchN / e
20 Pins | Pitch e = 0.65 mm (25.6 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
UART, SPI, I2C, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol20 auto-grouped pins
OK
IPC-7351B Land Pattern20 pads · Pitch 0.65mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — STM32C051 (3)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (TSSOP-20)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
6.50 × 4.40 mm
Height (A) & Pitch (e)IPC-7351B
A=1.20mm · e=0.65mm
Pad Size (W × L)Level B
0.42 × 1.45 mm
Pins / Total PadsTopology
20P / 20Pad (DUAL_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
TSSOP-20
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32C051F6P6 (TSSOP-20)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32C051F6P6 (TSSOP-20)?

Manufactured by ST, the STM32C051F6P6 is housed in a TSSOP-20 package with 20 pins and a 0.65 mm lead pitch, supporting a VCC supply range of 2.0 V to 3.6 V. Key pins include: 1 (PB8: Multiplexed I/O & Peripheral Pin PB8 (UART, SPI)), 2 (PC14 - OSCX_IN (PC14): Multiplexed I/O & Peripheral Pin PC14 - OSCX_IN (PC14) (UART, SPI, RTC/CLK)), 3 (PC15 - OSCX_OUT (PC15): Multiplexed I/O & Peripheral Pin PC15 - OSCX_OUT (PC15) (PWM, RTC/CLK)), 4 (VDD/VDDA: Power Supply Input (VDD/VDDA — 3.3V VDD (Max 4.0V))), 5 (VSS/VSSA: Ground Reference Pin (VSS/VSSA)), 6 (PF2 NRST -: Multiplexed I/O & Peripheral Pin PF2 NRST - (RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for STM32C051F6P6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32C051F6P6 (TSSOP-20) has a nominal body envelope of 4.40 × 6.50 mm, pitch e = 0.65 mm, and 20 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32C051F6P6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32C051F6P6 (ST, TSSOP-20) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (20 pins) & STM32C051 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCKI2C1SCL. Supported peripheral buses: UART, SPI.
2PC14 - OSCX_IN (PC14)Digital_IOSignal terminal PC14 - OSCX_IN (PC14) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSSI2C1SDA. Supported peripheral buses: UART, SPI, RTC/CLK.
3PC15 - OSCX_OUT (PC15)Digital_IOSignal terminal PC15 - OSCX_OUT (PC15) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC15 - OSCX_OUT (PC15). Supported peripheral buses: PWM, RTC/CLK.
4VDD/VDDAPower_InPrimary positive power supply input (VDD/VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
5VSS/VSSAGND0V electrical ground return terminal (VSS/VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
6PF2 NRST -Digital_IOSignal terminal PF2 NRST - (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF2 NRST -. Supported peripheral buses: RTC/CLK.
7PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, ADC, PWM.
8PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, I2C1_SMBAEVENTOUT. Supported peripheral buses: UART, SPI, I2C, ADC.
9PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
10PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI, ADC.
11PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI2_MOSITIM14CH1. Supported peripheral buses: SPI, ADC, RTC/CLK.
12PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC.
13PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, I2C2_SDA. Supported peripheral buses: UART, SPI, I2C, ADC.
14PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI, ADC.
15PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS, SPI2_MISO, SPI1_NSS. Supported peripheral buses: UART, SPI, ADC, PWM, RTC/CLK.
16PA11[PA9]Digital_IOSignal terminal PA11[PA9] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, I2C2_SCL. Supported peripheral buses: UART, SPI, I2C, ADC, PWM.
17PA12[PA10]Digital_IOSignal terminal PA12[PA10] (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI, ADC.
18PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: UART, ADC, SWD/JTAG.
19PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS. Supported peripheral buses: UART, SPI, PWM, RTC/CLK.
20PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO, SPI1_MOSI, SPI1_SCK. Supported peripheral buses: UART, SPI, I2C, PWM.
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