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STM32WBA55HGF6TR (WLCSP-41) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32WBA55HGF6TR

STID: C43650244WLCSP-41 · 41 Pins · Pitch 0.40mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32WBA55HGF6TR (WLCSP-41)A6VDDRFA8OSC_INA10VDDA12VSSSMPSB5VDDANAB7OSC_OUTB9VSSB11VDD11B13VDDSMPSC2RFC4VDDHPAC6VDDRFPAC8PH3-BOOT0C10PB12C12VLXSMPSD1VSSRFD3VSSRFD5VSSRFD7PA8D9PA6D11PA7G12PA0G10PB8G8PC14-OSC32_IG6VSSG4VDDG2PB3F13PA5F11PA2F9PB9F7PC15-OSC32_OF5PB4F3PA15F1PA14E12VDDAE10PA1E8PA13E6PA12E4PB15E2NRSTD13VSSAGrid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.833.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0mm
2. 2D FOOTPRINT
D1F1C2E2G2D3F3C4E4G4B5D5F5A6C6E6G6B7D7F7A8C8E8G8B9D9F9A10C10E10G10B11D11F11A12C12E12G12B13D13F13E=3.00mm · Pitch e=0.40mmD=2.80mm-3-2-101233210-1-2-3mm
3. 3D CAD MODEL
Package Body: 3.00mm × 2.80mm · Pitch: 0.40mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (41/41)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A6VDDRFPowerPower Supply Input (VDDRF — 3.3V VDD (Max 4.0V))
A8OSC_INI/OMultiplexed I/O & Peripheral Pin OSC_IN (RTC/CLK)
A10VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A12VSSSMPSGNDGround Reference Pin (VSSSMPS)
B5VDDANAPowerPower Supply Input (VDDANA — 3.3V VDD (Max 4.0V))
B7OSC_OUTI/OMultiplexed I/O & Peripheral Pin OSC_OUT (RTC/CLK)
B9VSSGNDGround Reference Pin (VSS)
B11VDD11PowerPower Supply Input (VDD11 — 3.3V VDD (Max 4.0V))
B13VDDSMPSPowerPower Supply Input (VDDSMPS — 3.3V VDD (Max 4.0V))
C2RFI/OMultiplexed I/O & Peripheral Pin RF (General)
C4VDDHPAPowerPower Supply Input (VDDHPA — 3.3V VDD (Max 4.0V))
C6VDDRFPAPowerPower Supply Input (VDDRFPA — 3.3V VDD (Max 4.0V))
C8PH3-BOOT0I/OMultiplexed I/O & Peripheral Pin PH3-BOOT0 (General)
C10PB12I/OMultiplexed I/O & Peripheral Pin PB12 (General)
C12VLXSMPSI/OMultiplexed I/O & Peripheral Pin VLXSMPS (General)
D1VSSRFGNDGround Reference Pin (VSSRF)
D3VSSRFGNDGround Reference Pin (VSSRF)
D5VSSRFGNDGround Reference Pin (VSSRF)
D7PA8I/OMultiplexed I/O & Peripheral Pin PA8 (General)
D9PA6I/OMultiplexed I/O & Peripheral Pin PA6 (General)
D11PA7I/OMultiplexed I/O & Peripheral Pin PA7 (General)
D13VSSAGNDGround Reference Pin (VSSA)
E2NRSTISystem Enable & Hardware Reset (NRST)
E4PB15I/OMultiplexed I/O & Peripheral Pin PB15 (General)
E6PA12I/OMultiplexed I/O & Peripheral Pin PA12 (General)
E8PA13I/OMultiplexed I/O & Peripheral Pin PA13 (General)
E10PA1I/OMultiplexed I/O & Peripheral Pin PA1 (General)
E12VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
F1PA14I/OMultiplexed I/O & Peripheral Pin PA14 (General)
F3PA15I/OMultiplexed I/O & Peripheral Pin PA15 (General)
F5PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
F7PC15-OSC32_OUTI/OMultiplexed I/O & Peripheral Pin PC15-OSC32_OUT (RTC/CLK)
F9PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
F11PA2I/OMultiplexed I/O & Peripheral Pin PA2 (General)
F13PA5I/OMultiplexed I/O & Peripheral Pin PA5 (General)
G2PB3I/OMultiplexed I/O & Peripheral Pin PB3 (General)
G4VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G6VSSGNDGround Reference Pin (VSS)
G8PC14-OSC32_INI/OMultiplexed I/O & Peripheral Pin PC14-OSC32_IN (RTC/CLK)
G10PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
G12PA0I/OMultiplexed I/O & Peripheral Pin PA0 (General)
PIN A6 VDDRF
Power
Power Supply Input (VDDRF — 3.3V VDD (Max 4.0V))
Design note: Primary positive power supply input (VDDRF) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 17 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32WBA55HGF6TR (ST · WLCSP-41)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32WBA55HGF6TR (WLCSP-41) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32WBA55HGF6TR (WLCSP-41) - 2. Standard Pinout (Top View)
True package pinout (41 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32WBA55HGF6TR (WLCSP-41) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32WBA55HGF6TR (WLCSP-41) - 4. Package Dimensions (D×E×A)
WLCSP-41 · 3.00×2.80mm · Pitch 0.40mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32WBA55HGF6TR (WLCSP-41) - 5. Recommended Land Pattern
IPC-7351B Footprint (41 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32WBA55HGF6TR (WLCSP-41) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (17 figures · Page 1/2)
Showing 1–12 of 17 uncropped original figures for STM32WBA55 / STM32WBA54
P66 · p66_fig01EXACT PACKAGE
STM32WBA55HGF6TR (WLCSP-41) — Figure 7. UFQFPN32 pinout(1) (2)
Figure 7. UFQFPN32 pinout(1) (2)
P66 · p66_fig02EXACT PACKAGE
STM32WBA55HGF6TR (WLCSP-41) — Figure 8. WLCSP41 pinout(1) 4
Figure 8. WLCSP41 pinout(1) 4
P1 · p01_fig01881×726px
STM32WBA55HGF6TR (WLCSP-41) — Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M33 with TrustZone®, FPU, Bluetooth® LE and IEEE 802.15.4 radio solution | Datasheet - production data | • Ultra-low power radio - 2.4 GHz radio - RF transceiver supporting Bluetooth® LE,
Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M33 with TrustZone®, FPU, Bluetooth® LE and IEEE 802.15.4 radio solution | Datasheet - production data | • Ultra-low power radio - 2.4 GHz radio - RF transceiver supporting Bluetooth® LE,
P66 · p66_fig02P66
STM32WBA55HGF6TR (WLCSP-41) — Datasheet Page 66 (p66_fig02)
Datasheet Page 66 (p66_fig02)
P67 · p67_fig011546×1060px
STM32WBA55HGF6TR (WLCSP-41) — Figure 9. UFQFPN48 pinout(1) (2)
Figure 9. UFQFPN48 pinout(1) (2)
P67 · p67_fig021546×1039px
STM32WBA55HGF6TR (WLCSP-41) — Figure 10. UFQFPN48 SMPS pinout(1) (2)
Figure 10. UFQFPN48 SMPS pinout(1) (2)
P79 · p79_fig011546×1398px
STM32WBA55HGF6TR (WLCSP-41) — Figure 14. Power supply scheme with LDO
Figure 14. Power supply scheme with LDO
P79 · p79_fig01P79
STM32WBA55HGF6TR (WLCSP-41) — Datasheet Page 79 (p79_fig01)
Datasheet Page 79 (p79_fig01)
P80 · p80_fig011546×1879px
STM32WBA55HGF6TR (WLCSP-41) — Figure 15. Power supply scheme with SMPS
Figure 15. Power supply scheme with SMPS
P81 · p81_fig011546×1849px
STM32WBA55HGF6TR (WLCSP-41) — Figure 16. Power supply scheme with SMPS (high RF power)
Figure 16. Power supply scheme with SMPS (high RF power)
P141 · p141_fig011546×937px
STM32WBA55HGF6TR (WLCSP-41) — Figure 37. UFQFPN32 - Recommended footprint
Figure 37. UFQFPN32 - Recommended footprint
P146 · p146_fig011546×999px
STM32WBA55HGF6TR (WLCSP-41) — Figure 41. UFQFPN48 - Recommended footprint
Figure 41. UFQFPN48 - Recommended footprint
Page 1 / 2 (17 extracted figures)

Technical Specifications & Part Details (STM32WBA55HGF6TR)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32WBA55HGF6TR (WLCSP-41) is a 41-pin embedded microcontroller unit (mcu) featuring a 2.80 × 3.00 × 0.55 mm mechanical envelope (lead pitch e = 0.40 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated Bluetooth / BLE, I2C, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SPI, SWD/JTAG, UART interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
2.4 GHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
2.80 × 3.00 × 0.55 mm (A1=0.18 mm)
Package family: WLCSP (WLCSP-41)
Pin Count & Lead PitchN / e
41 Pins | Pitch e = 0.40 mm (15.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
Bluetooth / BLE, I2C, ADC, JTAG / SWD, IrDA, PWM, RTC/CLK, SPI, SWD/JTAG, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PH3-BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol41 auto-grouped pins
OK
IPC-7351B Land Pattern41 pads · Pitch 0.40mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified
IPC-7351B

Family Variants & Same Datasheet Chips — STM32WBA55 / STM32WBA54 (3)

Select package variant or sibling MPN sharing this datasheet

Mechanical Dimensions & Land Pattern (WLCSP-41)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
2.80 × 3.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.55mm · e=0.40mm
Pad Size (W × L)Level B
0.18 × 0.18 mm
Pins / Total PadsTopology
41P / 41Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
WLCSP-41
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32WBA55HGF6TR (WLCSP-41)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32WBA55HGF6TR (WLCSP-41)?

Manufactured by ST, the STM32WBA55HGF6TR is housed in a WLCSP-41 package with 41 pins and a 0.40 mm lead pitch. Key pins include: A6 (VDDRF: Power Supply Input (VDDRF — 3.3V VDD (Max 4.0V))), A8 (OSC_IN: Multiplexed I/O & Peripheral Pin OSC_IN (RTC/CLK)), A10 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A12 (VSSSMPS: Ground Reference Pin (VSSSMPS)), B5 (VDDANA: Power Supply Input (VDDANA — 3.3V VDD (Max 4.0V))), B7 (OSC_OUT: Multiplexed I/O & Peripheral Pin OSC_OUT (RTC/CLK)).

What are the IPC-7351B PCB Footprint dimensions for STM32WBA55HGF6TR?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32WBA55HGF6TR (WLCSP-41) has a nominal body envelope of 3.00 × 2.80 mm, pitch e = 0.40 mm, and 41 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32WBA55HGF6TR?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32WBA55HGF6TR (ST, WLCSP-41) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (41 pins) & STM32WBA55 / STM32WBA54 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A6VDDRFPower_InPrimary positive power supply input (VDDRF) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A8OSC_INDigital_IOSignal terminal OSC_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: OSC_IN. Supported peripheral buses: RTC/CLK.
A10VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A12VSSSMPSGND0V electrical ground return terminal (VSSSMPS) for internal core logic, I/O drivers, and analog sub-blocks.
B5VDDANAPower_InPrimary positive power supply input (VDDANA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B7OSC_OUTDigital_IOSignal terminal OSC_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: OSC_OUT. Supported peripheral buses: RTC/CLK.
B9VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B11VDD11Power_InPrimary positive power supply input (VDD11) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B13VDDSMPSPower_InPrimary positive power supply input (VDDSMPS) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C2RFRF_50OhmSignal terminal RF (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: RF. Supported peripheral buses: General.
C4VDDHPAPower_InPrimary positive power supply input (VDDHPA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C6VDDRFPAPower_InPrimary positive power supply input (VDDRFPA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C8PH3-BOOT0Digital_IOSignal terminal PH3-BOOT0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH3-BOOT0. Supported peripheral buses: General.
C10PB12Digital_IOSignal terminal PB12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB12. Supported peripheral buses: General.
C12VLXSMPSDigital_IOSignal terminal VLXSMPS (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VLXSMPS. Supported peripheral buses: General.
D1VSSRFGND0V electrical ground return terminal (VSSRF) for internal core logic, I/O drivers, and analog sub-blocks.
D3VSSRFGND0V electrical ground return terminal (VSSRF) for internal core logic, I/O drivers, and analog sub-blocks.
D5VSSRFGND0V electrical ground return terminal (VSSRF) for internal core logic, I/O drivers, and analog sub-blocks.
D7PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA8. Supported peripheral buses: General.
D9PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA6. Supported peripheral buses: General.
D11PA7Digital_IOSignal terminal PA7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA7. Supported peripheral buses: General.
D13VSSAGND0V electrical ground return terminal (VSSA) for internal core logic, I/O drivers, and analog sub-blocks.
E2NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
E4PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB15. Supported peripheral buses: General.
E6PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA12. Supported peripheral buses: General.
E8PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General.
E10PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA1. Supported peripheral buses: General.
E12VDDAPower_InPrimary positive power supply input (VDDA) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
F1PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General.
F3PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General.
F5PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
F7PC15-OSC32_OUTDigital_IOSignal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK.
F9PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
F11PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA2. Supported peripheral buses: General.
F13PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA5. Supported peripheral buses: General.
G2PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General.
G4VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
G6VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
G8PC14-OSC32_INDigital_IOSignal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK.
G10PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
G12PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: General.
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