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STM32F373C8T6 (LQFP-48(7x7)) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32F373C8T6

STID: C404020LQFP-48(7x7) · 48 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32F373C8T6 (LQFP-48(7x7))1VBAT2PC133PC14 N- OSC34PC15 U- OSC35PF0 OSC IN -6IO37NRST8VSSA/VREF -9VDDA/VREF+10PA011PA112PA213PA314PA415PA516PA617VDD_218PB019PB120PB221PE822PE923VSSSD/ VREFS24VDDSD48VDD_147VSS_146PB945PB844BOOT043PB742PB641PB540PB439PB338PA1537PA1436PF735PF634PA1333PA1232PA1131PA1030PA929PA828PD827PB1526PB1425VREFSD+Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.835.630.525.420.315.210.25.10-5.1-10.2-15.2-20.3-25.4-30.5-35.6mm
2. 2D FOOTPRINT
123456789101112131415161718192021222324252627282930313233343536373839404142434445464748E=7.00mm · Pitch e=0.50mmD=7.00mm-7-5-3-113577531-1-3-5-7mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (48/48)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
2PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
3PC14 N- OSC32 I (1)_I/OMultiplexed I/O & Peripheral Pin PC14 N- OSC32 I (1)_ (RTC/CLK)
4PC15 U- OSC32 O T(1)_I/OMultiplexed I/O & Peripheral Pin PC15 U- OSC32 O T(1)_ (RTC/CLK)
5PF0 OSC IN -_I/OMultiplexed I/O & Peripheral Pin PF0 OSC IN -_ (I2C, RTC/CLK)
6IO3I/OGPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)
7NRSTISystem Enable & Hardware Reset (NRST)
8VSSA/VREF -GNDGround Reference Pin (VSSA/VREF -)
9VDDA/VREF+PowerPower Supply Input (VDDA/VREF+ — 3.3V VDD (Max 4.0V))
10PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
11PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, ADC, RTC/CLK)
12PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, SPI, ADC)
13PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, SPI, ADC)
14PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC)
15PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC)
16PA6I/OMultiplexed I/O & Peripheral Pin PA6 (SPI, ADC)
17VDD_2PowerPower Supply Input (VDD_2 — 3.3V VDD (Max 4.0V))
18PB0I/OMultiplexed I/O & Peripheral Pin PB0 (SPI, ADC, PWM)
19PB1I/OMultiplexed I/O & Peripheral Pin PB1 (I2C, ADC)
20PB2I/OMultiplexed I/O & Peripheral Pin PB2 (I2C, ADC)
21PE8I/OMultiplexed I/O & Peripheral Pin PE8 (I2C, ADC)
22PE9I/OMultiplexed I/O & Peripheral Pin PE9 (I2C, ADC)
23VSSSD/ VREFSD -GNDGround Reference Pin (VSSSD/ VREFSD -)
24VDDSDPowerPower Supply Input (VDDSD — 3.3V VDD (Max 4.0V))
25VREFSD+I/OMultiplexed I/O & Peripheral Pin VREFSD+ (I2C)
26PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, I2C, ADC)
27PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, I2C, ADC, RTC/CLK)
28PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART, SPI, I2C, ADC)
29PA8I/OMultiplexed I/O & Peripheral Pin PA8 (SPI, I2C, RTC/CLK)
30PA9I/OMultiplexed I/O & Peripheral Pin PA9 (SPI, I2C, PWM)
31PA10I/OMultiplexed I/O & Peripheral Pin PA10 (SPI, I2C, PWM)
32PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM)
33PA12I/OMultiplexed I/O & Peripheral Pin PA12 (USB, UART, SPI, PWM)
34PA13I/OMultiplexed I/O & Peripheral Pin PA13 (UART, SPI, SWD/JTAG)
35PF6I/OMultiplexed I/O & Peripheral Pin PF6 (UART, SPI, I2C)
36PF7I/OMultiplexed I/O & Peripheral Pin PF7 (I2C)
37PA14I/OMultiplexed I/O & Peripheral Pin PA14 (I2C)
38PA15I/OMultiplexed I/O & Peripheral Pin PA15 (SPI, I2C)
39PB3I/OMultiplexed I/O & Peripheral Pin PB3 (UART, SPI, SWD/JTAG)
40PB4I/OMultiplexed I/O & Peripheral Pin PB4 (UART, SPI, PWM, SWD/JTAG)
41PB5I/OMultiplexed I/O & Peripheral Pin PB5 (SPI, I2C)
42PB6I/OMultiplexed I/O & Peripheral Pin PB6 (I2C, PWM)
43PB7I/OMultiplexed I/O & Peripheral Pin PB7 (I2C, PWM)
44BOOT0IInput-Only Pin BOOT0 (General)
45PB8I/OMultiplexed I/O & Peripheral Pin PB8 (SPI, I2C, PWM, CAN)
46PB9I/OMultiplexed I/O & Peripheral Pin PB9 (SPI, I2C, CAN)
47VSS_1GNDGround Reference Pin (VSS_1)
48VDD_1PowerPower Supply Input (VDD_1 — 3.3V VDD (Max 4.0V))
PIN 1 VBAT
Power
Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))
Design note: Alt: Backuppowersupply
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 16 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: STM32F373C8T6 (ST · LQFP-48(7x7))
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32F373C8T6 (LQFP-48(7x7)) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32F373C8T6 (LQFP-48(7x7)) - 2. Standard Pinout (Top View)
True package pinout (48 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32F373C8T6 (LQFP-48(7x7)) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32F373C8T6 (LQFP-48(7x7)) - 4. Package Dimensions (D×E×A)
LQFP-48(7x7) · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32F373C8T6 (LQFP-48(7x7)) - 5. Recommended Land Pattern
IPC-7351B Footprint (48 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32F373C8T6 (LQFP-48(7x7)) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (16 figures · Page 1/2)
Showing 1–12 of 16 uncropped original figures for STM32F373
P29 · p29_fig01EXACT PACKAGE
STM32F373C8T6 (LQFP-48(7x7)) — Figure 2. STM32F373xx LQFP48 pinout
Figure 2. STM32F373xx LQFP48 pinout
P124 · p124_fig01EXACT PACKAGE
STM32F373C8T6 (LQFP-48(7x7)) — Figure 41. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline
Figure 41. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package outline
P126 · p126_fig01EXACT PACKAGE
STM32F373C8T6 (LQFP-48(7x7)) — Figure 42. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package
Figure 42. LQFP48 - 48-pin, 7 x 7 mm low-profile quad flat package
P126 · p126_fig02EXACT PACKAGE
STM32F373C8T6 (LQFP-48(7x7)) — Figure 43. LQFP48 marking example (package top view)
Figure 43. LQFP48 marking example (package top view)
P1 · p01_fig01881×406px
STM32F373C8T6 (LQFP-48(7x7)) — • Memories - 64 to 256 Kbytes of Flash memory - 32 Kbytes of SRAM with HW parity check
• Memories - 64 to 256 Kbytes of Flash memory - 32 Kbytes of SRAM with HW parity check
P1 · p01_fig02888×433px
STM32F373C8T6 (LQFP-48(7x7)) — • 96-bit unique ID
• 96-bit unique ID
P29 · p29_fig01P29
STM32F373C8T6 (LQFP-48(7x7)) — Datasheet Page 29 (p29_fig01)
Datasheet Page 29 (p29_fig01)
P53 · p53_fig011546×2087px
STM32F373C8T6 (LQFP-48(7x7)) — Figure 9. Power supply scheme
Figure 9. Power supply scheme
P53 · p53_fig01P53
STM32F373C8T6 (LQFP-48(7x7)) — Datasheet Page 53 (p53_fig01)
Datasheet Page 53 (p53_fig01)
P75 · p75_fig011547×618px
STM32F373C8T6 (LQFP-48(7x7)) — Figure 14. Typical application with an 8 MHz crystal
Figure 14. Typical application with an 8 MHz crystal
P100 · p100_fig011751×902px
STM32F373C8T6 (LQFP-48(7x7)) — Figure 27. ADC accuracy characteristics
Figure 27. ADC accuracy characteristics
P100 · p100_fig021545×602px
STM32F373C8T6 (LQFP-48(7x7)) — Figure 28. Typical connection diagram using the ADC
Figure 28. Typical connection diagram using the ADC
Page 1 / 2 (16 extracted figures)

Technical Specifications & Part Details (STM32F373C8T6)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32F373C8T6 (LQFP-48(7x7)) is a 48-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 1.60 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 3.0V ~ 3.6V (Typ 3.3V) supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK, SWD/JTAG interfaces.
Operating Supply VoltageV_CC / V_DD
3.0V ~ 3.6V (Typ 3.3V)
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
72 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
18 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 1.60 mm (A1=0.10 mm)
Package family: LQFP (LQFP-48(7x7))
Pin Count & Lead PitchN / e
48 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, UART, SPI, I2C, I2S, ADC, DAC, PWM, JTAG / SWD, IrDA, CAN, RTC/CLK, SWD/JTAG
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol48 auto-grouped pins
OK
IPC-7351B Land Pattern48 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (LQFP-48(7x7))

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.60mm · e=0.50mm
Pad Size (W × L)Level B
0.27 × 1.30 mm
Pins / Total PadsTopology
48P / 48Pad (QUAD_ROW)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
LQFP-48(7x7)
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32F373C8T6 (LQFP-48(7x7))

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32F373C8T6 (LQFP-48(7x7))?

Manufactured by ST, the STM32F373C8T6 is housed in a LQFP-48(7x7) package with 48 pins and a 0.50 mm lead pitch. Key pins include: 1 (VBAT: Power Supply Input (VBAT — 3.3V VDD (Max 4.0V))), 2 (PC13: Multiplexed I/O & Peripheral Pin PC13 (RTC/CLK)), 3 (PC14 N- OSC32 I (1)_: Multiplexed I/O & Peripheral Pin PC14 N- OSC32 I (1)_ (RTC/CLK)), 4 (PC15 U- OSC32 O T(1)_: Multiplexed I/O & Peripheral Pin PC15 U- OSC32 O T(1)_ (RTC/CLK)), 5 (PF0 OSC IN -_: Multiplexed I/O & Peripheral Pin PF0 OSC IN -_ (I2C, RTC/CLK)), 6 (IO3: GPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)).

What are the IPC-7351B PCB Footprint dimensions for STM32F373C8T6?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32F373C8T6 (LQFP-48(7x7)) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 48 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32F373C8T6?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32F373C8T6 (ST, LQFP-48(7x7)) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (48 pins) & STM32F373 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
2PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
3PC14 N- OSC32 I (1)_Digital_IOSignal terminal PC14 N- OSC32 I (1)_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14 N- OSC32 I (1)_. Supported peripheral buses: RTC/CLK.
4PC15 U- OSC32 O T(1)_Digital_IOSignal terminal PC15 U- OSC32 O T(1)_ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15 U- OSC32 O T(1)_. Supported peripheral buses: RTC/CLK.
5PF0 OSC IN -_Digital_IOSignal terminal PF0 OSC IN -_ (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SDA. Supported peripheral buses: I2C, RTC/CLK.
6IO3Digital_IOGPIO3 / RTC_GPIO3 / TOUCH3 / ADC1_CH2 (JTAG Source Strap)
7NRSTDigital_IOActive-low hardware reset terminal (NRST): pulling this pin Low resets the processor core and peripherals.
8VSSA/VREF -GND0V electrical ground return terminal (VSSA/VREF -) for internal core logic, I/O drivers, and analog sub-blocks.
9VDDA/VREF+Power_InPrimary positive power supply input (VDDA/VREF+) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
10PA0Digital_IOSignal terminal PA0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA0. Supported peripheral buses: UART, ADC, PWM, RTC/CLK.
11PA1Digital_IOSignal terminal PA1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI, ADC, RTC/CLK.
12PA2Digital_IOSignal terminal PA2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI, ADC.
13PA3Digital_IOSignal terminal PA3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI, ADC.
14PA4Digital_IOSignal terminal PA4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, ADC.
15PA5Digital_IOSignal terminal PA5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: SPI, ADC.
16PA6Digital_IOSignal terminal PA6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: SPI, ADC.
17VDD_2Power_InPrimary positive power supply input (VDD_2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
18PB0Digital_IOSignal terminal PB0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: SPI, ADC, PWM.
19PB1Digital_IOSignal terminal PB1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB1. Supported peripheral buses: I2C, ADC.
20PB2Digital_IOSignal terminal PB2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB2. Supported peripheral buses: I2C, ADC.
21PE8Digital_IOSignal terminal PE8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE8. Supported peripheral buses: I2C, ADC.
22PE9Digital_IOSignal terminal PE9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE9. Supported peripheral buses: I2C, ADC.
23VSSSD/ VREFSD -GND0V electrical ground return terminal (VSSSD/ VREFSD -) for internal core logic, I/O drivers, and analog sub-blocks.
24VDDSDPower_InPrimary positive power supply input (VDDSD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
25VREFSD+Digital_IOSignal terminal VREFSD+ (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VREFSD+. Supported peripheral buses: I2C.
26PB14Digital_IOSignal terminal PB14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: UART, SPI, I2C, ADC.
27PB15Digital_IOSignal terminal PB15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, I2C, ADC, RTC/CLK.
28PD8Digital_IOSignal terminal PD8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: UART, SPI, I2C, ADC.
29PA8Digital_IOSignal terminal PA8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, I2C, RTC/CLK.
30PA9Digital_IOSignal terminal PA9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, I2C, PWM.
31PA10Digital_IOSignal terminal PA10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI, I2C, PWM.
32PA11Digital_IOSignal terminal PA11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS, SPI1_NSS. Supported peripheral buses: UART, SPI, PWM.
33PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK. Supported peripheral buses: USB, UART, SPI, PWM.
34PA13Digital_IOSignal terminal PA13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO. Supported peripheral buses: UART, SPI, SWD/JTAG.
35PF6Digital_IOSignal terminal PF6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, I2C2_SCL. Supported peripheral buses: UART, SPI, I2C.
36PF7Digital_IOSignal terminal PF7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PF7. Supported peripheral buses: I2C.
37PA14Digital_IOSignal terminal PA14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: I2C.
38PA15Digital_IOSignal terminal PA15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: SPI, I2C.
39PB3Digital_IOSignal terminal PB3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, SPI3_SCK. Supported peripheral buses: UART, SPI, SWD/JTAG.
40PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MISO, SPI3_MISO. Supported peripheral buses: UART, SPI, PWM, SWD/JTAG.
41PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI, SPI3_MOSI. Supported peripheral buses: SPI, I2C.
42PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: I2C, PWM.
43PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: I2C, PWM.
44BOOT0Digital_IOSignal terminal BOOT0 (I, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: BOOT0. Supported peripheral buses: General.
45PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, I2C, PWM, CAN.
46PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, I2C, CAN.
47VSS_1GND0V electrical ground return terminal (VSS_1) for internal core logic, I/O drivers, and analog sub-blocks.
48VDD_1Power_InPrimary positive power supply input (VDD_1) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
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