Mechanical Dimensions & Land Pattern (TFBGA-265)
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
14.00 × 14.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.12mm · e=0.80mm
Pad Size (W × L)Level B
0.32 × 0.32 mm
Pins / Total PadsTopology
265P / 265Pad (BGA_GRID)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit TFBGA-265 | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — STM32H747XIH6TR (TFBGA-265)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of STM32H747XIH6TR (TFBGA-265)?
Manufactured by ST, the STM32H747XIH6TR is housed in a TFBGA-265 package with 265 pins and a 0.80 mm lead pitch. Key pins include: A1 (VSS: Ground Reference Pin (VSS)), A2 (PI6: Multiplexed I/O & Peripheral Pin PI6 (General)), A3 (PI5: Multiplexed I/O & Peripheral Pin PI5 (General)), A4 (PI4: Multiplexed I/O & Peripheral Pin PI4 (General)), A5 (PB5: Multiplexed I/O & Peripheral Pin PB5 (General)), A6 (VDDLDO: Power Supply Input (VDDLDO — 3.3V VDD (Max 4.0V))).
What are the IPC-7351B PCB Footprint dimensions for STM32H747XIH6TR?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32H747XIH6TR (TFBGA-265) has a nominal body envelope of 14.00 × 14.00 mm, pitch e = 0.80 mm, and 265 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32H747XIH6TR?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32H747XIH6TR (ST, TFBGA-265) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (265 pins) & STM32H747 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| A2 | PI6 | Digital_IO | Signal terminal PI6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI6. Supported peripheral buses: General. |
| A3 | PI5 | Digital_IO | Signal terminal PI5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI5. Supported peripheral buses: General. |
| A4 | PI4 | Digital_IO | Signal terminal PI4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI4. Supported peripheral buses: General. |
| A5 | PB5 | Digital_IO | Signal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General. |
| A6 | VDDLDO | Power_In | Primary positive power supply input (VDDLDO) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| A7 | VCAP | Digital_IO | Signal terminal VCAP (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: VCAP. Supported peripheral buses: General. |
| A8 | PK5 | Digital_IO | Signal terminal PK5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PK5. Supported peripheral buses: General. |
| A9 | PG10 | Digital_IO | Signal terminal PG10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG10. Supported peripheral buses: General. |
| A10 | PG9 | Digital_IO | Signal terminal PG9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG9. Supported peripheral buses: General. |
| A11 | PD5 | Digital_IO | Signal terminal PD5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: General. |
| A12 | PD4 | Digital_IO | Signal terminal PD4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD4. Supported peripheral buses: General. |
| A13 | PC10 | Digital_IO | Signal terminal PC10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC10. Supported peripheral buses: General. |
| A14 | PA15 | Digital_IO | Signal terminal PA15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA15. Supported peripheral buses: General. |
| A15 | PI1 | Digital_IO | Signal terminal PI1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI1. Supported peripheral buses: General. |
| A16 | PI0 | Digital_IO | Signal terminal PI0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI0. Supported peripheral buses: General. |
| A17 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B1 | VBAT | Power_In | Primary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| B2 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B3 | PI7 | Digital_IO | Signal terminal PI7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI7. Supported peripheral buses: General. |
| B4 | PE1 | Digital_IO | Signal terminal PE1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General. |
| B5 | PB6 | Digital_IO | Signal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General. |
| B6 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| B7 | PB4 | Digital_IO | Signal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General. |
| B8 | PK4 | Digital_IO | Signal terminal PK4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PK4. Supported peripheral buses: General. |
| B9 | PG11 | Digital_IO | Signal terminal PG11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG11. Supported peripheral buses: General. |
| B10 | PJ15 | Digital_IO | Signal terminal PJ15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PJ15. Supported peripheral buses: General. |
| B11 | PD6 | Digital_IO | Signal terminal PD6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD6. Supported peripheral buses: General. |
| B12 | PD3 | Digital_IO | Signal terminal PD3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD3. Supported peripheral buses: General. |
| B13 | PC11 | Digital_IO | Signal terminal PC11 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC11. Supported peripheral buses: General. |
| B14 | PA14 | Digital_IO | Signal terminal PA14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA14. Supported peripheral buses: General. |
| B15 | PI2 | Digital_IO | Signal terminal PI2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI2. Supported peripheral buses: General. |
| B16 | PH15 | Digital_IO | Signal terminal PH15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH15. Supported peripheral buses: General. |
| B17 | PH14 | Digital_IO | Signal terminal PH14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH14. Supported peripheral buses: General. |
| C1 | PC15-OSC32_OUT | Digital_IO | Signal terminal PC15-OSC32_OUT (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC15-OSC32_OUT. Supported peripheral buses: RTC/CLK. |
| C2 | PC14-OSC32_IN | Digital_IO | Signal terminal PC14-OSC32_IN (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC14-OSC32_IN. Supported peripheral buses: RTC/CLK. |
| C3 | PE2 | Digital_IO | Signal terminal PE2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General. |
| C4 | PE0 | Digital_IO | Signal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General. |
| C5 | PB7 | Digital_IO | Signal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General. |
| C6 | PB3 | Digital_IO | Signal terminal PB3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB3. Supported peripheral buses: General. |
| C7 | PK6 | Digital_IO | Signal terminal PK6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PK6. Supported peripheral buses: General. |
| C8 | PK3 | Digital_IO | Signal terminal PK3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PK3. Supported peripheral buses: General. |
| C9 | PG12 | Digital_IO | Signal terminal PG12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG12. Supported peripheral buses: General. |
| C10 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| C11 | PD7 | Digital_IO | Signal terminal PD7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD7. Supported peripheral buses: General. |
| C12 | PC12 | Digital_IO | Signal terminal PC12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PC12. Supported peripheral buses: General. |
| C13 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| C14 | PI3 | Digital_IO | Signal terminal PI3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI3. Supported peripheral buses: General. |
| C15 | PA13 | Digital_IO | Signal terminal PA13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PA13. Supported peripheral buses: General. |
| C16 | VSS | GND | 0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks. |
| C17 | VDDLDO | Power_In | Primary positive power supply input (VDDLDO) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V). |
| D1 | PE5 | Digital_IO | Signal terminal PE5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: General. |
| D2 | PE4 | Digital_IO | Signal terminal PE4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: General. |
| D3 | PE3 | Digital_IO | Signal terminal PE3 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: General. |
| D4 | PB9 | Digital_IO | Signal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General. |
| D5 | PB8 | Digital_IO | Signal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General. |
| D6 | PG15 | Digital_IO | Signal terminal PG15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: General. |
| D7 | PK7 | Digital_IO | Signal terminal PK7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PK7. Supported peripheral buses: General. |
| D8 | PG14 | Digital_IO | Signal terminal PG14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG14. Supported peripheral buses: General. |
| D9 | PG13 | Digital_IO | Signal terminal PG13 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG13. Supported peripheral buses: General. |
| D10 | PJ14 | Digital_IO | Signal terminal PJ14 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PJ14. Supported peripheral buses: General. |
| D11 | PJ12 | Digital_IO | Signal terminal PJ12 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PJ12. Supported peripheral buses: General. |
| D12 | PD2 | Digital_IO | Signal terminal PD2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: General. |
| D13 | PD0 | Digital_IO | Signal terminal PD0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PD0. Supported peripheral buses: General. |