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KP115LGA (SOT-23-6L) — Symbol, Footprint IPC-7351B & 3D STEP Model

KP115LGA

Kiwi InstrumentsID: C384586SOT-23-6L · 6 Pins · Pitch 0.95mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · KP115LGA (SOT-23-6L)1CS2GND3PWM6GATE5VDD4ZCDGrid Pitch = 2.54mm (IEEE-315)-15.2-10.2-5.105.110.215.210.25.10-5.1-10.2mm
2. 2D FOOTPRINT
123456E=2.90mm · Pitch e=0.95mmD=1.60mm-3-2-101233210-1-2-3mm
3. 3D CAD MODEL
Package Body: 2.90mm × 1.60mm · Pitch: 0.95mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (6/6)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
1CSI/OMultiplexed I/O & Peripheral Pin CS (General)
2GNDGNDGround Reference Pin (GND)
3PWMI/OMultiplexed I/O & Peripheral Pin PWM (PWM)
4ZCDI/OMultiplexed I/O & Peripheral Pin ZCD (General)
5VDDPowerPower Supply Input (VDD — 15 to 30 V)
6GATEI/OMultiplexed I/O & Peripheral Pin GATE (General)
PIN 1 CS
I/O
Multiplexed I/O & Peripheral Pin CS (General)
Design note: Signal terminal CS (I/O, 15 to 30 V domain). Multiplexed alternate functions: CS. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 8 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
Open PDF in New Window ↗Read Datasheet PDF (.pdf)
PDF VIEWEROfficial Datasheet Document: KP115LGA (Kiwi Instruments · SOT-23-6L)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
KP115LGA (SOT-23-6L) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
KP115LGA (SOT-23-6L) - 2. Standard Pinout (Top View)
True package pinout (6 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
KP115LGA (SOT-23-6L) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
KP115LGA (SOT-23-6L) - 4. Package Dimensions (D×E×A)
SOT-23-6L · 2.90×1.60mm · Pitch 0.95mmExpand ›
5. Recommended Land PatternLAND PATTERN
KP115LGA (SOT-23-6L) - 5. Recommended Land Pattern
IPC-7351B Footprint (6 Pads)Expand ›
6. Application SchematicSCHEMATIC
KP115LGA (SOT-23-6L) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (8 figures · Page 1/1)
Showing 1–8 of 8 uncropped original figures for KP115
P2 · p02_fig01EXACT PACKAGE
KP115LGA (SOT-23-6L) — November 13, 2015 www.kiwiinst.com 2 DS_KP115_REV1.2_CN ©Kiwi Instruments Corp. Confidential
November 13, 2015 www.kiwiinst.com 2 DS_KP115_REV1.2_CN ©Kiwi Instruments Corp. Confidential
P2 · p02_fig02EXACT PACKAGE
KP115LGA (SOT-23-6L) — 6 5 4
6 5 4
P3 · p03_fig01EXACT PACKAGE
KP115LGA (SOT-23-6L) — KP115 隔离型、原边控制PWM 调光型PFC 驱动控制器 | 订货信息 | 型号 描述 | KP115LGA SOT23-6L,无卤,3000 颗/卷
KP115 隔离型、原边控制PWM 调光型PFC 驱动控制器 | 订货信息 | 型号 描述 | KP115LGA SOT23-6L,无卤,3000 颗/卷
P6 · p06_fig01EXACT PACKAGE
KP115LGA (SOT-23-6L) — KP115 隔离型、原边控制PWM 调光型PFC 驱动控制器
KP115 隔离型、原边控制PWM 调光型PFC 驱动控制器
P1 · p01_fig011836×2148px
KP115LGA (SOT-23-6L) — 隔离型、原边控制PWM 调光型PFC 驱动控制器
隔离型、原边控制PWM 调光型PFC 驱动控制器
P1 · p01_fig01P1
KP115LGA (SOT-23-6L) — Datasheet Page 1 (p01_fig01)
Datasheet Page 1 (p01_fig01)
P2 · p02_fig02P2
KP115LGA (SOT-23-6L) — Datasheet Page 2 (p02_fig02)
Datasheet Page 2 (p02_fig02)
P6 · p06_fig01P6
KP115LGA (SOT-23-6L) — Datasheet Page 6 (p06_fig01)
Datasheet Page 6 (p06_fig01)

Technical Specifications & Part Details (KP115LGA)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Standard Electronic & Interconnect Component
Detailed Overview:KP115LGA (SOT-23-6L) is a 6-pin standard electronic & interconnect component featuring a 2.90 × 1.60 × 1.10 mm mechanical envelope (lead pitch e = 0.95 mm). Rated for 15 to 30 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated PWM interfaces.
Operating Supply VoltageV_CC / V_DD
15 to 30 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
40kHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
Observe per-pin absolute maximum current limits
Package Envelope (D × E × A)D × E × A
2.90 × 1.60 × 1.10 mm (A1=0.15 mm)
Package family: SOT23 (SOT-23-6L)
Pin Count & Lead PitchN / e
6 Pins | Pitch e = 0.95 mm (37.4 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
PWM
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Verify Pin-1 chamfer orientation on Top Silkscreen prior to SMT pick-and-place assembly.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol6 auto-grouped pins
OK
IPC-7351B Land Pattern6 pads · Pitch 0.95mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (SOT-23-6L)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
2.90 × 1.60 mm
Height (A) & Pitch (e)IPC-7351B
A=1.10mm · e=0.95mm
Pad Size (W × L)Level B
0.45 × 1.15 mm
Pins / Total PadsTopology
6P / 6Pad (SOT_SMALL)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
SOT-23-6L
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — KP115LGA (SOT-23-6L)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of KP115LGA (SOT-23-6L)?

Manufactured by Kiwi Instruments, the KP115LGA is housed in a SOT-23-6L package with 6 pins and a 0.95 mm lead pitch, supporting a VCC supply range of 15 to 30 V. Key pins include: 1 (CS: Multiplexed I/O & Peripheral Pin CS (General)), 2 (GND: Ground Reference Pin (GND)), 3 (PWM: Multiplexed I/O & Peripheral Pin PWM (PWM)), 4 (ZCD: Multiplexed I/O & Peripheral Pin ZCD (General)), 5 (VDD: Power Supply Input (VDD — 15 to 30 V)), 6 (GATE: Multiplexed I/O & Peripheral Pin GATE (General)).

What are the IPC-7351B PCB Footprint dimensions for KP115LGA?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), KP115LGA (SOT-23-6L) has a nominal body envelope of 1.60 × 2.90 mm, pitch e = 0.95 mm, and 6 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for KP115LGA?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for KP115LGA (Kiwi Instruments, SOT-23-6L) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (6 pins) & KP115 Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
1CSDigital_IOSignal terminal CS (I/O, 15 to 30 V domain). Multiplexed alternate functions: CS. Supported peripheral buses: General.
2GNDGND0V electrical ground return terminal (GND) for internal core logic, I/O drivers, and analog sub-blocks.
3PWMDigital_IOSignal terminal PWM (I/O, 15 to 30 V domain). Multiplexed alternate functions: PWM. Supported peripheral buses: PWM.
4ZCDDigital_IOSignal terminal ZCD (I/O, 15 to 30 V domain). Multiplexed alternate functions: ZCD. Supported peripheral buses: General.
5VDDPower_InPrimary positive power supply input (VDD) operating in the 15 to 30 V domain (Max rating: 30.0V).
6GATEDigital_IOSignal terminal GATE (I/O, 15 to 30 V domain). Multiplexed alternate functions: GATE. Supported peripheral buses: General.
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