STM32L4Q5AGI6P (UFBGA-169) — Symbol, Footprint IPC-7351B & 3D STEP Model

STM32L4Q5AGI6P

STUFBGA-169 · 169 Pins · Pitch 0.50mmIPC-7351B Verified5.0 (0)
SYNCHRONIZED 4D CROSS-PROBE MODETouch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
1. SYMBOL
U1 · STM32L4Q5AGI6P (UFBGA-169)A1PI10A2PH2A3VDDA4PE0A5PB4A6PB3 (JTDO/TRA7VSSA8VDDA9PA15 (JTDI)A10PA14 (JTCK/SA11PA13 (JTMS/SA12PI0A13PH14B1PI9B2PI7B3VSSB4PE1B5PB5B6VDDIO2B7PG9B8PD0B9PI6B10PI2B11PI1B12PH15B13PH12C1VDDC2VSSC3PI11C4PB8C5PB6C6PG15C7PD4C8PD1C9PH13C10PI3C11PI8C12VSSC13VDDD1PE4D2PE3D3PE2D4PB9D5PB7D6PG10D7PD5D8PD2D9PC10D10PI4D11PH9D12PH7D13PA12E1PC13E2VBATE3PE6E4PE5E5PH3-BOOT0E6PG11E7PD6E8PD3E9PC11E10PI5E11PH6E12VDDUSBE13PA11F1PC14 - OSC32F2VSSF3PF2F4PF1F5PF0F6PG12F7PD7F8PC12F9PA10F10PA9F11PC6F12VDDIO2F13VSSG1IOG1G2VDDG3PF3G4PF4G5PF5G6PG14G7PG13N13PB13N12PB12N11VDDN10PH8N9PB10N8PE11N7VDDN6PF12N5PB2N4OPAMP2_VINMN3VDDN2PA1N1PA2M13PB14M12PB15M11VSSM10VDD12M9PH10M8PE12M7VSSM6PF13M5PF11M4PA6M3VSSM2PA3M1OPAMP1_VINML13VSSL12VDDL11PD8L10PD9L9PH5L8PE13L7PE7L6PF14L5PB1L4PA7L3PA4L2VDDAL1VREF+K13PD13K12PD11K11PD12K10PD14K9PH4K8PE14K7PE8K6PF15K5PB0K4PA5K3PA0K2VSSA/VR EF -K1PC3J13PD10J12PG2J11PG3J10PG4J9PG5J8PE15J7PE9J6PG0J5PC5J4PC2J3PC1J2PC0J1PH1 - OSC_OUH13VDDH12VSSH11PD15H10PG7H9PG8H8PB11H7PE10H6PG1H5PC4H4PF10H3NRSTH2VSSH1PH0 - OSC_ING13VDDG12PC7G11PG6G10PC8G9PC9G8PA8Grid Pitch = 2.54mm (IEEE-315)-17.8-12.7-7.6-2.52.57.612.717.8114.3109.2104.199.194.088.983.878.773.768.663.558.453.348.343.238.133.027.922.917.812.77.62.5-2.5-7.6-12.7-17.8-22.9-27.9-33.0-38.1-43.2-48.3-53.3-58.4-63.5-68.6-73.7-78.7-83.8-88.9-94.0-99.1-104.1-109.2-114.3mm
2. 2D FOOTPRINT
A1B1C1D1E1F1G1H1J1K1L1M1N1A2B2C2D2E2F2G2H2J2K2L2M2N2A3B3C3D3E3F3G3H3J3K3L3M3N3A4B4C4D4E4F4G4H4J4K4L4M4N4A5B5C5D5E5F5G5H5J5K5L5M5N5A6B6C6D6E6F6G6H6J6K6L6M6N6A7B7C7D7E7F7G7H7J7K7L7M7N7A8B8C8D8E8F8G8H8J8K8L8M8N8A9B9C9D9E9F9G9H9J9K9L9M9N9A10B10C10D10E10F10G10H10J10K10L10M10N10A11B11C11D11E11F11G11H11J11K11L11M11N11A12B12C12D12E12F12G12H12J12K12L12M12N12A13B13C13D13E13F13G13H13J13K13L13M13N13E=7.00mm · Pitch e=0.50mmD=7.00mm-5-4-3-2-1012345543210-1-2-3-4-5mm
3. 3D CAD MODEL
Package Body: 7.00mm × 7.00mm · Pitch: 0.50mm · Ruler Step: 1.00mmSynced <100ms

Synchronized Pinout (Symbol / 2D / 3D) (169/169)

Touch or hover any pin to highlight concurrently across Symbol, Footprint and 3D
PinSymbolTypeFunction (EN)
A1PI10I/OMultiplexed I/O & Peripheral Pin PI10 (General)
A2PH2I/OMultiplexed I/O & Peripheral Pin PH2 (General)
A3VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A4PE0I/OMultiplexed I/O & Peripheral Pin PE0 (General)
A5PB4I/OMultiplexed I/O & Peripheral Pin PB4 (General)
A6PB3 (JTDO/TR ACESWO )I/OMultiplexed I/O & Peripheral Pin PB3 (JTDO/TR ACESWO ) (UART, SPI, PWM, SWD/JTAG)
A7VSSGNDGround Reference Pin (VSS)
A8VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
A9PA15 (JTDI)I/OMultiplexed I/O & Peripheral Pin PA15 (JTDI) (UART, SPI, SWD/JTAG)
A10PA14 (JTCK/S WCLK)I/OMultiplexed I/O & Peripheral Pin PA14 (JTCK/S WCLK) (I2C, SWD/JTAG)
A11PA13 (JTMS/S WDIO)I/OMultiplexed I/O & Peripheral Pin PA13 (JTMS/S WDIO) (SWD/JTAG)
A12PI0I/OMultiplexed I/O & Peripheral Pin PI0 (SPI, PWM)
A13PH14I/OMultiplexed I/O & Peripheral Pin PH14 (PWM)
B1PI9I/OMultiplexed I/O & Peripheral Pin PI9 (General)
B2PI7I/OMultiplexed I/O & Peripheral Pin PI7 (General)
B3VSSGNDGround Reference Pin (VSS)
B4PE1I/OMultiplexed I/O & Peripheral Pin PE1 (General)
B5PB5I/OMultiplexed I/O & Peripheral Pin PB5 (General)
B6VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
B7PG9I/OMultiplexed I/O & Peripheral Pin PG9 (UART, SPI)
B8PD0I/OMultiplexed I/O & Peripheral Pin PD0 (SPI, CAN)
B9PI6I/OMultiplexed I/O & Peripheral Pin PI6 (PWM)
B10PI2I/OMultiplexed I/O & Peripheral Pin PI2 (SPI, PWM)
B11PI1I/OMultiplexed I/O & Peripheral Pin PI1 (SPI)
B12PH15I/OMultiplexed I/O & Peripheral Pin PH15 (PWM)
B13PH12I/OMultiplexed I/O & Peripheral Pin PH12 (PWM)
C1VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
C2VSSGNDGround Reference Pin (VSS)
C3PI11I/OMultiplexed I/O & Peripheral Pin PI11 (General)
C4PB8I/OMultiplexed I/O & Peripheral Pin PB8 (General)
C5PB6I/OMultiplexed I/O & Peripheral Pin PB6 (General)
C6PG15I/OMultiplexed I/O & Peripheral Pin PG15 (General)
C7PD4I/OMultiplexed I/O & Peripheral Pin PD4 (UART, SPI)
C8PD1I/OMultiplexed I/O & Peripheral Pin PD1 (SPI, CAN)
C9PH13I/OMultiplexed I/O & Peripheral Pin PH13 (PWM, CAN)
C10PI3I/OMultiplexed I/O & Peripheral Pin PI3 (SPI)
C11PI8I/OMultiplexed I/O & Peripheral Pin PI8 (General)
C12VSSGNDGround Reference Pin (VSS)
C13VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
D1PE4I/OMultiplexed I/O & Peripheral Pin PE4 (PWM)
D2PE3I/OMultiplexed I/O & Peripheral Pin PE3 (PWM)
D3PE2I/OMultiplexed I/O & Peripheral Pin PE2 (General)
D4PB9I/OMultiplexed I/O & Peripheral Pin PB9 (General)
D5PB7I/OMultiplexed I/O & Peripheral Pin PB7 (General)
D6PG10I/OMultiplexed I/O & Peripheral Pin PG10 (UART, SPI)
D7PD5I/OMultiplexed I/O & Peripheral Pin PD5 (UART)
D8PD2I/OMultiplexed I/O & Peripheral Pin PD2 (UART)
D9PC10I/OMultiplexed I/O & Peripheral Pin PC10 (UART, SPI)
D10PI4I/OMultiplexed I/O & Peripheral Pin PI4 (General)
D11PH9I/OMultiplexed I/O & Peripheral Pin PH9 (I2C)
D12PH7I/OMultiplexed I/O & Peripheral Pin PH7 (I2C)
D13PA12I/OMultiplexed I/O & Peripheral Pin PA12 (UART, SPI, CAN)
E1PC13I/OMultiplexed I/O & Peripheral Pin PC13 (RTC/CLK)
E2VBATPowerPower Supply Input (VBAT — 3.3V VDD (Max 4.0V))
E3PE6I/OMultiplexed I/O & Peripheral Pin PE6 (I2C, PWM, RTC/CLK)
E4PE5I/OMultiplexed I/O & Peripheral Pin PE5 (SPI, PWM)
E5PH3-BOOT0I/OMultiplexed I/O & Peripheral Pin PH3-BOOT0 (General)
E6PG11I/OMultiplexed I/O & Peripheral Pin PG11 (UART, SPI)
E7PD6I/OMultiplexed I/O & Peripheral Pin PD6 (UART, SPI, I2C)
E8PD3I/OMultiplexed I/O & Peripheral Pin PD3 (UART, SPI)
E9PC11I/OMultiplexed I/O & Peripheral Pin PC11 (UART, SPI)
E10PI5I/OMultiplexed I/O & Peripheral Pin PI5 (PWM)
E11PH6I/OMultiplexed I/O & Peripheral Pin PH6 (I2C)
E12VDDUSBPowerPower Supply Input (VDDUSB — 3.3V VDD (Max 4.0V))
E13PA11I/OMultiplexed I/O & Peripheral Pin PA11 (UART, SPI, PWM, CAN)
F1PC14 - OSC32_I N(PC14)I/OMultiplexed I/O & Peripheral Pin PC14 - OSC32_I N(PC14) (RTC/CLK)
F2VSSGNDGround Reference Pin (VSS)
F3PF2I/OMultiplexed I/O & Peripheral Pin PF2 (I2C)
F4PF1I/OMultiplexed I/O & Peripheral Pin PF1 (I2C)
F5PF0I/OMultiplexed I/O & Peripheral Pin PF0 (I2C)
F6PG12I/OMultiplexed I/O & Peripheral Pin PG12 (UART, SPI, I2C)
F7PD7I/OMultiplexed I/O & Peripheral Pin PD7 (UART)
F8PC12I/OMultiplexed I/O & Peripheral Pin PC12 (UART, SPI)
F9PA10I/OMultiplexed I/O & Peripheral Pin PA10 (UART, I2C, PWM)
F10PA9I/OMultiplexed I/O & Peripheral Pin PA9 (UART, SPI, PWM)
F11PC6I/OMultiplexed I/O & Peripheral Pin PC6 (PWM)
F12VDDIO2PowerPower Supply Input (VDDIO2 — 3.3V VDD (Max 4.0V))
F13VSSGNDGround Reference Pin (VSS)
G1IOG1I/OGeneral Purpose Digital I/O Pin IOG1
G2VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
G3PF3I/OMultiplexed I/O & Peripheral Pin PF3 (General)
G4PF4I/OMultiplexed I/O & Peripheral Pin PF4 (General)
G5PF5I/OMultiplexed I/O & Peripheral Pin PF5 (General)
G6PG14I/OMultiplexed I/O & Peripheral Pin PG14 (I2C)
G7PG13I/OMultiplexed I/O & Peripheral Pin PG13 (UART, I2C)
G8PA8I/OMultiplexed I/O & Peripheral Pin PA8 (UART, SPI, RTC/CLK)
G9PC9I/OMultiplexed I/O & Peripheral Pin PC9 (I2C, PWM)
G10PC8I/OMultiplexed I/O & Peripheral Pin PC8 (PWM)
G11PG6I/OMultiplexed I/O & Peripheral Pin PG6 (UART, I2C)
G12PC7I/OMultiplexed I/O & Peripheral Pin PC7 (PWM)
G13VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
H1PH0 - OSC_IN (PH0)I/OMultiplexed I/O & Peripheral Pin PH0 - OSC_IN (PH0) (RTC/CLK)
H2VSSGNDGround Reference Pin (VSS)
H3NRSTISystem Enable & Hardware Reset (NRST)
H4PF10I/OMultiplexed I/O & Peripheral Pin PF10 (General)
H5PC4I/OMultiplexed I/O & Peripheral Pin PC4 (UART, ADC)
H6PG1I/OMultiplexed I/O & Peripheral Pin PG1 (General)
H7PE10I/OMultiplexed I/O & Peripheral Pin PE10 (PWM)
H8PB11I/OMultiplexed I/O & Peripheral Pin PB11 (UART, I2C, PWM)
H9PG8I/OMultiplexed I/O & Peripheral Pin PG8 (I2C)
H10PG7I/OMultiplexed I/O & Peripheral Pin PG7 (I2C)
H11PD15I/OMultiplexed I/O & Peripheral Pin PD15 (PWM)
H12VSSGNDGround Reference Pin (VSS)
H13VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
J1PH1 - OSC_OU T(PH1)I/OMultiplexed I/O & Peripheral Pin PH1 - OSC_OU T(PH1) (RTC/CLK)
J2PC0I/OMultiplexed I/O & Peripheral Pin PC0 (I2C, ADC)
J3PC1I/OMultiplexed I/O & Peripheral Pin PC1 (SPI, I2C, ADC)
J4PC2I/OMultiplexed I/O & Peripheral Pin PC2 (SPI, ADC)
J5PC5I/OMultiplexed I/O & Peripheral Pin PC5 (UART, ADC)
J6PG0I/OMultiplexed I/O & Peripheral Pin PG0 (General)
J7PE9I/OMultiplexed I/O & Peripheral Pin PE9 (PWM)
J8PE15I/OMultiplexed I/O & Peripheral Pin PE15 (SPI)
J9PG5I/OMultiplexed I/O & Peripheral Pin PG5 (UART, SPI)
J10PG4I/OMultiplexed I/O & Peripheral Pin PG4 (SPI)
J11PG3I/OMultiplexed I/O & Peripheral Pin PG3 (SPI)
J12PG2I/OMultiplexed I/O & Peripheral Pin PG2 (SPI)
J13PD10I/OMultiplexed I/O & Peripheral Pin PD10 (UART, SPI)
K1PC3I/OMultiplexed I/O & Peripheral Pin PC3 (SPI, I2C, ADC)
K2VSSA/VR EF -GNDGround Reference Pin (VSSA/VR EF -)
K3PA0I/OMultiplexed I/O & Peripheral Pin PA0 (UART, ADC, PWM, RTC/CLK)
K4PA5I/OMultiplexed I/O & Peripheral Pin PA5 (SPI, ADC, DAC, PWM)
K5PB0I/OMultiplexed I/O & Peripheral Pin PB0 (UART, SPI, ADC, PWM)
K6PF15I/OMultiplexed I/O & Peripheral Pin PF15 (I2C)
K7PE8I/OMultiplexed I/O & Peripheral Pin PE8 (SPI, PWM)
K8PE14I/OMultiplexed I/O & Peripheral Pin PE14 (SPI, PWM)
K9PH4I/OMultiplexed I/O & Peripheral Pin PH4 (I2C)
K10PD14I/OMultiplexed I/O & Peripheral Pin PD14 (PWM)
K11PD12I/OMultiplexed I/O & Peripheral Pin PD12 (UART, I2C, PWM)
K12PD11I/OMultiplexed I/O & Peripheral Pin PD11 (UART, I2C)
K13PD13I/OMultiplexed I/O & Peripheral Pin PD13 (I2C, PWM)
L1VREF+AnalogMultiplexed I/O & Peripheral Pin VREF+ (General)
L2VDDAPowerPower Supply Input (VDDA — 3.3V VDD (Max 4.0V))
L3PA4I/OMultiplexed I/O & Peripheral Pin PA4 (UART, SPI, ADC, DAC)
L4PA7I/OMultiplexed I/O & Peripheral Pin PA7 (SPI, I2C, ADC, PWM)
L5PB1I/OMultiplexed I/O & Peripheral Pin PB1 (UART, ADC, PWM)
L6PF14I/OMultiplexed I/O & Peripheral Pin PF14 (I2C)
L7PE7I/OMultiplexed I/O & Peripheral Pin PE7 (General)
L8PE13I/OMultiplexed I/O & Peripheral Pin PE13 (SPI, PWM)
L9PH5I/OMultiplexed I/O & Peripheral Pin PH5 (I2C)
L10PD9I/OMultiplexed I/O & Peripheral Pin PD9 (UART)
L11PD8I/OMultiplexed I/O & Peripheral Pin PD8 (UART)
L12VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
L13VSSGNDGround Reference Pin (VSS)
M1OPAMP1_VINMPowerPower Supply Input (OPAMP1_VINM — 3.3V VDD (Max 4.0V))
M2PA3I/OMultiplexed I/O & Peripheral Pin PA3 (UART, ADC, PWM)
M3VSSGNDGround Reference Pin (VSS)
M4PA6I/OMultiplexed I/O & Peripheral Pin PA6 (UART, SPI, ADC, PWM)
M5PF11I/OMultiplexed I/O & Peripheral Pin PF11 (General)
M6PF13I/OMultiplexed I/O & Peripheral Pin PF13 (I2C)
M7VSSGNDGround Reference Pin (VSS)
M8PE12I/OMultiplexed I/O & Peripheral Pin PE12 (SPI, PWM)
M9PH10I/OMultiplexed I/O & Peripheral Pin PH10 (PWM)
M10VDD12PowerPower Supply Input (VDD12 — 3.3V VDD (Max 4.0V))
M11VSSGNDGround Reference Pin (VSS)
M12PB15I/OMultiplexed I/O & Peripheral Pin PB15 (SPI, I2C, PWM, RTC/CLK)
M13PB14I/OMultiplexed I/O & Peripheral Pin PB14 (UART, SPI, I2C, PWM)
N1PA2I/OMultiplexed I/O & Peripheral Pin PA2 (UART, ADC, PWM)
N2PA1I/OMultiplexed I/O & Peripheral Pin PA1 (UART, SPI, I2C, ADC, PWM)
N3VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N4OPAMP2_VINMPowerPower Supply Input (OPAMP2_VINM — 3.3V VDD (Max 4.0V))
N5PB2I/OMultiplexed I/O & Peripheral Pin PB2 (I2C, RTC/CLK)
N6PF12I/OMultiplexed I/O & Peripheral Pin PF12 (General)
N7VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N8PE11I/OMultiplexed I/O & Peripheral Pin PE11 (PWM)
N9PB10I/OMultiplexed I/O & Peripheral Pin PB10 (UART, SPI, I2C, PWM)
N10PH8I/OMultiplexed I/O & Peripheral Pin PH8 (I2C)
N11VDDPowerPower Supply Input (VDD — 3.3V VDD (Max 4.0V))
N12PB12I/OMultiplexed I/O & Peripheral Pin PB12 (UART, SPI, I2C)
N13PB13I/OMultiplexed I/O & Peripheral Pin PB13 (UART, SPI, I2C, PWM)
PIN A1 PI10
I/O
Multiplexed I/O & Peripheral Pin PI10 (General)
Design note: Signal terminal PI10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI10. Supported peripheral buses: General.
IPC-7351B Solder Density & Span C/G/Z Tuner

Live Embedded Datasheet PDF & Technical Drawing Gallery (6 Standard Drawings + 14 Extracted Figures)

Read the original datasheet PDF directly or click any drawing to view fullscreen
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PDF VIEWEROfficial Datasheet Document: STM32L4Q5AGI6P (ST · UFBGA-169)
Scroll, search text (Ctrl+F), or expand directly inside the embedded PDF reader below
1. Realistic 3D PackageREPRESENTATIVE
STM32L4Q5AGI6P (UFBGA-169) - 1. Realistic 3D Package
Detailed solid 3D bodyExpand ›
2. Standard Pinout (Top View)CLEANROOM PINOUT
STM32L4Q5AGI6P (UFBGA-169) - 2. Standard Pinout (Top View)
True package pinout (169 pins)Expand ›
3. Original Datasheet PinoutPDF PINOUT
STM32L4Q5AGI6P (UFBGA-169) - 3. Original Datasheet Pinout
Uncropped datasheet pin diagramExpand ›
4. Package Dimensions (D×E×A)PACKAGE DIMENSIONS
STM32L4Q5AGI6P (UFBGA-169) - 4. Package Dimensions (D×E×A)
UFBGA-169 · 7.00×7.00mm · Pitch 0.50mmExpand ›
5. Recommended Land PatternLAND PATTERN
STM32L4Q5AGI6P (UFBGA-169) - 5. Recommended Land Pattern
IPC-7351B Footprint (169 Pads)Expand ›
6. Application SchematicSCHEMATIC
STM32L4Q5AGI6P (UFBGA-169) - 6. Application Schematic
Typical Application SchematicExpand ›
Original Datasheet Pinouts & Technical Drawings (14 figures · Page 1/2)
Showing 1–12 of 14 uncropped original figures for STM32L4Q5VGY / STM32L4Q5AGI / STM32L4Q5CGT
P75 · p75_fig01EXACT PACKAGE
STM32L4Q5AGI6P (UFBGA-169) — Figure 22. STM32L4Q5Axxx UFBGA169 ballout(1)
Figure 22. STM32L4Q5Axxx UFBGA169 ballout(1)
P75 · p75_fig02EXACT PACKAGE
STM32L4Q5AGI6P (UFBGA-169) — VREF+ VDDA PA4 PA7 PB1 PF14 PE7 PE13 PH5 PD9 PD8 VDD
VREF+ VDDA PA4 PA7 PB1 PF14 PE7 PE13 PH5 PD9 PD8 VDD
P302 · p302_fig01EXACT PACKAGE
STM32L4Q5AGI6P (UFBGA-169) — Figure 100. UFBGA169 outline
Figure 100. UFBGA169 outline
P303 · p303_fig01EXACT PACKAGE
STM32L4Q5AGI6P (UFBGA-169) — Figure 101. UFBGA169 recommended footprint
Figure 101. UFBGA169 recommended footprint
P1 · p01_fig011751×640px
STM32L4Q5AGI6P (UFBGA-169) — General-purpose inputs/outputs
General-purpose inputs/outputs
P136 · p136_fig011751×2091px
STM32L4Q5AGI6P (UFBGA-169) — Figure 26. STM32L4Q5xx power supply scheme
Figure 26. STM32L4Q5xx power supply scheme
P136 · p136_fig01P136
STM32L4Q5AGI6P (UFBGA-169) — Datasheet Page 136 (p136_fig01)
Datasheet Page 136 (p136_fig01)
P187 · p187_fig011546×702px
STM32L4Q5AGI6P (UFBGA-169) — Figure 31. Typical application with an 8 MHz crystal
Figure 31. Typical application with an 8 MHz crystal
P188 · p188_fig011546×702px
STM32L4Q5AGI6P (UFBGA-169) — Figure 32. Typical application with a 32.768 kHz crystal
Figure 32. Typical application with a 32.768 kHz crystal
P291 · p291_fig011875×1021px
STM32L4Q5AGI6P (UFBGA-169) — Figure 89. WLCSP100 recommended footprint
Figure 89. WLCSP100 recommended footprint
P295 · p295_fig011548×595px
STM32L4Q5AGI6P (UFBGA-169) — Figure 93. UFBGA132 recommended footprint
Figure 93. UFBGA132 recommended footprint
P295 · p295_fig021875×1871px
STM32L4Q5AGI6P (UFBGA-169) — Figure 93. UFBGA132 recommended footprint
Figure 93. UFBGA132 recommended footprint
Page 1 / 2 (14 extracted figures)

Technical Specifications & Part Details (STM32L4Q5AGI6P)

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet (EN)
Embedded Microcontroller Unit (MCU)
Detailed Overview:STM32L4Q5AGI6P (UFBGA-169) is a 169-pin embedded microcontroller unit (mcu) featuring a 7.00 × 7.00 × 0.50 mm mechanical envelope (lead pitch e = 0.50 mm). Rated for 1.71 V to 3.6 V supply operation across -40°C ~ +85°C (Industrial Grade) with integrated USB, SPI, I2C, ADC, DAC, JTAG / SWD, IrDA, CAN, PWM, RTC/CLK, SWD/JTAG, UART interfaces.
Operating Supply VoltageV_CC / V_DD
1.71 V to 3.6 V
Place 100nF + 10µF X7R decoupling capacitors < 2mm from supply pins
Ambient Operating TemperatureT_A
-40°C ~ +85°C (Industrial Grade)
Industrial temperature grade; T_J(max) = +125°C
Clock / RF Operating Frequencyf_CLK / f_RF
120 MHz
Extracted from authoritative PDF specification tables
Current & Power RatingI_OUT / I_CC
I_GPIO(max) = ±20 mA / pin | I_VDD(total) ≤ 150 mA
117 5V-tolerant (FT) pins detected
Package Envelope (D × E × A)D × E × A
7.00 × 7.00 × 0.50 mm (A1=0.20 mm)
Package family: BGA (UFBGA-169)
Pin Count & Lead PitchN / e
169 Pins | Pitch e = 0.50 mm (19.7 mil)
Normalized to Center-to-Center Span C per IPC-7351B
Integrated Peripheral InterfacesBuses
USB, SPI, I2C, ADC, DAC, JTAG / SWD, IrDA, CAN, PWM, RTC/CLK, SWD/JTAG, UART
Cross-linked with 4D Pinout & Schematic Symbol
Reflow & Moisture SensitivityIPC / MSL
IPC-7351B Level B | J-STD-020 (Peak 260°C) | MSL-3
60% windowed solder paste stencil on thermal EPAD
Engineering Safety Alert: Boot Strapping Pin Alert (PH3-BOOT0): Do not force conflicting external pull-ups/pull-downs during POR reset.
Engineering Safety Alert: Connect exposed thermal pad (if present) to internal ground plane via 0.3mm stitched thermal vias.

5-Point Standards Verification

Automated compliance checks prior to export
5/5 PASS
IEEE-315 Symbol169 auto-grouped pins
OK
IPC-7351B Land Pattern169 pads · Pitch 0.50mm
OK
IPC-7525 60% Solder PasteReflow 1:1 Standard
OK
DFM Rules JLCPCB / PCBWayMin pad clearance: 0.25mm
OK
3D STEP AP214 & GLBAligned coordinate origin (0,0,0)
OK

Hardware Verification & Community Engineering Reviews

Summary of electrical parameters, mechanical dimensions, voltage range and peripheral interfaces from Datasheet
5.00 PCB Verified

Mechanical Dimensions & Land Pattern (UFBGA-169)

Extracted from Datasheet & IPC-7351B Normalized
mm
Package Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=0.50mm · e=0.50mm
Pad Size (W × L)Level B
0.22 × 0.22 mm
Pins / Total PadsTopology
169P / 169Pad (BGA_GRID)

Recommended Companion BOM & Drop-In Equivalents

Passive external components per reference schematic and 1:1 pin-compatible alternatives
DFM READY
Designator / Replacement MPNValue / PackageFunction & PCB Layout Rule
N/A
BOM
Per application circuit
UFBGA-169
Size power & signal trace widths for rated load current following IPC-2221 clearance rules.

Technical Frequently Asked Questions (FAQ) — STM32L4Q5AGI6P (UFBGA-169)

Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formats
IPC-7351B / IEEE-315

What is the Pinout and operating voltage specification of STM32L4Q5AGI6P (UFBGA-169)?

Manufactured by ST, the STM32L4Q5AGI6P is housed in a UFBGA-169 package with 169 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 1.71 V to 3.6 V. Key pins include: A1 (PI10: Multiplexed I/O & Peripheral Pin PI10 (General)), A2 (PH2: Multiplexed I/O & Peripheral Pin PH2 (General)), A3 (VDD: Power Supply Input (VDD — 3.3V VDD (Max 4.0V))), A4 (PE0: Multiplexed I/O & Peripheral Pin PE0 (General)), A5 (PB4: Multiplexed I/O & Peripheral Pin PB4 (General)), A6 (PB3 (JTDO/TR ACESWO ): Multiplexed I/O & Peripheral Pin PB3 (JTDO/TR ACESWO ) (UART, SPI, PWM, SWD/JTAG)).

What are the IPC-7351B PCB Footprint dimensions for STM32L4Q5AGI6P?

Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), STM32L4Q5AGI6P (UFBGA-169) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 169 copper pads.

Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for STM32L4Q5AGI6P?

You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for STM32L4Q5AGI6P (ST, UFBGA-169) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.

Static Reference Appendix: Pinout Table (169 pins) & STM32L4Q5VGY / STM32L4Q5AGI / STM32L4Q5CGT Family VariantsExpand static table
Pin #Signal NameElectrical TypeFunctional Description & Design Notes
A1PI10Digital_IOSignal terminal PI10 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI10. Supported peripheral buses: General.
A2PH2Digital_IOSignal terminal PH2 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH2. Supported peripheral buses: General.
A3VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A4PE0Digital_IOSignal terminal PE0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE0. Supported peripheral buses: General.
A5PB4Digital_IOSignal terminal PB4 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB4. Supported peripheral buses: General.
A6PB3 (JTDO/TR ACESWO )Digital_IOSignal terminal PB3 (JTDO/TR ACESWO ) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_SCK, SPI3_SCK. Supported peripheral buses: UART, SPI, PWM, SWD/JTAG.
A7VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
A8VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
A9PA15 (JTDI)Digital_IOSignal terminal PA15 (JTDI) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_NSS, SPI3_NSS. Supported peripheral buses: UART, SPI, SWD/JTAG.
A10PA14 (JTCK/S WCLK)Digital_IOSignal terminal PA14 (JTCK/S WCLK) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C1_SMBA, I2C4_SMBA. Supported peripheral buses: I2C, SWD/JTAG.
A11PA13 (JTMS/S WDIO)Digital_IOSignal terminal PA13 (JTMS/S WDIO) (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PA13 (JTMS/S WDIO). Supported peripheral buses: SWD/JTAG.
A12PI0Digital_IOSignal terminal PI0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, PWM.
A13PH14Digital_IOSignal terminal PH14 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH14. Supported peripheral buses: PWM.
B1PI9Digital_IOSignal terminal PI9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI9. Supported peripheral buses: General.
B2PI7Digital_IOSignal terminal PI7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PI7. Supported peripheral buses: General.
B3VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
B4PE1Digital_IOSignal terminal PE1 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PE1. Supported peripheral buses: General.
B5PB5Digital_IOSignal terminal PB5 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB5. Supported peripheral buses: General.
B6VDDIO2Power_InPrimary positive power supply input (VDDIO2) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
B7PG9Digital_IOSignal terminal PG9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
B8PD0Digital_IOSignal terminal PD0 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_NSS. Supported peripheral buses: SPI, CAN.
B9PI6Digital_IOSignal terminal PI6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI6. Supported peripheral buses: PWM.
B10PI2Digital_IOSignal terminal PI2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MISO. Supported peripheral buses: SPI, PWM.
B11PI1Digital_IOSignal terminal PI1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI.
B12PH15Digital_IOSignal terminal PH15 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH15. Supported peripheral buses: PWM.
B13PH12Digital_IOSignal terminal PH12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH12. Supported peripheral buses: PWM.
C1VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
C2VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C3PI11Digital_IOSignal terminal PI11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI11. Supported peripheral buses: General.
C4PB8Digital_IOSignal terminal PB8 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB8. Supported peripheral buses: General.
C5PB6Digital_IOSignal terminal PB6 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB6. Supported peripheral buses: General.
C6PG15Digital_IOSignal terminal PG15 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PG15. Supported peripheral buses: General.
C7PD4Digital_IOSignal terminal PD4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: UART, SPI.
C8PD1Digital_IOSignal terminal PD1 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK. Supported peripheral buses: SPI, CAN.
C9PH13Digital_IOSignal terminal PH13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PH13. Supported peripheral buses: PWM, CAN.
C10PI3Digital_IOSignal terminal PI3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_MOSI. Supported peripheral buses: SPI.
C11PI8Digital_IOSignal terminal PI8 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI8. Supported peripheral buses: General.
C12VSSGND0V electrical ground return terminal (VSS) for internal core logic, I/O drivers, and analog sub-blocks.
C13VDDPower_InPrimary positive power supply input (VDD) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
D1PE4Digital_IOSignal terminal PE4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE4. Supported peripheral buses: PWM.
D2PE3Digital_IOSignal terminal PE3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE3. Supported peripheral buses: PWM.
D3PE2Digital_IOSignal terminal PE2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE2. Supported peripheral buses: General.
D4PB9Digital_IOSignal terminal PB9 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB9. Supported peripheral buses: General.
D5PB7Digital_IOSignal terminal PB7 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PB7. Supported peripheral buses: General.
D6PG10Digital_IOSignal terminal PG10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI.
D7PD5Digital_IOSignal terminal PD5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD5. Supported peripheral buses: UART.
D8PD2Digital_IOSignal terminal PD2 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PD2. Supported peripheral buses: UART.
D9PC10Digital_IOSignal terminal PC10 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_SCK. Supported peripheral buses: UART, SPI.
D10PI4Digital_IOSignal terminal PI4 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI4. Supported peripheral buses: General.
D11PH9Digital_IOSignal terminal PH9 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SMBA. Supported peripheral buses: I2C.
D12PH7Digital_IOSignal terminal PH7 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C3_SCL. Supported peripheral buses: I2C.
D13PA12Digital_IOSignal terminal PA12 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI1_MOSI. Supported peripheral buses: UART, SPI, CAN.
E1PC13Digital_IOSignal terminal PC13 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PC13. Supported peripheral buses: RTC/CLK.
E2VBATPower_InPrimary positive power supply input (VBAT) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).
E3PE6Digital_IOSignal terminal PE6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE6. Supported peripheral buses: I2C, PWM, RTC/CLK.
E4PE5Digital_IOSignal terminal PE5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PE5. Supported peripheral buses: SPI, PWM.
E5PH3-BOOT0Digital_IOSignal terminal PH3-BOOT0 (I/O, 3.3V VDD (Max 4.0V) domain). Multiplexed alternate functions: PH3-BOOT0. Supported peripheral buses: General.
E6PG11Digital_IOSignal terminal PG11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI.
E7PD6Digital_IOSignal terminal PD6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MOSI. Supported peripheral buses: UART, SPI, I2C.
E8PD3Digital_IOSignal terminal PD3 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI2_SCK, SPI2_MISO. Supported peripheral buses: UART, SPI.
E9PC11Digital_IOSignal terminal PC11 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: SPI3_MISO. Supported peripheral buses: UART, SPI.
E10PI5Digital_IOSignal terminal PI5 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: PI5. Supported peripheral buses: PWM.
E11PH6Digital_IOSignal terminal PH6 (I/O, 3.3V VDD (5V-Tolerant FT) domain). Multiplexed alternate functions: I2C2_SMBA. Supported peripheral buses: I2C.
E12VDDUSBPower_InPrimary positive power supply input (VDDUSB) operating in the 3.3V VDD (Max 4.0V) domain (Max rating: 4.0V).