Mechanical Dimensions & Land Pattern (WFBGA-128)
Extracted from Datasheet & IPC-7351B NormalizedPackage Body (D × E)Nominal
7.00 × 7.00 mm
Height (A) & Pitch (e)IPC-7351B
A=1.35mm · e=0.50mm
Pad Size (W × L)Level B
0.22 × 0.22 mm
Pins / Total PadsTopology
128P / 128Pad (BGA_GRID)
Recommended Companion BOM & Drop-In Equivalents
Passive external components per reference schematic and 1:1 pin-compatible alternatives| Designator / Replacement MPN | Value / Package | Function & PCB Layout Rule |
|---|---|---|
| N/A BOM | Per application circuit WFBGA-128 | Size power & signal trace widths for rated load current following IPC-2221 clearance rules. |
Technical Frequently Asked Questions (FAQ) — MEC1521H-B0-I/TF-TR (WFBGA-128)
Quick answers covering Pinout, IPC-7351B Land Pattern dimensions, and CAD export formatsWhat is the Pinout and operating voltage specification of MEC1521H-B0-I/TF-TR (WFBGA-128)?
Manufactured by MICROCHIP, the MEC1521H-B0-I/TF-TR is housed in a WFBGA-128 package with 128 pins and a 0.50 mm lead pitch, supporting a VCC supply range of 3.5V to 4.1V. Key pins include: A1 (IOA1: General Purpose Digital I/O Pin IOA1), A2 (XTAL1: Multiplexed I/O & Peripheral Pin XTAL1 (RTC/CLK)), A3 (IOA3: General Purpose Digital I/O Pin IOA3), A4 (XTAL2: Multiplexed I/O & Peripheral Pin XTAL2 (RTC/CLK)), A5 (IOA5: General Purpose Digital I/O Pin IOA5), A6 (IOA6: General Purpose Digital I/O Pin IOA6).
What are the IPC-7351B PCB Footprint dimensions for MEC1521H-B0-I/TF-TR?
Normalized from the official datasheet mechanical drawing per IPC-7351B (Density Level B Nominal), MEC1521H-B0-I/TF-TR (WFBGA-128) has a nominal body envelope of 7.00 × 7.00 mm, pitch e = 0.50 mm, and 128 copper pads.
Where can I download KiCad (.kicad_mod, .kicad_sym), Fusion 360 (.lbr), and 3D STEP models for MEC1521H-B0-I/TF-TR?
You can download the verified open-hardware (CERN-OHL-P-2.0) CAD library bundle for MEC1521H-B0-I/TF-TR (MICROCHIP, WFBGA-128) directly on this page, including KiCad 8 Footprints (.kicad_mod), Schematic Symbols (.kicad_sym), Autodesk Fusion 360 / Eagle (.lbr), and 3D STEP AP214 / WebGL GLB models.
Static Reference Appendix: Pinout Table (128 pins) & MEC1521 Family VariantsExpand static table
| Pin # | Signal Name | Electrical Type | Functional Description & Design Notes |
|---|---|---|---|
| A1 | IOA1 | Digital_IO | General Purpose Digital I/O Pin IOA1 |
| A2 | XTAL1 | Digital_IO | Signal terminal XTAL1 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: XTAL1. Supported peripheral buses: RTC/CLK. |
| A3 | IOA3 | Digital_IO | General Purpose Digital I/O Pin IOA3 |
| A4 | XTAL2 | Digital_IO | Signal terminal XTAL2 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: XTAL2. Supported peripheral buses: RTC/CLK. |
| A5 | IOA5 | Digital_IO | General Purpose Digital I/O Pin IOA5 |
| A6 | IOA6 | Digital_IO | General Purpose Digital I/O Pin IOA6 |
| A7 | IOA7 | Digital_IO | General Purpose Digital I/O Pin IOA7 |
| A8 | IOA8 | Digital_IO | General Purpose Digital I/O Pin IOA8 |
| A9 | GPIO050/ICT0_TACH0 | Digital_IO | Signal terminal GPIO050/ICT0_TACH0 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO050/ICT0_TACH0. Supported peripheral buses: General. |
| A10 | IOA10 | Digital_IO | General Purpose Digital I/O Pin IOA10 |
| A11 | IOA11 | Digital_IO | General Purpose Digital I/O Pin IOA11 |
| A12 | IOA12 | Digital_IO | General Purpose Digital I/O Pin IOA12 |
| A13 | GPIO156/LED0 | Digital_IO | Signal terminal GPIO156/LED0 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO156/LED0. Supported peripheral buses: General. |
| B1 | IOB1 | Digital_IO | General Purpose Digital I/O Pin IOB1 |
| B2 | GPIO033/TACH3 | Digital_IO | Signal terminal GPIO033/TACH3 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO033/TACH3. Supported peripheral buses: General. |
| B3 | VCI IN1#/GPIO162_ | Digital_IO | Signal terminal VCI IN1#/GPIO162_ (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: VCI IN1#/GPIO162_. Supported peripheral buses: General. |
| B4 | VCI OVRD IN/GPIO172__ | Digital_IO | Signal terminal VCI OVRD IN/GPIO172__ (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: VCI OVRD IN/GPIO172__. Supported peripheral buses: General. |
| B5 | IOB5 | Digital_IO | General Purpose Digital I/O Pin IOB5 |
| B6 | IOB6 | Digital_IO | General Purpose Digital I/O Pin IOB6 |
| B7 | IOB7 | Digital_IO | General Purpose Digital I/O Pin IOB7 |
| B8 | IOB8 | Digital_IO | General Purpose Digital I/O Pin IOB8 |
| B9 | GPIO051/ICT1_TACH1 | Digital_IO | Signal terminal GPIO051/ICT1_TACH1 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO051/ICT1_TACH1. Supported peripheral buses: General. |
| B10 | IOB10 | Digital_IO | General Purpose Digital I/O Pin IOB10 |
| B11 | IOB11 | Digital_IO | General Purpose Digital I/O Pin IOB11 |
| B12 | IOB12 | Digital_IO | General Purpose Digital I/O Pin IOB12 |
| B13 | IOB13 | Digital_IO | General Purpose Digital I/O Pin IOB13 |
| C1 | GPIO226 | Digital_IO | Signal terminal GPIO226 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO226. Supported peripheral buses: General. |
| C2 | nRESET_IN | Digital_IO | Active-low hardware reset terminal (nRESET_IN): pulling this pin Low resets the processor core and peripherals. |
| C12 | GPIO125/PVT CLK/KSO12_ | Digital_IO | Signal terminal GPIO125/PVT CLK/KSO12_ (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO125/PVT CLK/KSO12_. Supported peripheral buses: General. |
| C13 | GPIO121/PVT IO0/KSO08_ | Digital_IO | Signal terminal GPIO121/PVT IO0/KSO08_ (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO121/PVT IO0/KSO08_. Supported peripheral buses: General. |
| D1 | IOD1 | Digital_IO | General Purpose Digital I/O Pin IOD1 |
| D2 | GPIO106/PWROK | Digital_IO | Signal terminal GPIO106/PWROK (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO106/PWROK. Supported peripheral buses: General. |
| D4 | IOD4 | Digital_IO | General Purpose Digital I/O Pin IOD4 |
| D5 | BGPO0/GPIO253 | Digital_IO | Signal terminal BGPO0/GPIO253 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: BGPO0/GPIO253. Supported peripheral buses: General. |
| D6 | IOD6 | Digital_IO | General Purpose Digital I/O Pin IOD6 |
| D7 | IOD7 | Digital_IO | General Purpose Digital I/O Pin IOD7 |
| D8 | IOD8 | Digital_IO | General Purpose Digital I/O Pin IOD8 |
| D9 | GPIO157/LED1 | Digital_IO | Signal terminal GPIO157/LED1 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO157/LED1. Supported peripheral buses: General. |
| D10 | IOD10 | Digital_IO | General Purpose Digital I/O Pin IOD10 |
| D12 | GPIO123/PVT IO2/KSO10_ | Digital_IO | Signal terminal GPIO123/PVT IO2/KSO10_ (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO123/PVT IO2/KSO10_. Supported peripheral buses: General. |
| D13 | GPIO126/PVT IO3/KSO13_ | Digital_IO | Signal terminal GPIO126/PVT IO3/KSO13_ (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO126/PVT IO3/KSO13_. Supported peripheral buses: General. |
| E1 | VTR_PLL | Digital_IO | Signal terminal VTR_PLL (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: VTR_PLL. Supported peripheral buses: General. |
| E2 | IOE2 | Digital_IO | General Purpose Digital I/O Pin IOE2 |
| E4 | VCI IN0#/GPIO163_ | Digital_IO | Signal terminal VCI IN0#/GPIO163_ (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: VCI IN0#/GPIO163_. Supported peripheral buses: General. |
| E5 | VBAT | Power_In | Primary positive power supply input (VBAT) operating in the 3.5V to 4.1V domain (Max rating: 4.1V). |
| E6 | VSS_ANALOG | GND | 0V electrical ground return terminal (VSS_ANALOG) for internal core logic, I/O drivers, and analog sub-blocks. |
| E7 | VSS1 | GND | 0V electrical ground return terminal (VSS1) for internal core logic, I/O drivers, and analog sub-blocks. |
| E8 | IOE8 | Digital_IO | General Purpose Digital I/O Pin IOE8 |
| E9 | GPIO153/LED2 | Digital_IO | Signal terminal GPIO153/LED2 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO153/LED2. Supported peripheral buses: General. |
| E10 | IOE10 | Digital_IO | General Purpose Digital I/O Pin IOE10 |
| E12 | GPIO122/PVT IO1/KSO09_ | Digital_IO | Signal terminal GPIO122/PVT IO1/KSO09_ (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO122/PVT IO1/KSO09_. Supported peripheral buses: General. |
| E13 | JTAG RST#_ | Digital_IO | Signal terminal JTAG RST#_ (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: JTAG RST#_. Supported peripheral buses: SWD/JTAG. |
| F1 | IOF1 | Digital_IO | General Purpose Digital I/O Pin IOF1 |
| F2 | GPIO242/CMP_VIN0 | Power_In | Primary positive power supply input (GPIO242/CMP_VIN0) operating in the 3.5V to 4.1V domain (Max rating: 4.1V). |
| F4 | IOF4 | Digital_IO | General Purpose Digital I/O Pin IOF4 |
| F5 | VCI OUT/GPIO250_ | Digital_IO | Signal terminal VCI OUT/GPIO250_ (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: VCI OUT/GPIO250_. Supported peripheral buses: General. |
| F9 | GPIO046/KSO02/ICT11 | Digital_IO | Signal terminal GPIO046/KSO02/ICT11 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO046/KSO02/ICT11. Supported peripheral buses: General. |
| F10 | IOF10 | Digital_IO | General Purpose Digital I/O Pin IOF10 |
| F12 | IOF12 | Digital_IO | General Purpose Digital I/O Pin IOF12 |
| F13 | GPIO043/SBTSI CLK -_ | Digital_IO | Signal terminal GPIO043/SBTSI CLK -_ (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: GPIO043/SBTSI CLK -_. Supported peripheral buses: General. |
| G1 | VR_CAP | Digital_IO | Signal terminal VR_CAP (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: VR_CAP. Supported peripheral buses: General. |
| G2 | IOG2 | Digital_IO | General Purpose Digital I/O Pin IOG2 |
| G4 | IOG4 | Digital_IO | General Purpose Digital I/O Pin IOG4 |
| G5 | VTR1 | Digital_IO | Signal terminal VTR1 (I/O, 3.5V to 4.1V domain). Multiplexed alternate functions: VTR1. Supported peripheral buses: General. |